test: panel: Add a test for the panel uclass

At present this uclass has no tests. Add a simple one which checks the PWM configuration, regulator and GPIO. Signed-off-by: Simon Glass <sjg@chromium.org>

test: panel: Add a test for the panel uclass
At present this uclass has no tests. Add a simple one which checks the PWM configuration, regulator and GPIO. Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass
1 parent d07b6e145e
Showing 6 changed files with 111 additions and 2 deletions Side-by-side Diff
arch/sandbox/dts/sandbox_pmic.dtsi
arch/sandbox/dts/test.dts
arch/sandbox/include/asm/test.h
drivers/pwm/sandbox_pwm.c
test/dm/Makefile
test/dm/panel.c
@@ -60,7 +60,7 @@
 		regulator-max-microvolt = <3300000>;
 	};
  
-	ldo1 {
+	ldo_1: ldo1 {
 		regulator-name = "VDD_EMMC_1.8V";
 		regulator-min-microvolt = <1800000>;
 		regulator-max-microvolt = <1800000>;
@@ -11,6 +11,8 @@
 		eth0 = "/eth@10002000";
 		eth3 = &eth_3;
 		eth5 = &eth_5;
+		gpio1 = &gpio_a;
+		gpio2 = &gpio_b;
 		i2c0 = "/i2c@0";
 		mmc0 = "/mmc0";
 		mmc1 = "/mmc1";
@@ -91,6 +93,15 @@
 		reg = <2 1>;
 	};
  
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		enable-gpios = <&gpio_a 1>;
+		power-supply = <&ldo_1>;
+		pwms = <&pwm 0 1000>;
+		default-brightness-level = <5>;
+		brightness-levels = <0 16 32 64 128 170 202 234 255>;
+	};
+
 	bind-test {
 		bind-test-child1 {
 			compatible = "sandbox,phy";
  
  
@@ -441,12 +452,14 @@
 		power-domains = <&pwrdom 2>;
 	};
  
-	pwm {
+	pwm: pwm {
 		compatible = "sandbox,pwm";
+		#pwm-cells = <2>;
 	};
  
 	pwm2 {
 		compatible = "sandbox,pwm";
+		#pwm-cells = <2>;
 	};
  
 	ram {
@@ -481,6 +494,11 @@
 		compatible = "sandbox,test-processor";
 		internal-memory-mapped;
 		remoteproc-name = "remoteproc-test-dev2";
+	};
+
+	panel {
+		compatible = "simple-panel";
+		backlight = <&backlight 0 100>;
 	};
  
 	smem@0 {
@@ -98,5 +98,20 @@
  * @buflen:	length of buffer in bytes
  */
 int sandbox_osd_get_mem(struct udevice *dev, u8 *buf, size_t buflen);
+
+/**
+ * sandbox_pwm_get_config() - get the PWM config for a channel
+ *
+ * @dev: Device to check
+ * @channel: Channel number to check
+ * @period_ns: Period of the PWM in nanoseconds
+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
+ * @enable: true if the PWM is enabled
+ * @polarity: true if the PWM polarity is active high
+ * @return 0 if OK, -ENOSPC if the PWM number is invalid
+ */
+int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
+			   uint *duty_nsp, bool *enablep, bool *polarityp);
+
 #endif
@@ -14,6 +14,14 @@
 	NUM_CHANNELS	= 3,
 };
  
+/**
+ * struct sandbox_pwm_chan - a sandbox PWM channel
+ *
+ * @period_ns: Period of the PWM in nanoseconds
+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
+ * @enable: true if the PWM is enabled
+ * @polarity: true if the PWM polarity is active high
+ */
 struct sandbox_pwm_chan {
 	uint period_ns;
 	uint duty_ns;
@@ -24,6 +32,23 @@
 struct sandbox_pwm_priv {
 	struct sandbox_pwm_chan chan[NUM_CHANNELS];
 };
+
+int sandbox_pwm_get_config(struct udevice *dev, uint channel, uint *period_nsp,
+			   uint *duty_nsp, bool *enablep, bool *polarityp)
+{
+	struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+	struct sandbox_pwm_chan *chan;
+
+	if (channel >= NUM_CHANNELS)
+		return -ENOSPC;
+	chan = &priv->chan[channel];
+	*period_nsp = chan->period_ns;
+	*duty_nsp = chan->duty_ns;
+	*enablep = chan->enable;
+	*polarityp = chan->polarity;
+
+	return 0;
+}
  
 static int sandbox_pwm_set_config(struct udevice *dev, uint channel,
 				  uint period_ns, uint duty_ns)
@@ -25,6 +25,7 @@
 obj-$(CONFIG_DM_MMC) += mmc.o
 obj-y += ofnode.o
 obj-$(CONFIG_OSD) += osd.o
+obj-$(CONFIG_DM_VIDEO) += panel.o
 obj-$(CONFIG_DM_PCI) += pci.o
 obj-$(CONFIG_PHY) += phy.o
 obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Test for panel uclass
+ *
+ * Copyright (c) 2018 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ */
+
+#include <common.h>
+#include <backlight.h>
+#include <dm.h>
+#include <panel.h>
+#include <video.h>
+#include <asm/gpio.h>
+#include <asm/test.h>
+#include <dm/test.h>
+#include <test/ut.h>
+#include <power/regulator.h>
+
+/* Basic test of the panel uclass */
+static int dm_test_panel(struct unit_test_state *uts)
+{
+	struct udevice *dev, *pwm, *gpio, *reg;
+	uint period_ns;
+	uint duty_ns;
+	bool enable;
+	bool polarity;
+
+	ut_assertok(uclass_first_device_err(UCLASS_PANEL, &dev));
+	ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm));
+	ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
+	ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", &reg));
+	ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,
+					   &enable, &polarity));
+	ut_asserteq(false, enable);
+	ut_asserteq(false, regulator_get_enable(reg));
+
+	ut_assertok(panel_enable_backlight(dev));
+	ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,
+					   &enable, &polarity));
+	ut_asserteq(1000, period_ns);
+	ut_asserteq(170 * 1000 / 256, duty_ns);
+	ut_asserteq(true, enable);
+	ut_asserteq(false, polarity);
+	ut_asserteq(1, sandbox_gpio_get_value(gpio, 1));
+	ut_asserteq(true, regulator_get_enable(reg));
+
+	return 0;
+}
+DM_TEST(dm_test_panel, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
...	...	@@ -60,7 +60,7 @@
60	60	regulator-max-microvolt = <3300000>;
61	61	};
62	62
63		- ldo1 {
	63	+ ldo_1: ldo1 {
64	64	regulator-name = "VDD_EMMC_1.8V";
65	65	regulator-min-microvolt = <1800000>;
66	66	regulator-max-microvolt = <1800000>;
...	...	@@ -11,6 +11,8 @@
11	11	eth0 = "/eth@10002000";
12	12	eth3 = &eth_3;
13	13	eth5 = &eth_5;
	14	+ gpio1 = &gpio_a;
	15	+ gpio2 = &gpio_b;
14	16	i2c0 = "/i2c@0";
15	17	mmc0 = "/mmc0";
16	18	mmc1 = "/mmc1";
...	...	@@ -91,6 +93,15 @@
91	93	reg = <2 1>;
92	94	};
93	95
	96	+ backlight: backlight {
	97	+ compatible = "pwm-backlight";
	98	+ enable-gpios = <&gpio_a 1>;
	99	+ power-supply = <&ldo_1>;
	100	+ pwms = <&pwm 0 1000>;
	101	+ default-brightness-level = <5>;
	102	+ brightness-levels = <0 16 32 64 128 170 202 234 255>;
	103	+ };
	104	+
94	105	bind-test {
95	106	bind-test-child1 {
96	107	compatible = "sandbox,phy";
97	108
98	109
...	...	@@ -441,12 +452,14 @@
441	452	power-domains = <&pwrdom 2>;
442	453	};
443	454
444		- pwm {
	455	+ pwm: pwm {
445	456	compatible = "sandbox,pwm";
	457	+ #pwm-cells = <2>;
446	458	};
447	459
448	460	pwm2 {
449	461	compatible = "sandbox,pwm";
	462	+ #pwm-cells = <2>;
450	463	};
451	464
452	465	ram {
...	...	@@ -481,6 +494,11 @@
481	494	compatible = "sandbox,test-processor";
482	495	internal-memory-mapped;
483	496	remoteproc-name = "remoteproc-test-dev2";
	497	+ };
	498	+
	499	+ panel {
	500	+ compatible = "simple-panel";
	501	+ backlight = <&backlight 0 100>;
484	502	};
485	503
486	504	smem@0 {
...	...	@@ -98,5 +98,20 @@
98	98	* @buflen: length of buffer in bytes
99	99	*/
100	100	int sandbox_osd_get_mem(struct udevice dev, u8 buf, size_t buflen);
	101	+
	102	+/**
	103	+ * sandbox_pwm_get_config() - get the PWM config for a channel
	104	+ *
	105	+ * @dev: Device to check
	106	+ * @channel: Channel number to check
	107	+ * @period_ns: Period of the PWM in nanoseconds
	108	+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
	109	+ * @enable: true if the PWM is enabled
	110	+ * @polarity: true if the PWM polarity is active high
	111	+ * @return 0 if OK, -ENOSPC if the PWM number is invalid
	112	+ */
	113	+int sandbox_pwm_get_config(struct udevice dev, uint channel, uint period_nsp,
	114	+ uint duty_nsp, bool enablep, bool *polarityp);
	115	+
101	116	#endif
...	...	@@ -14,6 +14,14 @@
14	14	NUM_CHANNELS = 3,
15	15	};
16	16
	17	+/**
	18	+ * struct sandbox_pwm_chan - a sandbox PWM channel
	19	+ *
	20	+ * @period_ns: Period of the PWM in nanoseconds
	21	+ * @duty_ns: Current duty cycle of the PWM in nanoseconds
	22	+ * @enable: true if the PWM is enabled
	23	+ * @polarity: true if the PWM polarity is active high
	24	+ */
17	25	struct sandbox_pwm_chan {
18	26	uint period_ns;
19	27	uint duty_ns;
...	...	@@ -24,6 +32,23 @@
24	32	struct sandbox_pwm_priv {
25	33	struct sandbox_pwm_chan chan[NUM_CHANNELS];
26	34	};
	35	+
	36	+int sandbox_pwm_get_config(struct udevice dev, uint channel, uint period_nsp,
	37	+ uint duty_nsp, bool enablep, bool *polarityp)
	38	+{
	39	+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
	40	+ struct sandbox_pwm_chan *chan;
	41	+
	42	+ if (channel >= NUM_CHANNELS)
	43	+ return -ENOSPC;
	44	+ chan = &priv->chan[channel];
	45	+ *period_nsp = chan->period_ns;
	46	+ *duty_nsp = chan->duty_ns;
	47	+ *enablep = chan->enable;
	48	+ *polarityp = chan->polarity;
	49	+
	50	+ return 0;
	51	+}
27	52
28	53	static int sandbox_pwm_set_config(struct udevice *dev, uint channel,
29	54	uint period_ns, uint duty_ns)
...	...	@@ -25,6 +25,7 @@
25	25	obj-$(CONFIG_DM_MMC) += mmc.o
26	26	obj-y += ofnode.o
27	27	obj-$(CONFIG_OSD) += osd.o
	28	+obj-$(CONFIG_DM_VIDEO) += panel.o
28	29	obj-$(CONFIG_DM_PCI) += pci.o
29	30	obj-$(CONFIG_PHY) += phy.o
30	31	obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
	1	+// SPDX-License-Identifier: GPL-2.0+
	2	+/*
	3	+ * Test for panel uclass
	4	+ *
	5	+ * Copyright (c) 2018 Google, Inc
	6	+ * Written by Simon Glass <sjg@chromium.org>
	7	+ */
	8	+
	9	+#include <common.h>
	10	+#include <backlight.h>
	11	+#include <dm.h>
	12	+#include <panel.h>
	13	+#include <video.h>
	14	+#include <asm/gpio.h>
	15	+#include <asm/test.h>
	16	+#include <dm/test.h>
	17	+#include <test/ut.h>
	18	+#include <power/regulator.h>
	19	+
	20	+/* Basic test of the panel uclass */
	21	+static int dm_test_panel(struct unit_test_state *uts)
	22	+{
	23	+ struct udevice dev, pwm, gpio, reg;
	24	+ uint period_ns;
	25	+ uint duty_ns;
	26	+ bool enable;
	27	+ bool polarity;
	28	+
	29	+ ut_assertok(uclass_first_device_err(UCLASS_PANEL, &dev));
	30	+ ut_assertok(uclass_first_device_err(UCLASS_PWM, &pwm));
	31	+ ut_assertok(uclass_get_device(UCLASS_GPIO, 1, &gpio));
	32	+ ut_assertok(regulator_get_by_platname("VDD_EMMC_1.8V", &reg));
	33	+ ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,
	34	+ &enable, &polarity));
	35	+ ut_asserteq(false, enable);
	36	+ ut_asserteq(false, regulator_get_enable(reg));
	37	+
	38	+ ut_assertok(panel_enable_backlight(dev));
	39	+ ut_assertok(sandbox_pwm_get_config(pwm, 0, &period_ns, &duty_ns,
	40	+ &enable, &polarity));
	41	+ ut_asserteq(1000, period_ns);
	42	+ ut_asserteq(170 * 1000 / 256, duty_ns);
	43	+ ut_asserteq(true, enable);
	44	+ ut_asserteq(false, polarity);
	45	+ ut_asserteq(1, sandbox_gpio_get_value(gpio, 1));
	46	+ ut_asserteq(true, regulator_get_enable(reg));
	47	+
	48	+ return 0;
	49	+}
	50	+DM_TEST(dm_test_panel, DM_TESTF_SCAN_PDATA \| DM_TESTF_SCAN_FDT);