Eric Lee / smarc-uboot

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Commit 5df092d7816eb59e6549f8332860ad9a3020eacd

Authored by Wolfgang Denk
1 parent 9c62815bf7
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

ARM: remove broken "shannon" board. 

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Rolf Offermanns <rof@sysgo.de>

Showing 10 changed files with 1 additions and 968 deletions Side-by-side Diff

... ... @@ -746,10 +746,6 @@
746 746  
747 747 am3517_crane ARM ARMV7 (AM35x SoC)
748 748  
749   -Rolf Offermanns <rof@sysgo.de>
750   -
751   - shannon SA1100
752   -
753 749 Kyungmin Park <kyungmin.park@samsung.com>
754 750  
755 751 apollon ARM1136EJS
board/shannon/Makefile
View file @ 5df092d
1   -#
2   -# (C) Copyright 2000-2006
3   -# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4   -#
5   -# See file CREDITS for list of people who contributed to this
6   -# project.
7   -#
8   -# This program is free software; you can redistribute it and/or
9   -# modify it under the terms of the GNU General Public License as
10   -# published by the Free Software Foundation; either version 2 of
11   -# the License, or (at your option) any later version.
12   -#
13   -# This program is distributed in the hope that it will be useful,
14   -# but WITHOUT ANY WARRANTY; without even the implied warranty of
15   -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16   -# GNU General Public License for more details.
17   -#
18   -# You should have received a copy of the GNU General Public License
19   -# along with this program; if not, write to the Free Software
20   -# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21   -# MA 02111-1307 USA
22   -#
23   -
24   -include $(TOPDIR)/config.mk
25   -
26   -LIB = $(obj)lib$(BOARD).o
27   -
28   -COBJS := shannon.o flash.o
29   -SOBJS := lowlevel_init.o
30   -
31   -SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
32   -OBJS := $(addprefix $(obj),$(COBJS))
33   -SOBJS := $(addprefix $(obj),$(SOBJS))
34   -
35   -$(LIB): $(obj).depend $(OBJS) $(SOBJS)
36   - $(call cmd_link_o_target, $(OBJS) $(SOBJS))
37   -
38   -clean:
39   - rm -f $(SOBJS) $(OBJS)
40   -
41   -distclean: clean
42   - rm -f $(LIB) core *.bak $(obj).depend
43   -
44   -#########################################################################
45   -
46   -# defines $(obj).depend target
47   -include $(SRCTREE)/rules.mk
48   -
49   -sinclude $(obj).depend
50   -
51   -#########################################################################
board/shannon/config.mk
View file @ 5df092d
1   -#
2   -# LART board with SA1100 cpu
3   -#
4   -# see http://www.lart.tudelft.nl/ for more information on LART
5   -#
6   -
7   -#
8   -# Tuxscreen has 4 banks of 4 MB DRAM each
9   -#
10   -# c000'0000
11   -# c800'0000
12   -# d000'0000
13   -# d800'0000
14   -#
15   -# Linux-Kernel is expected to be at c000'8000, entry c000'8000
16   -#
17   -# we load ourself to d838'0000, the upper 1 MB of the last (4th) bank
18   -#
19   -# download areas is c800'0000
20   -#
21   -
22   -
23   -CONFIG_SYS_TEXT_BASE = 0xd8380000
board/shannon/flash.c
View file @ 5df092d
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Alex Zuepke <azu@sysgo.de>
5   - *
6   - * See file CREDITS for list of people who contributed to this
7   - * project.
8   - *
9   - * This program is free software; you can redistribute it and/or
10   - * modify it under the terms of the GNU General Public License as
11   - * published by the Free Software Foundation; either version 2 of
12   - * the License, or (at your option) any later version.
13   - *
14   - * This program is distributed in the hope that it will be useful,
15   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
16   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17   - * GNU General Public License for more details.
18   - *
19   - * You should have received a copy of the GNU General Public License
20   - * along with this program; if not, write to the Free Software
21   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22   - * MA 02111-1307 USA
23   - */
24   -
25   -#include <common.h>
26   -
27   -ulong myflush(void);
28   -
29   -
30   -#define FLASH_BANK_SIZE 0x400000 /* 4 MB */
31   -#define MAIN_SECT_SIZE 0x20000 /* 128 KB */
32   -
33   -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
34   -
35   -
36   -#define CMD_READ_ARRAY 0x00F000F0
37   -#define CMD_UNLOCK1 0x00AA00AA
38   -#define CMD_UNLOCK2 0x00550055
39   -#define CMD_ERASE_SETUP 0x00800080
40   -#define CMD_ERASE_CONFIRM 0x00300030
41   -#define CMD_PROGRAM 0x00A000A0
42   -#define CMD_UNLOCK_BYPASS 0x00200020
43   -
44   -#define MEM_FLASH_ADDR1 (*(volatile u32 *)(CONFIG_SYS_FLASH_BASE + (0x00000555 << 2)))
45   -#define MEM_FLASH_ADDR2 (*(volatile u32 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA << 2)))
46   -
47   -#define BIT_ERASE_DONE 0x00800080
48   -#define BIT_RDY_MASK 0x00800080
49   -#define BIT_PROGRAM_ERROR 0x00200020
50   -#define BIT_TIMEOUT 0x80000000 /* our flag */
51   -
52   -#define READY 1
53   -#define ERR 2
54   -#define TMO 4
55   -
56   -/*-----------------------------------------------------------------------
57   - */
58   -
59   -ulong flash_init(void)
60   -{
61   - int i, j;
62   - ulong size = 0;
63   -
64   - for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
65   - {
66   - ulong flashbase = 0;
67   - flash_info[i].flash_id =
68   - (AMD_MANUFACT & FLASH_VENDMASK) |
69   - (AMD_ID_LV160B & FLASH_TYPEMASK);
70   - flash_info[i].size = FLASH_BANK_SIZE;
71   - flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
72   - memset(flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
73   - if (i == 0)
74   - flashbase = PHYS_FLASH_1;
75   - else
76   - panic("configured too many flash banks!\n");
77   - for (j = 0; j < flash_info[i].sector_count; j++)
78   - {
79   -
80   - if (j <= 3)
81   - {
82   - /* 1st one is 32 KB */
83   - if (j == 0)
84   - {
85   - flash_info[i].start[j] = flashbase + 0;
86   - }
87   -
88   - /* 2nd and 3rd are both 16 KB */
89   - if ((j == 1) || (j == 2))
90   - {
91   - flash_info[i].start[j] = flashbase + 0x8000 + (j-1)*0x4000;
92   - }
93   -
94   - /* 4th 64 KB */
95   - if (j == 3)
96   - {
97   - flash_info[i].start[j] = flashbase + 0x10000;
98   - }
99   - }
100   - else
101   - {
102   - flash_info[i].start[j] = flashbase + (j - 3)*MAIN_SECT_SIZE;
103   - }
104   - }
105   - size += flash_info[i].size;
106   - }
107   -
108   - /*
109   - * Protect monitor and environment sectors
110   - * Inferno is complicated, it's hardware locked
111   - */
112   -#ifdef CONFIG_INFERNO
113   - /* first one, 0x00000 to 0x07fff */
114   - flash_protect(FLAG_PROTECT_SET,
115   - CONFIG_SYS_FLASH_BASE + 0x00000,
116   - CONFIG_SYS_FLASH_BASE + 0x08000 - 1,
117   - &flash_info[0]);
118   -
119   - /* third to 10th, 0x0c000 - 0xdffff */
120   - flash_protect(FLAG_PROTECT_SET,
121   - CONFIG_SYS_FLASH_BASE + 0x0c000,
122   - CONFIG_SYS_FLASH_BASE + 0xe0000 - 1,
123   - &flash_info[0]);
124   -#else
125   - flash_protect(FLAG_PROTECT_SET,
126   - CONFIG_SYS_FLASH_BASE,
127   - CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1,
128   - &flash_info[0]);
129   -
130   - flash_protect(FLAG_PROTECT_SET,
131   - CONFIG_ENV_ADDR,
132   - CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1,
133   - &flash_info[0]);
134   -#endif
135   - return size;
136   -}
137   -
138   -/*-----------------------------------------------------------------------
139   - */
140   -void flash_print_info (flash_info_t *info)
141   -{
142   - int i;
143   -
144   - switch (info->flash_id & FLASH_VENDMASK)
145   - {
146   - case (AMD_MANUFACT & FLASH_VENDMASK):
147   - printf("AMD: ");
148   - break;
149   - default:
150   - printf("Unknown Vendor ");
151   - break;
152   - }
153   -
154   - switch (info->flash_id & FLASH_TYPEMASK)
155   - {
156   - case (AMD_ID_LV160B & FLASH_TYPEMASK):
157   - printf("2x Amd29F160BB (16Mbit)\n");
158   - break;
159   - default:
160   - printf("Unknown Chip Type\n");
161   - goto Done;
162   - break;
163   - }
164   -
165   - printf(" Size: %ld MB in %d Sectors\n",
166   - info->size >> 20, info->sector_count);
167   -
168   - printf(" Sector Start Addresses:");
169   - for (i = 0; i < info->sector_count; i++)
170   - {
171   - if ((i % 5) == 0)
172   - {
173   - printf ("\n ");
174   - }
175   - printf (" %08lX%s", info->start[i],
176   - info->protect[i] ? " (RO)" : " ");
177   - }
178   - printf ("\n");
179   -
180   -Done:
181   - ;
182   -}
183   -
184   -/*-----------------------------------------------------------------------
185   - */
186   -
187   -int flash_erase (flash_info_t *info, int s_first, int s_last)
188   -{
189   - ulong result;
190   - int iflag, cflag, prot, sect;
191   - int rc = ERR_OK;
192   - int chip1, chip2;
193   - ulong start;
194   -
195   - /* first look for protection bits */
196   -
197   - if (info->flash_id == FLASH_UNKNOWN)
198   - return ERR_UNKNOWN_FLASH_TYPE;
199   -
200   - if ((s_first < 0) || (s_first > s_last)) {
201   - return ERR_INVAL;
202   - }
203   -
204   - if ((info->flash_id & FLASH_VENDMASK) !=
205   - (AMD_MANUFACT & FLASH_VENDMASK)) {
206   - return ERR_UNKNOWN_FLASH_VENDOR;
207   - }
208   -
209   - prot = 0;
210   - for (sect=s_first; sect<=s_last; ++sect) {
211   - if (info->protect[sect]) {
212   - prot++;
213   - }
214   - }
215   - if (prot)
216   - return ERR_PROTECTED;
217   -
218   - /*
219   - * Disable interrupts which might cause a timeout
220   - * here. Remember that our exception vectors are
221   - * at address 0 in the flash, and we don't want a
222   - * (ticker) exception to happen while the flash
223   - * chip is in programming mode.
224   - */
225   - cflag = icache_status();
226   - icache_disable();
227   - iflag = disable_interrupts();
228   -
229   - /* Start erase on unprotected sectors */
230   - for (sect = s_first; sect<=s_last && !ctrlc(); sect++)
231   - {
232   - printf("Erasing sector %2d ... ", sect);
233   -
234   - /* arm simple, non interrupt dependent timer */
235   - start = get_timer(0);
236   -
237   - if (info->protect[sect] == 0)
238   - { /* not protected */
239   - vu_long *addr = (vu_long *)(info->start[sect]);
240   -
241   - MEM_FLASH_ADDR1 = CMD_UNLOCK1;
242   - MEM_FLASH_ADDR2 = CMD_UNLOCK2;
243   - MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
244   -
245   - MEM_FLASH_ADDR1 = CMD_UNLOCK1;
246   - MEM_FLASH_ADDR2 = CMD_UNLOCK2;
247   - *addr = CMD_ERASE_CONFIRM;
248   -
249   - /* wait until flash is ready */
250   - chip1 = chip2 = 0;
251   -
252   - do
253   - {
254   - result = *addr;
255   -
256   - /* check timeout */
257   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
258   - {
259   - MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
260   - chip1 = TMO;
261   - break;
262   - }
263   -
264   - if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE)
265   - chip1 = READY;
266   -
267   - if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR)
268   - chip1 = ERR;
269   -
270   - if (!chip2 && (result >> 16) & BIT_ERASE_DONE)
271   - chip2 = READY;
272   -
273   - if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR)
274   - chip2 = ERR;
275   -
276   - } while (!chip1 || !chip2);
277   -
278   - MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
279   -
280   - if (chip1 == ERR || chip2 == ERR)
281   - {
282   - rc = ERR_PROG_ERROR;
283   - goto outahere;
284   - }
285   - if (chip1 == TMO)
286   - {
287   - rc = ERR_TIMOUT;
288   - goto outahere;
289   - }
290   -
291   - printf("ok.\n");
292   - }
293   - else /* it was protected */
294   - {
295   - printf("protected!\n");
296   - }
297   - }
298   -
299   - if (ctrlc())
300   - printf("User Interrupt!\n");
301   -
302   -outahere:
303   - /* allow flash to settle - wait 10 ms */
304   - udelay_masked(10000);
305   -
306   - if (iflag)
307   - enable_interrupts();
308   -
309   - if (cflag)
310   - icache_enable();
311   -
312   - return rc;
313   -}
314   -
315   -/*-----------------------------------------------------------------------
316   - * Copy memory to flash
317   - */
318   -
319   -static int write_word (flash_info_t *info, ulong dest, ulong data)
320   -{
321   - vu_long *addr = (vu_long *)dest;
322   - ulong result;
323   - int rc = ERR_OK;
324   - int cflag, iflag;
325   - int chip1, chip2;
326   - ulong start;
327   -
328   - /*
329   - * Check if Flash is (sufficiently) erased
330   - */
331   - result = *addr;
332   - if ((result & data) != data)
333   - return ERR_NOT_ERASED;
334   -
335   -
336   - /*
337   - * Disable interrupts which might cause a timeout
338   - * here. Remember that our exception vectors are
339   - * at address 0 in the flash, and we don't want a
340   - * (ticker) exception to happen while the flash
341   - * chip is in programming mode.
342   - */
343   - cflag = icache_status();
344   - icache_disable();
345   - iflag = disable_interrupts();
346   -
347   - MEM_FLASH_ADDR1 = CMD_UNLOCK1;
348   - MEM_FLASH_ADDR2 = CMD_UNLOCK2;
349   - MEM_FLASH_ADDR1 = CMD_UNLOCK_BYPASS;
350   - *addr = CMD_PROGRAM;
351   - *addr = data;
352   -
353   - /* arm simple, non interrupt dependent timer */
354   - start = get_timer(0);
355   -
356   - /* wait until flash is ready */
357   - chip1 = chip2 = 0;
358   - do
359   - {
360   - result = *addr;
361   -
362   - /* check timeout */
363   - if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT)
364   - {
365   - chip1 = ERR | TMO;
366   - break;
367   - }
368   - if (!chip1 && ((result & 0x80) == (data & 0x80)))
369   - chip1 = READY;
370   -
371   - if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR))
372   - {
373   - result = *addr;
374   -
375   - if ((result & 0x80) == (data & 0x80))
376   - chip1 = READY;
377   - else
378   - chip1 = ERR;
379   - }
380   -
381   - if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16))))
382   - chip2 = READY;
383   -
384   - if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR))
385   - {
386   - result = *addr;
387   -
388   - if ((result & (0x80 << 16)) == (data & (0x80 << 16)))
389   - chip2 = READY;
390   - else
391   - chip2 = ERR;
392   - }
393   -
394   - } while (!chip1 || !chip2);
395   -
396   - *addr = CMD_READ_ARRAY;
397   -
398   - if (chip1 == ERR || chip2 == ERR || *addr != data)
399   - rc = ERR_PROG_ERROR;
400   -
401   - if (iflag)
402   - enable_interrupts();
403   -
404   - if (cflag)
405   - icache_enable();
406   -
407   - return rc;
408   -}
409   -
410   -/*-----------------------------------------------------------------------
411   - * Copy memory to flash.
412   - */
413   -
414   -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
415   -{
416   - ulong cp, wp, data;
417   - int l;
418   - int i, rc;
419   -
420   - wp = (addr & ~3); /* get lower word aligned address */
421   -
422   - /*
423   - * handle unaligned start bytes
424   - */
425   - if ((l = addr - wp) != 0) {
426   - data = 0;
427   - for (i=0, cp=wp; i<l; ++i, ++cp) {
428   - data = (data >> 8) | (*(uchar *)cp << 24);
429   - }
430   - for (; i<4 && cnt>0; ++i) {
431   - data = (data >> 8) | (*src++ << 24);
432   - --cnt;
433   - ++cp;
434   - }
435   - for (; cnt==0 && i<4; ++i, ++cp) {
436   - data = (data >> 8) | (*(uchar *)cp << 24);
437   - }
438   -
439   - if ((rc = write_word(info, wp, data)) != 0) {
440   - return (rc);
441   - }
442   - wp += 4;
443   - }
444   -
445   - /*
446   - * handle word aligned part
447   - */
448   - while (cnt >= 4) {
449   - data = *((vu_long*)src);
450   - if ((rc = write_word(info, wp, data)) != 0) {
451   - return (rc);
452   - }
453   - src += 4;
454   - wp += 4;
455   - cnt -= 4;
456   - }
457   -
458   - if (cnt == 0) {
459   - return ERR_OK;
460   - }
461   -
462   - /*
463   - * handle unaligned tail bytes
464   - */
465   - data = 0;
466   - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
467   - data = (data >> 8) | (*src++ << 24);
468   - --cnt;
469   - }
470   - for (; i<4; ++i, ++cp) {
471   - data = (data >> 8) | (*(uchar *)cp << 24);
472   - }
473   -
474   - return write_word(info, wp, data);
475   -}
board/shannon/inferno.header
View file @ 5df092d
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board/shannon/lowlevel_init.S
View file @ 5df092d
1   -/*
2   - * Memory Setup stuff - taken from blob memsetup.S
3   - *
4   - * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
5   - * Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
6   - *
7   - * See file CREDITS for list of people who contributed to this
8   - * project.
9   - *
10   - * This program is free software; you can redistribute it and/or
11   - * modify it under the terms of the GNU General Public License as
12   - * published by the Free Software Foundation; either version 2 of
13   - * the License, or (at your option) any later version.
14   - *
15   - * This program is distributed in the hope that it will be useful,
16   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
17   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18   - * GNU General Public License for more details.
19   - *
20   - * You should have received a copy of the GNU General Public License
21   - * along with this program; if not, write to the Free Software
22   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23   - * MA 02111-1307 USA
24   - */
25   -
26   -
27   -#include <config.h>
28   -#include <version.h>
29   -
30   -
31   -/* some parameters for the board */
32   -
33   -MEM_BASE: .long 0xa0000000
34   -MEM_START: .long 0xc0000000
35   -
36   -#define MDCNFG 0x00
37   -#define MDCAS0 0x04
38   -#define MDCAS1 0x08
39   -#define MDCAS2 0x0c
40   -#define MSC0 0x10
41   -#define MSC1 0x14
42   -#define MECR 0x18
43   -
44   -mdcas0: .long 0xc71c703f @ cccccccf
45   -mdcas1: .long 0xffc71c71 @ fffffffc
46   -mdcas2: .long 0xffffffff @ ffffffff
47   -mdcnfg: .long 0x0334b21f @ 9326991f
48   -msc0: .long 0xfff84458 @ 42304230
49   -msc1: .long 0xffffffff @ 20182018
50   -mecr: .long 0x7fff7fff @ 01000000
51   -
52   -/* setting up the memory */
53   -
54   -.globl lowlevel_init
55   -lowlevel_init:
56   - ldr r0, MEM_BASE
57   -
58   - /* Setup the flash memory */
59   - ldr r1, msc0
60   - str r1, [r0, #MSC0]
61   -
62   - /* Set up the DRAM */
63   -
64   - /* MDCAS0 */
65   - ldr r1, mdcas0
66   - str r1, [r0, #MDCAS0]
67   -
68   - /* MDCAS1 */
69   - ldr r1, mdcas1
70   - str r1, [r0, #MDCAS1]
71   -
72   - /* MDCAS2 */
73   - ldr r1, mdcas2
74   - str r1, [r0, #MDCAS2]
75   -
76   - /* MDCNFG */
77   - ldr r1, mdcnfg
78   - str r1, [r0, #MDCNFG]
79   -
80   - /* Set up PCMCIA space */
81   - ldr r1, mecr
82   - str r1, [r0, #MECR]
83   -
84   - /* Load something to activate bank */
85   - ldr r1, MEM_START
86   -
87   -.rept 8
88   - ldr r0, [r1]
89   -.endr
90   -
91   - /* everything is fine now */
92   - mov pc, lr
board/shannon/shannon.c
View file @ 5df092d
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Alex Zuepke <azu@sysgo.de>
5   - *
6   - * See file CREDITS for list of people who contributed to this
7   - * project.
8   - *
9   - * This program is free software; you can redistribute it and/or
10   - * modify it under the terms of the GNU General Public License as
11   - * published by the Free Software Foundation; either version 2 of
12   - * the License, or (at your option) any later version.
13   - *
14   - * This program is distributed in the hope that it will be useful,
15   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
16   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17   - * GNU General Public License for more details.
18   - *
19   - * You should have received a copy of the GNU General Public License
20   - * along with this program; if not, write to the Free Software
21   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22   - * MA 02111-1307 USA
23   - */
24   -
25   -#include <common.h>
26   -
27   -DECLARE_GLOBAL_DATA_PTR;
28   -
29   -/*
30   - * Miscelaneous platform dependent initialisations
31   - */
32   -
33   -int board_init (void)
34   -{
35   - /* memory and cpu-speed are setup before relocation */
36   - /* but if we use InfernoLoader, we must do some inits here */
37   -
38   -#ifdef CONFIG_INFERNO
39   - {
40   - unsigned long temp;
41   - __asm__ __volatile__(/* disable MMU, enable icache */
42   - "mrc p15, 0, %0, c1, c0\n"
43   - "bic %0, %0, #0x00002000\n"
44   - "bic %0, %0, #0x0000000f\n"
45   - "orr %0, %0, #0x00001000\n"
46   - "orr %0, %0, #0x00000002\n"
47   - "mcr p15, 0, %0, c1, c0\n"
48   - /* flush caches */
49   - "mov %0, #0\n"
50   - "mcr p15, 0, %0, c7, c7, 0\n"
51   - "mcr p15, 0, %0, c8, c7, 0\n"
52   - : "=r" (temp)
53   - :
54   - : "memory");
55   - /* setup PCMCIA timing */
56   - temp = 0xa0000018;
57   - *(unsigned long *)temp = 0x00060006;
58   -
59   - }
60   -#endif /* CONFIG_INFERNO */
61   -
62   - /* arch number for shannon */
63   - gd->bd->bi_arch_number = MACH_TYPE_SHANNON;
64   -
65   - /* adress of boot parameters */
66   - gd->bd->bi_boot_params = 0xc0000100;
67   -
68   - return 0;
69   -}
70   -
71   -int dram_init (void)
72   -{
73   -#if defined(PHYS_SDRAM_1) || defined(PHYS_SDRAM_2) || \
74   - defined(PHYS_SDRAM_3) || defined(PHYS_SDRAM_4)
75   - bd_t *bd = gd->bd;
76   -#endif
77   -
78   -#ifdef PHYS_SDRAM_1
79   - bd->bi_dram[0].start = PHYS_SDRAM_1;
80   - bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
81   -#endif
82   -
83   -#ifdef PHYS_SDRAM_2
84   - bd->bi_dram[1].start = PHYS_SDRAM_2;
85   - bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
86   -#endif
87   -
88   -#ifdef PHYS_SDRAM_3
89   - bd->bi_dram[2].start = PHYS_SDRAM_3;
90   - bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
91   -#endif
92   -
93   -#ifdef PHYS_SDRAM_4
94   - bd->bi_dram[3].start = PHYS_SDRAM_4;
95   - bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
96   -#endif
97   -
98   - return (0);
99   -}
... ... @@ -217,7 +217,6 @@
217 217 zipitz2 arm pxa
218 218 zylonite arm pxa
219 219 jornada arm sa1100
220   -shannon arm sa1100
221 220 atngw100 avr32 at32ap - atmel at32ap700x
222 221 atstk1002 avr32 at32ap atstk1000 atmel at32ap700x
223 222 atstk1003 avr32 at32ap atstk1000 atmel at32ap700x
doc/README.scrapyard
Diff comments   View file @ 5df092d
... ... @@ -11,6 +11,7 @@
11 11  
12 12 Board Arch CPU removed Commit last known maintainer/contact
13 13 =============================================================================
  14 +shannon arm sa1100 - 2011-09-05 Rolf Offermanns <rof@sysgo.de>
14 15 modnet50 arm arm720t - 2011-09-05 Thomas Elste <info@elste.org>
15 16 lpc2292sodimm arm arm720t - 2011-09-05
16 17 lart arm sa1100 - 2011-09-05 Alex Zรผpke <azu@sysgo.de>
include/configs/shannon.h
View file @ 5df092d
1   -/*
2   - * (C) Copyright 2002
3   - * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4   - * Alex Zuepke <azu@sysgo.de>
5   - *
6   - * Configuation settings for the Shannon/TuxScreen/IS2630 WebPhone Board.
7   - *
8   - * See file CREDITS for list of people who contributed to this
9   - * project.
10   - *
11   - * This program is free software; you can redistribute it and/or
12   - * modify it under the terms of the GNU General Public License as
13   - * published by the Free Software Foundation; either version 2 of
14   - * the License, or (at your option) any later version.
15   - *
16   - * This program is distributed in the hope that it will be useful,
17   - * but WITHOUT ANY WARRANTY; without even the implied warranty of
18   - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19   - * GNU General Public License for more details.
20   - *
21   - * You should have received a copy of the GNU General Public License
22   - * along with this program; if not, write to the Free Software
23   - * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24   - * MA 02111-1307 USA
25   - */
26   -
27   -#ifndef __CONFIG_H
28   -#define __CONFIG_H
29   -
30   -/*
31   - * Since we use the Inferno-Loader to bring us to live,
32   - * we skip the lowlevel init stuff.
33   - * But U-Boot still relocates itself into RAM
34   - */
35   -#define CONFIG_INFERNO /* we are using the inferno bootldr */
36   -#define CONFIG_SKIP_LOWLEVEL_INIT 1
37   -
38   -/*
39   - * High Level Configuration Options
40   - * (easy to change)
41   - */
42   -#define CONFIG_SA1100 1 /* This is an SA1100 CPU */
43   -#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */
44   -
45   -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
46   -/* we will never enable dcache, because we have to setup MMU first */
47   -#define CONFIG_SYS_DCACHE_OFF
48   -
49   -/*
50   - * Size of malloc() pool
51   - */
52   -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
53   -
54   -/*
55   - * Hardware drivers
56   - */
57   -#define CONFIG_DRIVER_3C589 1
58   -
59   -/*
60   - * select serial console configuration
61   - */
62   -#define CONFIG_SA1100_SERIAL
63   -#define CONFIG_SERIAL3 1 /* we use SERIAL 3 */
64   -
65   -/* allow to overwrite serial and ethaddr */
66   -#define CONFIG_ENV_OVERWRITE
67   -
68   -#define CONFIG_BAUDRATE 115200
69   -
70   -
71   -/*
72   - * BOOTP options
73   - */
74   -#define CONFIG_BOOTP_BOOTFILESIZE
75   -#define CONFIG_BOOTP_BOOTPATH
76   -#define CONFIG_BOOTP_GATEWAY
77   -#define CONFIG_BOOTP_HOSTNAME
78   -
79   -
80   -/*
81   - * Command line configuration.
82   - */
83   -#include <config_cmd_default.h>
84   -
85   -
86   -#define CONFIG_BOOTDELAY 3
87   -#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
88   -#define CONFIG_NETMASK 255.255.0.0
89   -#define CONFIG_BOOTCOMMAND "help"
90   -
91   -#if defined(CONFIG_CMD_KGDB)
92   -#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
93   -#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
94   -#endif
95   -
96   -/*
97   - * Miscellaneous configurable options
98   - */
99   -#define CONFIG_SYS_LONGHELP /* undef to save memory */
100   -#define CONFIG_SYS_PROMPT "TuxScreen # " /* Monitor Command Prompt */
101   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
102   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
103   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
104   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
105   -
106   -#define CONFIG_SYS_MEMTEST_START 0xc0400000 /* memtest works on */
107   -#define CONFIG_SYS_MEMTEST_END 0xc0800000 /* 4 ... 8 MB in DRAM */
108   -
109   -#define CONFIG_SYS_LOAD_ADDR 0xd0000000 /* default load address */
110   -
111   -#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
112   -#define CONFIG_SYS_CPUSPEED 0x09 /* 190 MHz for Shannon */
113   -
114   - /* valid baudrates */
115   -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
116   -
117   -#define CONFIG_DOS_PARTITION 1 /* DOS partitiion support */
118   -
119   -/*-----------------------------------------------------------------------
120   - * Stack sizes
121   - *
122   - * The stack sizes are set up in start.S using the settings below
123   - */
124   -#define CONFIG_STACKSIZE (128*1024) /* regular stack */
125   -#ifdef CONFIG_USE_IRQ
126   -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
127   -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
128   -#endif
129   -
130   -/*-----------------------------------------------------------------------
131   - * Physical Memory Map
132   - */
133   -/* BE CAREFUL */
134   -#define CONFIG_NR_DRAM_BANKS 4 /* we have 4 banks of EDORAM */
135   -#define PHYS_SDRAM_1 0xc0000000 /* RAM Bank #1 */
136   -#define PHYS_SDRAM_1_SIZE 0x00400000 /* 4 MB */
137   -#define PHYS_SDRAM_2 0xc8000000 /* RAM Bank #2 */
138   -#define PHYS_SDRAM_2_SIZE 0x00400000 /* 4 MB */
139   -#define PHYS_SDRAM_3 0xd0000000 /* RAM Bank #3 */
140   -#define PHYS_SDRAM_3_SIZE 0x00400000 /* 4 MB */
141   -#define PHYS_SDRAM_4 0xd8000000 /* RAM Bank #4 */
142   -#define PHYS_SDRAM_4_SIZE 0x00400000 /* 4 MB */
143   -
144   -
145   -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
146   -#define PHYS_FLASH_SIZE 0x00400000 /* 4 MB */
147   -
148   -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
149   -
150   -/*-----------------------------------------------------------------------
151   - * FLASH and environment organization
152   - */
153   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
154   -#define CONFIG_SYS_MAX_FLASH_SECT (31+4) /* max number of sectors on one chip */
155   -
156   -/* timeout values are in ticks */
157   -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
158   -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */
159   -
160   -#define CONFIG_ENV_IS_IN_FLASH 1
161   -#ifdef CONFIG_INFERNO
162   -/* we take the last sector, 128 KB in size, but we only use 16 KB of it for stack reasons */
163   -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x003E0000) /* Addr of Environment Sector */
164   -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
165   -#define CONFIG_ENV_SECT_SIZE (128 << 10) /* size of environment sector */
166   -#else
167   -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x1C000) /* Addr of Environment Sector */
168   -#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment */
169   -#endif
170   -
171   -/*-----------------------------------------------------------------------
172   - * PCMCIA stuff
173   - *-----------------------------------------------------------------------
174   - *
175   - */
176   -
177   -/* we pick the upper one */
178   -
179   -#define CONFIG_PCMCIA_SLOT_A
180   -
181   -#define CONFIG_SYS_PCMCIA_IO_ADDR (0x20000000)
182   -#define CONFIG_SYS_PCMCIA_IO_SIZE ( 64 << 20 )
183   -#define CONFIG_SYS_PCMCIA_DMA_ADDR (0x24000000)
184   -#define CONFIG_SYS_PCMCIA_DMA_SIZE ( 64 << 20 )
185   -#define CONFIG_SYS_PCMCIA_ATTRB_ADDR (0x2C000000)
186   -#define CONFIG_SYS_PCMCIA_ATTRB_SIZE ( 64 << 20 )
187   -#define CONFIG_SYS_PCMCIA_MEM_ADDR (0x28000000)
188   -#define CONFIG_SYS_PCMCIA_MEM_SIZE ( 64 << 20 )
189   -
190   -/* in fact, MEM and ATTRB are swapped - has to be corrected soon in cmd_pcmcia or so */
191   -
192   -/*-----------------------------------------------------------------------
193   - * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
194   - *-----------------------------------------------------------------------
195   - */
196   -
197   -#define CONFIG_IDE_PCCARD 1 /* Use IDE with PC Card Adapter */
198   -
199   -#undef CONFIG_IDE_PCMCIA /* Direct IDE not supported */
200   -#undef CONFIG_IDE_LED /* LED for ide not supported */
201   -#undef CONFIG_IDE_RESET /* reset for ide not supported */
202   -
203   -#define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
204   -#define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 1 drive per IDE bus */
205   -
206   -#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
207   -
208   -/* it's simple, all regs are in I/O space */
209   -#define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_PCMCIA_ATTRB_ADDR
210   -
211   -/* Offset for data I/O */
212   -#define CONFIG_SYS_ATA_DATA_OFFSET 0
213   -
214   -/* Offset for normal register accesses */
215   -#define CONFIG_SYS_ATA_REG_OFFSET 0
216   -
217   -/* Offset for alternate registers */
218   -#define CONFIG_SYS_ATA_ALT_OFFSET 0
219   -
220   -/*-----------------------------------------------------------------------
221   - */
222   -
223   -#endif /* __CONFIG_H */