Eric Lee / smarc-uboot

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Commit 5e9b15034b9e38a6908610229788cf0746d138fc

Authored by Simon Glass
1 parent 57db8c6d87
Exists in v2017.01-smarct4x and in 25 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2017.01-smarct3x, v2017.01-smarct3x-emmc

rockchip: Rename jerry files to veyron 

At present we have a single rk3288-based Chromebook: chromebook_jerry. But
all such Chromebooks can use the same binary with only device-tree
differences. The family name is 'veyron', so rename the files accordingly.

Also update the device-tree filename since this currently differs from
Linux.

Signed-off-by: Simon Glass <sjg@chromium.org>

Showing 15 changed files with 268 additions and 268 deletions Side-by-side Diff

arch/arm/dts/Makefile
Diff comments   View file @ 5e9b150
... ... @@ -30,7 +30,7 @@
30 30 dtb-$(CONFIG_ARCH_ROCKCHIP) += \
31 31 rk3036-sdk.dtb \
32 32 rk3288-firefly.dtb \
33   - rk3288-jerry.dtb \
  33 + rk3288-veyron-jerry.dtb \
34 34 rk3288-rock2-square.dtb \
35 35 rk3288-evb.dtb \
36 36 rk3288-fennec.dtb \
arch/arm/dts/rk3288-jerry.dts
View file @ 5e9b150
1   -/*
2   - * Google Veyron Jerry Rev 3+ board device tree source
3   - *
4   - * Copyright 2014 Google, Inc
5   - *
6   - * SPDX-License-Identifier: GPL-2.0
7   - */
8   -
9   -/dts-v1/;
10   -#include "rk3288-veyron-chromebook.dtsi"
11   -#include "cros-ec-sbs.dtsi"
12   -
13   -/ {
14   - model = "Google Jerry";
15   - compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
16   - "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
17   - "google,veyron-jerry-rev3", "google,veyron-jerry",
18   - "google,veyron", "rockchip,rk3288";
19   -
20   - chosen {
21   - stdout-path = &uart2;
22   - };
23   -
24   - panel_regulator: panel-regualtor {
25   - compatible = "regulator-fixed";
26   - enable-active-high;
27   - gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
28   - pinctrl-names = "default";
29   - pinctrl-0 = <&lcd_enable_h>;
30   - regulator-name = "panel_regulator";
31   - vin-supply = <&vcc33_sys>;
32   - };
33   -
34   - vcc18_lcd: vcc18-lcd {
35   - compatible = "regulator-fixed";
36   - enable-active-high;
37   - gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
38   - pinctrl-names = "default";
39   - pinctrl-0 = <&avdd_1v8_disp_en>;
40   - regulator-name = "vcc18_lcd";
41   - regulator-always-on;
42   - regulator-boot-on;
43   - vin-supply = <&vcc18_wl>;
44   - };
45   -
46   - backlight_regulator: backlight-regulator {
47   - compatible = "regulator-fixed";
48   - enable-active-high;
49   - gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
50   - pinctrl-names = "default";
51   - pinctrl-0 = <&bl_pwr_en>;
52   - regulator-name = "backlight_regulator";
53   - vin-supply = <&vcc33_sys>;
54   - startup-delay-us = <15000>;
55   - };
56   -};
57   -
58   -&gpio_keys {
59   - power {
60   - gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
61   - };
62   -};
63   -
64   -&backlight {
65   - power-supply = <&backlight_regulator>;
66   -};
67   -
68   -&panel {
69   - power-supply= <&panel_regulator>;
70   -};
71   -
72   -&rk808 {
73   - pinctrl-names = "default";
74   - pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
75   - dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
76   - <&gpio7 15 GPIO_ACTIVE_HIGH>;
77   -
78   - regulators {
79   - mic_vcc: LDO_REG2 {
80   - regulator-always-on;
81   - regulator-boot-on;
82   - regulator-min-microvolt = <1800000>;
83   - regulator-max-microvolt = <1800000>;
84   - regulator-name = "mic_vcc";
85   - regulator-suspend-mem-disabled;
86   - };
87   - };
88   -};
89   -
90   -&sdmmc {
91   - pinctrl-names = "default";
92   - pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
93   - &sdmmc_bus4>;
94   - disable-wp;
95   -};
96   -
97   -&vcc_5v {
98   - enable-active-high;
99   - gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
100   - pinctrl-names = "default";
101   - pinctrl-0 = <&drv_5v>;
102   -};
103   -
104   -&vcc50_hdmi {
105   - enable-active-high;
106   - gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
107   - pinctrl-names = "default";
108   - pinctrl-0 = <&vcc50_hdmi_en>;
109   -};
110   -
111   -&edp {
112   - pinctrl-names = "default";
113   - pinctrl-0 = <&edp_hpd>;
114   -};
115   -
116   -&pinctrl {
117   - backlight {
118   - bl_pwr_en: bl_pwr_en {
119   - rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
120   - };
121   - };
122   -
123   - buck-5v {
124   - drv_5v: drv-5v {
125   - rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
126   - };
127   - };
128   -
129   - edp {
130   - edp_hpd: edp_hpd {
131   - rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
132   - };
133   - };
134   -
135   - emmc {
136   - /* Make sure eMMC is not in reset */
137   - emmc_deassert_reset: emmc-deassert-reset {
138   - rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
139   - };
140   - };
141   -
142   - hdmi {
143   - vcc50_hdmi_en: vcc50-hdmi-en {
144   - rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
145   - };
146   - };
147   -
148   - lcd {
149   - lcd_enable_h: lcd-en {
150   - rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
151   - };
152   -
153   - avdd_1v8_disp_en: avdd-1v8-disp-en {
154   - rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
155   - };
156   - };
157   -
158   - pmic {
159   - dvs_1: dvs-1 {
160   - rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
161   - };
162   -
163   - dvs_2: dvs-2 {
164   - rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
165   - };
166   - };
167   -};
168   -
169   -&i2c4 {
170   - status = "okay";
171   -
172   - /*
173   - * Trackpad pin control is shared between Elan and Synaptics devices
174   - * so we have to pull it up to the bus level.
175   - */
176   - pinctrl-names = "default";
177   - pinctrl-0 = <&i2c4_xfer &trackpad_int>;
178   -
179   - trackpad@15 {
180   - compatible = "elan,i2c_touchpad";
181   - interrupt-parent = <&gpio7>;
182   - interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
183   - /*
184   - * Remove the inherited pinctrl settings to avoid clashing
185   - * with bus-wide ones.
186   - */
187   - /delete-property/pinctrl-names;
188   - /delete-property/pinctrl-0;
189   - reg = <0x15>;
190   - vcc-supply = <&vcc33_io>;
191   - wakeup-source;
192   - };
193   -
194   - trackpad@2c {
195   - compatible = "hid-over-i2c";
196   - interrupt-parent = <&gpio7>;
197   - interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
198   - reg = <0x2c>;
199   - hid-descr-addr = <0x0020>;
200   - vcc-supply = <&vcc33_io>;
201   - wakeup-source;
202   - };
203   -};
arch/arm/dts/rk3288-veyron-jerry.dts
Diff comments   View file @ 5e9b150
  1 +/*
  2 + * Google Veyron Jerry Rev 3+ board device tree source
  3 + *
  4 + * Copyright 2014 Google, Inc
  5 + *
  6 + * SPDX-License-Identifier: GPL-2.0
  7 + */
  8 +
  9 +/dts-v1/;
  10 +#include "rk3288-veyron-chromebook.dtsi"
  11 +#include "cros-ec-sbs.dtsi"
  12 +
  13 +/ {
  14 + model = "Google Jerry";
  15 + compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
  16 + "google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
  17 + "google,veyron-jerry-rev3", "google,veyron-jerry",
  18 + "google,veyron", "rockchip,rk3288";
  19 +
  20 + chosen {
  21 + stdout-path = &uart2;
  22 + };
  23 +
  24 + panel_regulator: panel-regualtor {
  25 + compatible = "regulator-fixed";
  26 + enable-active-high;
  27 + gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
  28 + pinctrl-names = "default";
  29 + pinctrl-0 = <&lcd_enable_h>;
  30 + regulator-name = "panel_regulator";
  31 + vin-supply = <&vcc33_sys>;
  32 + };
  33 +
  34 + vcc18_lcd: vcc18-lcd {
  35 + compatible = "regulator-fixed";
  36 + enable-active-high;
  37 + gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
  38 + pinctrl-names = "default";
  39 + pinctrl-0 = <&avdd_1v8_disp_en>;
  40 + regulator-name = "vcc18_lcd";
  41 + regulator-always-on;
  42 + regulator-boot-on;
  43 + vin-supply = <&vcc18_wl>;
  44 + };
  45 +
  46 + backlight_regulator: backlight-regulator {
  47 + compatible = "regulator-fixed";
  48 + enable-active-high;
  49 + gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
  50 + pinctrl-names = "default";
  51 + pinctrl-0 = <&bl_pwr_en>;
  52 + regulator-name = "backlight_regulator";
  53 + vin-supply = <&vcc33_sys>;
  54 + startup-delay-us = <15000>;
  55 + };
  56 +};
  57 +
  58 +&gpio_keys {
  59 + power {
  60 + gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
  61 + };
  62 +};
  63 +
  64 +&backlight {
  65 + power-supply = <&backlight_regulator>;
  66 +};
  67 +
  68 +&panel {
  69 + power-supply= <&panel_regulator>;
  70 +};
  71 +
  72 +&rk808 {
  73 + pinctrl-names = "default";
  74 + pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
  75 + dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>,
  76 + <&gpio7 15 GPIO_ACTIVE_HIGH>;
  77 +
  78 + regulators {
  79 + mic_vcc: LDO_REG2 {
  80 + regulator-always-on;
  81 + regulator-boot-on;
  82 + regulator-min-microvolt = <1800000>;
  83 + regulator-max-microvolt = <1800000>;
  84 + regulator-name = "mic_vcc";
  85 + regulator-suspend-mem-disabled;
  86 + };
  87 + };
  88 +};
  89 +
  90 +&sdmmc {
  91 + pinctrl-names = "default";
  92 + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
  93 + &sdmmc_bus4>;
  94 + disable-wp;
  95 +};
  96 +
  97 +&vcc_5v {
  98 + enable-active-high;
  99 + gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
  100 + pinctrl-names = "default";
  101 + pinctrl-0 = <&drv_5v>;
  102 +};
  103 +
  104 +&vcc50_hdmi {
  105 + enable-active-high;
  106 + gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
  107 + pinctrl-names = "default";
  108 + pinctrl-0 = <&vcc50_hdmi_en>;
  109 +};
  110 +
  111 +&edp {
  112 + pinctrl-names = "default";
  113 + pinctrl-0 = <&edp_hpd>;
  114 +};
  115 +
  116 +&pinctrl {
  117 + backlight {
  118 + bl_pwr_en: bl_pwr_en {
  119 + rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
  120 + };
  121 + };
  122 +
  123 + buck-5v {
  124 + drv_5v: drv-5v {
  125 + rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
  126 + };
  127 + };
  128 +
  129 + edp {
  130 + edp_hpd: edp_hpd {
  131 + rockchip,pins = <7 11 RK_FUNC_2 &pcfg_pull_down>;
  132 + };
  133 + };
  134 +
  135 + emmc {
  136 + /* Make sure eMMC is not in reset */
  137 + emmc_deassert_reset: emmc-deassert-reset {
  138 + rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
  139 + };
  140 + };
  141 +
  142 + hdmi {
  143 + vcc50_hdmi_en: vcc50-hdmi-en {
  144 + rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
  145 + };
  146 + };
  147 +
  148 + lcd {
  149 + lcd_enable_h: lcd-en {
  150 + rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
  151 + };
  152 +
  153 + avdd_1v8_disp_en: avdd-1v8-disp-en {
  154 + rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
  155 + };
  156 + };
  157 +
  158 + pmic {
  159 + dvs_1: dvs-1 {
  160 + rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
  161 + };
  162 +
  163 + dvs_2: dvs-2 {
  164 + rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
  165 + };
  166 + };
  167 +};
  168 +
  169 +&i2c4 {
  170 + status = "okay";
  171 +
  172 + /*
  173 + * Trackpad pin control is shared between Elan and Synaptics devices
  174 + * so we have to pull it up to the bus level.
  175 + */
  176 + pinctrl-names = "default";
  177 + pinctrl-0 = <&i2c4_xfer &trackpad_int>;
  178 +
  179 + trackpad@15 {
  180 + compatible = "elan,i2c_touchpad";
  181 + interrupt-parent = <&gpio7>;
  182 + interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
  183 + /*
  184 + * Remove the inherited pinctrl settings to avoid clashing
  185 + * with bus-wide ones.
  186 + */
  187 + /delete-property/pinctrl-names;
  188 + /delete-property/pinctrl-0;
  189 + reg = <0x15>;
  190 + vcc-supply = <&vcc33_io>;
  191 + wakeup-source;
  192 + };
  193 +
  194 + trackpad@2c {
  195 + compatible = "hid-over-i2c";
  196 + interrupt-parent = <&gpio7>;
  197 + interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
  198 + reg = <0x2c>;
  199 + hid-descr-addr = <0x0020>;
  200 + vcc-supply = <&vcc33_io>;
  201 + wakeup-source;
  202 + };
  203 +};
arch/arm/mach-rockchip/rk3288/Kconfig
Diff comments   View file @ 5e9b150
... ... @@ -88,7 +88,7 @@
88 88  
89 89 source "board/firefly/firefly-rk3288/Kconfig"
90 90  
91   -source "board/google/chromebook_jerry/Kconfig"
  91 +source "board/google/veyron/Kconfig"
92 92  
93 93 source "board/radxa/rock2/Kconfig"
94 94  
board/google/chromebook_jerry/Kconfig
View file @ 5e9b150
1   -if TARGET_CHROMEBOOK_JERRY
2   -
3   -config SYS_BOARD
4   - default "chromebook_jerry"
5   -
6   -config SYS_VENDOR
7   - default "google"
8   -
9   -config SYS_CONFIG_NAME
10   - default "chromebook_jerry"
11   -
12   -config BOARD_SPECIFIC_OPTIONS # dummy
13   - def_bool y
14   -
15   -endif
board/google/chromebook_jerry/MAINTAINERS
View file @ 5e9b150
1   -CHROMEBOOK JERRY BOARD
2   -M: Simon Glass <sjg@chromium.org>
3   -S: Maintained
4   -F: board/google/chromebook_jerry/
5   -F: include/configs/chromebook_jerry.h
6   -F: configs/chromebook_jerry_defconfig
board/google/chromebook_jerry/Makefile
View file @ 5e9b150
1   -#
2   -# (C) Copyright 2015 Google, Inc
3   -#
4   -# SPDX-License-Identifier: GPL-2.0+
5   -#
6   -
7   -obj-y += jerry.o
board/google/chromebook_jerry/jerry.c
View file @ 5e9b150
1   -/*
2   - * (C) Copyright 2015 Google, Inc
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#include <common.h>
board/google/veyron/Kconfig
Diff comments   View file @ 5e9b150
  1 +if TARGET_CHROMEBOOK_JERRY
  2 +
  3 +config SYS_BOARD
  4 + default "veyron"
  5 +
  6 +config SYS_VENDOR
  7 + default "google"
  8 +
  9 +config SYS_CONFIG_NAME
  10 + default "veyron"
  11 +
  12 +config BOARD_SPECIFIC_OPTIONS # dummy
  13 + def_bool y
  14 +
  15 +endif
board/google/veyron/MAINTAINERS
Diff comments   View file @ 5e9b150
  1 +CHROMEBOOK JERRY BOARD
  2 +M: Simon Glass <sjg@chromium.org>
  3 +S: Maintained
  4 +F: board/google/veyron/
  5 +F: include/configs/veyron.h
  6 +F: configs/chromebook_jerry_defconfig
board/google/veyron/Makefile
Diff comments   View file @ 5e9b150
  1 +#
  2 +# (C) Copyright 2015 Google, Inc
  3 +#
  4 +# SPDX-License-Identifier: GPL-2.0+
  5 +#
  6 +
  7 +obj-y += veyron.o
board/google/veyron/veyron.c
Diff comments   View file @ 5e9b150
  1 +/*
  2 + * (C) Copyright 2015 Google, Inc
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#include <common.h>
configs/chromebook_jerry_defconfig
Diff comments   View file @ 5e9b150
... ... @@ -7,7 +7,7 @@
7 7 CONFIG_SPL_SPI_FLASH_SUPPORT=y
8 8 CONFIG_SPL_SPI_SUPPORT=y
9 9 CONFIG_SPL_STACK_R_ADDR=0x80000
10   -CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
  10 +CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry"
11 11 CONFIG_SILENT_CONSOLE=y
12 12 # CONFIG_DISPLAY_CPUINFO is not set
13 13 CONFIG_SPL_STACK_R=y
include/configs/chromebook_jerry.h
View file @ 5e9b150
1   -/*
2   - * (C) Copyright 2015 Google, Inc
3   - *
4   - * SPDX-License-Identifier: GPL-2.0+
5   - */
6   -
7   -#ifndef __CONFIG_H
8   -#define __CONFIG_H
9   -
10   -#define ROCKCHIP_DEVICE_SETTINGS \
11   - "stdin=serial,cros-ec-keyb\0" \
12   - "stdout=serial,vidconsole\0" \
13   - "stderr=serial,vidconsole\0"
14   -
15   -#include <configs/rk3288_common.h>
16   -
17   -#define CONFIG_ENV_IS_NOWHERE
18   -#define CONFIG_SPL_SPI_LOAD
19   -#define CONFIG_SPI_FLASH_GIGADEVICE
20   -
21   -#define CONFIG_CMD_SF_TEST
22   -
23   -#define CONFIG_KEYBOARD
24   -
25   -#define CONFIG_SYS_WHITE_ON_BLACK
26   -
27   -#endif
include/configs/veyron.h
Diff comments   View file @ 5e9b150
  1 +/*
  2 + * (C) Copyright 2015 Google, Inc
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 + */
  6 +
  7 +#ifndef __CONFIG_H
  8 +#define __CONFIG_H
  9 +
  10 +#define ROCKCHIP_DEVICE_SETTINGS \
  11 + "stdin=serial,cros-ec-keyb\0" \
  12 + "stdout=serial,vidconsole\0" \
  13 + "stderr=serial,vidconsole\0"
  14 +
  15 +#include <configs/rk3288_common.h>
  16 +
  17 +#define CONFIG_ENV_IS_NOWHERE
  18 +#define CONFIG_SPL_SPI_LOAD
  19 +#define CONFIG_SPI_FLASH_GIGADEVICE
  20 +
  21 +#define CONFIG_CMD_SF_TEST
  22 +
  23 +#define CONFIG_KEYBOARD
  24 +
  25 +#define CONFIG_SYS_WHITE_ON_BLACK
  26 +
  27 +#endif