Eric Lee / smarc-uboot

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Commit 5f253097e98e1770a738027b72296907cdf3c825

Authored by Franck LENORMAND
Committed by Ye Li
1 parent 893c0652aa
Exists in smarc_8mq_lf_v2020.04 and in 4 other branches pitx_8mp_lf_v2020.04, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mp_lf_v2020.04

MLK-18043 2/4: caam: enable support for iMX7ULP 

Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit 5f429339ab5a5f0d1f00a2880ce05cf479f11ba5)
(cherry picked from commit c26db25a130ef1f0abd43a3133877f74431eb217)
(cherry picked from commit 62ca8b07d4906ea11380f2638cc4b9d55beae9f6)

Showing 5 changed files with 21 additions and 5 deletions Side-by-side Diff

... ... @@ -836,6 +836,9 @@
836 836 config ARCH_MX7ULP
837 837 bool "NXP MX7ULP"
838 838 select CPU_V7A
  839 + select SYS_FSL_HAS_SEC if IMX_HAB
  840 + select SYS_FSL_SEC_COMPAT_4
  841 + select SYS_FSL_SEC_LE
839 842 select ROM_UNIFIED_SECTIONS
840 843 imply MXC_GPIO
841 844 imply SYS_THUMB_BUILD
arch/arm/include/asm/arch-mx7ulp/imx-regs.h
Diff comments   View file @ 5f25309
... ... @@ -16,6 +16,8 @@
16 16 #define CAAM_SEC_SRAM_SIZE (SZ_32K)
17 17 #define CAAM_SEC_SRAM_END (CAAM_SEC_SRAM_BASE + CAAM_SEC_SRAM_SIZE - 1)
18 18  
  19 +#define CAAM_ARB_BASE_ADDR CAAM_SEC_SRAM_BASE
  20 +
19 21 #define OCRAM_0_BASE (0x2F000000)
20 22 #define OCRAM_0_SIZE (SZ_128K)
21 23 #define OCRAM_0_END (OCRAM_0_BASE + OCRAM_0_SIZE - 1)
... ... @@ -223,6 +225,16 @@
223 225  
224 226 #define IOMUXC_DDR_RBASE ((AIPS3_BASE + (AIPS3_SLOT_SIZE * IOMUXC_DDR_AIPS3_SLOT)))
225 227 #define MMDC0_PCC_REG (PCC3_RBASE + (4 * MMDC0_PCC3_SLOT))
  228 +
  229 +#define CAAM_IPS_BASE_ADDR (AIPS2_BASE + 0x240000) /* 40240000 */
  230 +
  231 +#define CONFIG_SYS_FSL_SEC_OFFSET 0
  232 +#define CONFIG_SYS_FSL_SEC_ADDR (CAAM_IPS_BASE_ADDR + \
  233 + CONFIG_SYS_FSL_SEC_OFFSET)
  234 +#define CONFIG_SYS_FSL_JR0_OFFSET 0x1000
  235 +#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_FSL_SEC_ADDR + \
  236 + CONFIG_SYS_FSL_JR0_OFFSET)
  237 +#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
226 238  
227 239 #define IOMUXC_DPCR_DDR_DQS0 ((IOMUXC_DDR_RBASE + (4 * 32)))
228 240 #define IOMUXC_DPCR_DDR_DQS1 ((IOMUXC_DDR_RBASE + (4 * 33)))
arch/arm/mach-imx/mx7ulp/Kconfig
Diff comments   View file @ 5f25309
... ... @@ -9,6 +9,7 @@
9 9 Select this option to enable the PMC1 LDO.
10 10  
11 11 config MX7ULP
  12 + select HAS_CAAM
12 13 bool
13 14  
14 15 choice
drivers/crypto/fsl/jobdesc.c
Diff comments   View file @ 5f25309
... ... @@ -14,7 +14,7 @@
14 14 #include "jobdesc.h"
15 15 #include "rsa_caam.h"
16 16  
17   -#if defined(CONFIG_MX6) || defined(CONFIG_MX7)
  17 +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
18 18 /*!
19 19 * Secure memory run command
20 20 *
... ... @@ -158,7 +158,7 @@
158 158  
159 159 struct jr_regs {
160 160 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
161   - !(defined(CONFIG_MX6) || defined(CONFIG_MX7))
  161 + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
162 162 u32 irba_l;
163 163 u32 irba_h;
164 164 #else
... ... @@ -172,7 +172,7 @@
172 172 u32 rsvd3;
173 173 u32 irja;
174 174 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
175   - !(defined(CONFIG_MX6) || defined(CONFIG_MX7))
  175 + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
176 176 u32 orba_l;
177 177 u32 orba_h;
178 178 #else
... ... @@ -205,7 +205,7 @@
205 205 */
206 206 struct sg_entry {
207 207 #if defined(CONFIG_SYS_FSL_SEC_LE) && \
208   - !(defined(CONFIG_MX6) || defined(CONFIG_MX7))
  208 + !(defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP))
209 209 uint32_t addr_lo; /* Memory Address - lo */
210 210 uint32_t addr_hi; /* Memory Address of start of buffer - hi */
211 211 #else
... ... @@ -226,7 +226,7 @@
226 226  
227 227 #define BLOB_SIZE(x) ((x) + 32 + 16) /* Blob buffer size */
228 228  
229   -#if defined(CONFIG_MX6) || defined(CONFIG_MX7)
  229 +#if defined(CONFIG_MX6) || defined(CONFIG_MX7) || defined(CONFIG_MX7ULP)
230 230 /* Job Ring Base Address */
231 231 #define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1))
232 232 /* Secure Memory Offset varies accross versions */