powerpc/85xx: add fdt_fixup_dma3

On some SoC(e.g. T2080/T4240) the 3rd DMA is not functional if SRIO2 is chosen. we add fdt_fixup_dma3() to disable the 3rd DMA if SRIO2 is chosen. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>

powerpc/85xx: add fdt_fixup_dma3
On some SoC(e.g. T2080/T4240) the 3rd DMA is not functional if SRIO2 is chosen. we add fdt_fixup_dma3() to disable the 3rd DMA if SRIO2 is chosen. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Shengzhou Liu · York Sun
1 parent fbe79a17fd
Showing 1 changed file with 47 additions and 0 deletions Side-by-side Diff
arch/powerpc/cpu/mpc85xx/fdt.c
@@ -612,6 +612,51 @@
 #define fdt_fixup_usb(x)
 #endif
  
+#if defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T4240) || \
+	defined(CONFIG_PPC_T4160) || defined(CONFIG_PPC_T4080)
+void fdt_fixup_dma3(void *blob)
+{
+	/* the 3rd DMA is not functional if SRIO2 is chosen */
+	int nodeoff;
+	ccsr_gur_t __iomem *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+#define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
+#if defined(CONFIG_PPC_T2080)
+	u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
+				    FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
+	srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
+
+	switch (srds_prtcl_s2) {
+	case 0x29:
+	case 0x2d:
+	case 0x2e:
+#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
+	defined(CONFIG_PPC_T4080)
+	u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
+				    FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
+	srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
+
+	switch (srds_prtcl_s4) {
+	case 6:
+	case 8:
+	case 14:
+	case 16:
+#endif
+		nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
+							CONFIG_SYS_ELO3_DMA3);
+		if (nodeoff > 0)
+			fdt_status_disabled(blob, nodeoff);
+		else
+			printf("WARNING: unable to disable dma3\n");
+		break;
+	default:
+		break;
+	}
+}
+#else
+#define fdt_fixup_dma3(x)
+#endif
+
 #if defined(CONFIG_PPC_T1040)
 static void fdt_fixup_l2_switch(void *blob)
 {
@@ -778,6 +823,8 @@
 	fdt_fixup_usb(blob);
  
 	fdt_fixup_l2_switch(blob);
+
+	fdt_fixup_dma3(blob);
 }
  
 /*
...	...	@@ -612,6 +612,51 @@
612	612	#define fdt_fixup_usb(x)
613	613	#endif
614	614
	615	+#if defined(CONFIG_PPC_T2080) \|\| defined(CONFIG_PPC_T4240) \|\| \
	616	+ defined(CONFIG_PPC_T4160) \|\| defined(CONFIG_PPC_T4080)
	617	+void fdt_fixup_dma3(void *blob)
	618	+{
	619	+ /* the 3rd DMA is not functional if SRIO2 is chosen */
	620	+ int nodeoff;
	621	+ ccsr_gur_t __iomem gur = (void )(CONFIG_SYS_MPC85xx_GUTS_ADDR);
	622	+
	623	+#define CONFIG_SYS_ELO3_DMA3 (0xffe000000 + 0x102300)
	624	+#if defined(CONFIG_PPC_T2080)
	625	+ u32 srds_prtcl_s2 = in_be32(&gur->rcwsr[4]) &
	626	+ FSL_CORENET2_RCWSR4_SRDS2_PRTCL;
	627	+ srds_prtcl_s2 >>= FSL_CORENET2_RCWSR4_SRDS2_PRTCL_SHIFT;
	628	+
	629	+ switch (srds_prtcl_s2) {
	630	+ case 0x29:
	631	+ case 0x2d:
	632	+ case 0x2e:
	633	+#elif defined(CONFIG_PPC_T4240) \|\| defined(CONFIG_PPC_T4160) \|\| \
	634	+ defined(CONFIG_PPC_T4080)
	635	+ u32 srds_prtcl_s4 = in_be32(&gur->rcwsr[4]) &
	636	+ FSL_CORENET2_RCWSR4_SRDS4_PRTCL;
	637	+ srds_prtcl_s4 >>= FSL_CORENET2_RCWSR4_SRDS4_PRTCL_SHIFT;
	638	+
	639	+ switch (srds_prtcl_s4) {
	640	+ case 6:
	641	+ case 8:
	642	+ case 14:
	643	+ case 16:
	644	+#endif
	645	+ nodeoff = fdt_node_offset_by_compat_reg(blob, "fsl,elo3-dma",
	646	+ CONFIG_SYS_ELO3_DMA3);
	647	+ if (nodeoff > 0)
	648	+ fdt_status_disabled(blob, nodeoff);
	649	+ else
	650	+ printf("WARNING: unable to disable dma3\n");
	651	+ break;
	652	+ default:
	653	+ break;
	654	+ }
	655	+}
	656	+#else
	657	+#define fdt_fixup_dma3(x)
	658	+#endif
	659	+
615	660	#if defined(CONFIG_PPC_T1040)
616	661	static void fdt_fixup_l2_switch(void *blob)
617	662	{
...	...	@@ -778,6 +823,8 @@
778	823	fdt_fixup_usb(blob);
779	824
780	825	fdt_fixup_l2_switch(blob);
	826	+
	827	+ fdt_fixup_dma3(blob);
781	828	}
782	829
783	830	/*