Commit 60586dcec668e5b863a21d7ca69a0325f405d6da

Authored by Ye.Li
1 parent 4f6bc939db

MLK-11217 imx: mx6ul: Modify QSPI PAD DSE to 120ohm

The current pad DSE for QSPI is 60ohm. Per hardware team measurement,
this setting cause too strong drive to clock and data signals. Need
to change the DSE to 120ohm for better signal quality.

Signed-off-by: Ye.Li <B37916@freescale.com>

Showing 3 changed files with 3 additions and 3 deletions Side-by-side Diff

board/freescale/mx6ul_14x14_ddr3_arm2/mx6ul_14x14_ddr3_arm2.c
... ... @@ -418,7 +418,7 @@
418 418  
419 419 #define QSPI_PAD_CTRL1 \
420 420 (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
421   - PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_60ohm)
  421 + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
422 422  
423 423 static iomux_v3_cfg_t const quadspi_pads[] = {
424 424 MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
board/freescale/mx6ul_14x14_evk/mx6ul_14x14_evk.c
... ... @@ -426,7 +426,7 @@
426 426  
427 427 #define QSPI_PAD_CTRL1 \
428 428 (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
429   - PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_60ohm)
  429 + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
430 430  
431 431 static iomux_v3_cfg_t const quadspi_pads[] = {
432 432 MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1),
board/freescale/mx6ul_14x14_lpddr2_arm2/mx6ul_14x14_lpddr2_arm2.c
... ... @@ -397,7 +397,7 @@
397 397  
398 398 #define QSPI_PAD_CTRL1 \
399 399 (PAD_CTL_SRE_FAST | PAD_CTL_SPEED_MED | \
400   - PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_60ohm)
  400 + PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
401 401  
402 402 static iomux_v3_cfg_t const quadspi_pads[] = {
403 403 MX6_PAD_NAND_WP_B__QSPI_A_SCLK | MUX_PAD_CTRL(QSPI_PAD_CTRL1),