MLK-21045 iMX8QM: Need to change u-boot HDMI TX clocks

The HDMI digital PLL, bus clock and core clock need to change to improve the firmware loading time. The clock are now set to 800 MHz for DPLL, 200 MHz for HDMI core, and 100 MHz for HDMI bus. Signed-off-by: Oliver Brown <oliver.brown@nxp.com>

MLK-21045 iMX8QM: Need to change u-boot HDMI TX clocks
The HDMI digital PLL, bus clock and core clock need to change to improve the firmware loading time. The clock are now set to 800 MHz for DPLL, 200 MHz for HDMI core, and 100 MHz for HDMI bus. Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Oliver Brown
1 parent c26df16a4e
Showing 1 changed file with 3 additions and 3 deletions Side-by-side Diff
drivers/video/imx/hdp_load.c
@@ -26,9 +26,9 @@
 static void display_set_clocks(void)
 {
 	sc_ipc_t ipch = gd->arch.ipc_channel_handle;
-	const sc_pm_clock_rate_t pll = 657000000;
-	const sc_pm_clock_rate_t hdmi_core_clock = pll / 5; /* 135.000 Mhz */
-	const sc_pm_clock_rate_t hdmi_bus_clock = pll / 8;  /*  83.375 Mhz */
+	const sc_pm_clock_rate_t pll = 800000000;
+	const sc_pm_clock_rate_t hdmi_core_clock = pll / 4; /* 200 Mhz */
+	const sc_pm_clock_rate_t hdmi_bus_clock = pll / 8;  /* 100 Mhz */
  
 	SC_PM_SET_RESOURCE_POWER_MODE(ipch,
 				      SC_R_HDMI_PLL_0, SC_PM_PW_MODE_OFF);
...	...	@@ -26,9 +26,9 @@
26	26	static void display_set_clocks(void)
27	27	{
28	28	sc_ipc_t ipch = gd->arch.ipc_channel_handle;
29		- const sc_pm_clock_rate_t pll = 657000000;
30		- const sc_pm_clock_rate_t hdmi_core_clock = pll / 5; /* 135.000 Mhz */
31		- const sc_pm_clock_rate_t hdmi_bus_clock = pll / 8; /* 83.375 Mhz */
	29	+ const sc_pm_clock_rate_t pll = 800000000;
	30	+ const sc_pm_clock_rate_t hdmi_core_clock = pll / 4; /* 200 Mhz */
	31	+ const sc_pm_clock_rate_t hdmi_bus_clock = pll / 8; /* 100 Mhz */
32	32
33	33	SC_PM_SET_RESOURCE_POWER_MODE(ipch,
34	34	SC_R_HDMI_PLL_0, SC_PM_PW_MODE_OFF);