Commit 614c27251196b7567fdb6e98a8b1fe2905367c0c

Authored by Soren Brinkmann
Committed by Michal Simek
1 parent 6c3e61de3c

zynq: timer: Migrate to zynq clock framework

Remove hardcoded frequencies in favor of Zynq clock framework.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Showing 1 changed file with 7 additions and 4 deletions Side-by-side Diff

arch/arm/cpu/armv7/zynq/timer.c
... ... @@ -29,6 +29,7 @@
29 29 #include <div64.h>
30 30 #include <asm/io.h>
31 31 #include <asm/arch/hardware.h>
  32 +#include <asm/arch/clk.h>
32 33  
33 34 DECLARE_GLOBAL_DATA_PTR;
34 35  
... ... @@ -48,7 +49,6 @@
48 49  
49 50 #define TIMER_LOAD_VAL 0xFFFFFFFF
50 51 #define TIMER_PRESCALE 255
51   -#define TIMER_TICK_HZ (CONFIG_CPU_FREQ_HZ / 2 / TIMER_PRESCALE)
52 52  
53 53 int timer_init(void)
54 54 {
... ... @@ -56,6 +56,8 @@
56 56 (TIMER_PRESCALE << SCUTIMER_CONTROL_PRESCALER_SHIFT) |
57 57 SCUTIMER_CONTROL_ENABLE_MASK;
58 58  
  59 + gd->arch.timer_rate_hz = (gd->cpu_clk / 2) / TIMER_PRESCALE;
  60 +
59 61 /* Load the timer counter register */
60 62 writel(0xFFFFFFFF, &timer_base->load);
61 63  
... ... @@ -69,7 +71,7 @@
69 71  
70 72 /* Reset time */
71 73 gd->arch.lastinc = readl(&timer_base->counter) /
72   - (TIMER_TICK_HZ / CONFIG_SYS_HZ);
  74 + (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
73 75 gd->arch.tbl = 0;
74 76  
75 77 return 0;
... ... @@ -83,7 +85,8 @@
83 85 {
84 86 ulong now;
85 87  
86   - now = readl(&timer_base->counter) / (TIMER_TICK_HZ / CONFIG_SYS_HZ);
  88 + now = readl(&timer_base->counter) /
  89 + (gd->arch.timer_rate_hz / CONFIG_SYS_HZ);
87 90  
88 91 if (gd->arch.lastinc >= now) {
89 92 /* Normal mode */
... ... @@ -107,7 +110,7 @@
107 110 if (usec == 0)
108 111 return;
109 112  
110   - countticks = lldiv(TIMER_TICK_HZ * usec, 1000000);
  113 + countticks = lldiv(gd->arch.timer_rate_hz * usec, 1000000);
111 114  
112 115 /* decrementing timer */
113 116 timeend = readl(&timer_base->counter) - countticks;