Commit 625177d27ed9e91cb96c0221b8020f7e4d24bfb6
1 parent
509eb67802
Exists in
v2017.01-smarct4x
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serial: UniPhier: support OF configuration
This commit implements the ofdata_to_platdata handler for the UniPhier serial driver and adds serial device nodes to the device tree sources. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Showing 7 changed files with 122 additions and 8 deletions Side-by-side Diff
arch/arm/dts/uniphier-ph1-ld4-ref.dts
arch/arm/dts/uniphier-ph1-ld4.dtsi
... | ... | @@ -28,6 +28,34 @@ |
28 | 28 | #address-cells = <1>; |
29 | 29 | #size-cells = <1>; |
30 | 30 | ranges; |
31 | + | |
32 | + uart0: serial@54006800 { | |
33 | + compatible = "panasonic,uniphier-uart"; | |
34 | + status = "disabled"; | |
35 | + reg = <0x54006800 0x20>; | |
36 | + clock-frequency = <36864000>; | |
37 | + }; | |
38 | + | |
39 | + uart1: serial@54006900 { | |
40 | + compatible = "panasonic,uniphier-uart"; | |
41 | + status = "disabled"; | |
42 | + reg = <0x54006900 0x20>; | |
43 | + clock-frequency = <36864000>; | |
44 | + }; | |
45 | + | |
46 | + uart2: serial@54006a00 { | |
47 | + compatible = "panasonic,uniphier-uart"; | |
48 | + status = "disabled"; | |
49 | + reg = <0x54006a00 0x20>; | |
50 | + clock-frequency = <36864000>; | |
51 | + }; | |
52 | + | |
53 | + uart3: serial@54006b00 { | |
54 | + compatible = "panasonic,uniphier-uart"; | |
55 | + status = "disabled"; | |
56 | + reg = <0x54006b00 0x20>; | |
57 | + clock-frequency = <36864000>; | |
58 | + }; | |
31 | 59 | }; |
32 | 60 | }; |
arch/arm/dts/uniphier-ph1-pro4-ref.dts
arch/arm/dts/uniphier-ph1-pro4.dtsi
... | ... | @@ -34,6 +34,34 @@ |
34 | 34 | #address-cells = <1>; |
35 | 35 | #size-cells = <1>; |
36 | 36 | ranges; |
37 | + | |
38 | + uart0: serial@54006800 { | |
39 | + compatible = "panasonic,uniphier-uart"; | |
40 | + status = "disabled"; | |
41 | + reg = <0x54006800 0x20>; | |
42 | + clock-frequency = <73728000>; | |
43 | + }; | |
44 | + | |
45 | + uart1: serial@54006900 { | |
46 | + compatible = "panasonic,uniphier-uart"; | |
47 | + status = "disabled"; | |
48 | + reg = <0x54006900 0x20>; | |
49 | + clock-frequency = <73728000>; | |
50 | + }; | |
51 | + | |
52 | + uart2: serial@54006a00 { | |
53 | + compatible = "panasonic,uniphier-uart"; | |
54 | + status = "disabled"; | |
55 | + reg = <0x54006a00 0x20>; | |
56 | + clock-frequency = <73728000>; | |
57 | + }; | |
58 | + | |
59 | + uart3: serial@54006b00 { | |
60 | + compatible = "panasonic,uniphier-uart"; | |
61 | + status = "disabled"; | |
62 | + reg = <0x54006b00 0x20>; | |
63 | + clock-frequency = <73728000>; | |
64 | + }; | |
37 | 65 | }; |
38 | 66 | }; |
arch/arm/dts/uniphier-ph1-sld8-ref.dts
arch/arm/dts/uniphier-ph1-sld8.dtsi
... | ... | @@ -28,6 +28,34 @@ |
28 | 28 | #address-cells = <1>; |
29 | 29 | #size-cells = <1>; |
30 | 30 | ranges; |
31 | + | |
32 | + uart0: serial@54006800 { | |
33 | + compatible = "panasonic,uniphier-uart"; | |
34 | + status = "disabled"; | |
35 | + reg = <0x54006800 0x20>; | |
36 | + clock-frequency = <80000000>; | |
37 | + }; | |
38 | + | |
39 | + uart1: serial@54006900 { | |
40 | + compatible = "panasonic,uniphier-uart"; | |
41 | + status = "disabled"; | |
42 | + reg = <0x54006900 0x20>; | |
43 | + clock-frequency = <80000000>; | |
44 | + }; | |
45 | + | |
46 | + uart2: serial@54006a00 { | |
47 | + compatible = "panasonic,uniphier-uart"; | |
48 | + status = "disabled"; | |
49 | + reg = <0x54006a00 0x20>; | |
50 | + clock-frequency = <80000000>; | |
51 | + }; | |
52 | + | |
53 | + uart3: serial@54006b00 { | |
54 | + compatible = "panasonic,uniphier-uart"; | |
55 | + status = "disabled"; | |
56 | + reg = <0x54006b00 0x20>; | |
57 | + clock-frequency = <80000000>; | |
58 | + }; | |
31 | 59 | }; |
32 | 60 | }; |
drivers/serial/serial_uniphier.c
... | ... | @@ -11,6 +11,7 @@ |
11 | 11 | #include <dm/device.h> |
12 | 12 | #include <dm/platform_data/serial-uniphier.h> |
13 | 13 | #include <serial.h> |
14 | +#include <fdtdec.h> | |
14 | 15 | |
15 | 16 | #define UART_REG(x) \ |
16 | 17 | u8 x; \ |
17 | 18 | |
... | ... | @@ -113,19 +114,21 @@ |
113 | 114 | } |
114 | 115 | |
115 | 116 | #ifdef CONFIG_OF_CONTROL |
116 | -static const struct udevice_id uniphier_uart_of_match = { | |
117 | - { .compatible = "panasonic,uniphier-uart"}, | |
117 | +static const struct udevice_id uniphier_uart_of_match[] = { | |
118 | + { .compatible = "panasonic,uniphier-uart" }, | |
118 | 119 | {}, |
119 | 120 | }; |
120 | 121 | |
121 | 122 | static int uniphier_serial_ofdata_to_platdata(struct udevice *dev) |
122 | 123 | { |
123 | - /* | |
124 | - * TODO: Masahiro Yamada (yamada.m@jp.panasonic.com) | |
125 | - * | |
126 | - * Implement conversion code from DTB to platform data | |
127 | - * when supporting CONFIG_OF_CONTROL on UniPhir platform. | |
128 | - */ | |
124 | + struct uniphier_serial_platform_data *plat = dev_get_platdata(dev); | |
125 | + DECLARE_GLOBAL_DATA_PTR; | |
126 | + | |
127 | + plat->base = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); | |
128 | + plat->uartclk = fdtdec_get_int(gd->fdt_blob, dev->of_offset, | |
129 | + "clock-frequency", 0); | |
130 | + | |
131 | + return 0; | |
129 | 132 | } |
130 | 133 | #endif |
131 | 134 |