Commit 6450a8485836fc80615ae6de6a864c33369b44f5
1 parent
cf7e399fb3
Update CHANGELOG, tiny coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
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CHANGELOG
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1 | +commit cf7e399fb35b3aea90a27d1df72f45f5d6156204 | |
2 | +Author: Mike Frysinger <vapier@gentoo.org> | |
3 | +Date: Tue Jan 27 16:12:21 2009 -0500 | |
4 | + | |
5 | + SATA: do not auto-initialize during boot | |
6 | + | |
7 | + Rather than have the board code initialize SATA automatically during boot, | |
8 | + make the user manually run "sata init". This brings the SATA subsystem in | |
9 | + line with common U-Boot policy. | |
10 | + | |
11 | + Rather than having a dedicated weak function "is_sata_supported", people | |
12 | + can override sata_initialize() to do their weird board stuff. Then they | |
13 | + can call the actual __sata_initialize(). | |
14 | + | |
15 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
16 | + | |
17 | +commit 50970839712dda35399e2fa83fe818df9354d618 | |
18 | +Author: Richard Retanubun <RichardRetanubun@RuggedCom.com> | |
19 | +Date: Mon Jan 26 08:45:14 2009 -0500 | |
20 | + | |
21 | + part_efi: Fix partition size calculation due to inclusive ending LBA. | |
22 | + | |
23 | + The ending LBA is inclusive. Hence, the partition size should be | |
24 | + ((ending-LBA + 1) - starting-LBA) to get the proper partition size. | |
25 | + | |
26 | + This is confirmed against the results from the parted tool. | |
27 | + (e.g. use parted /dev/sda -s unit S print) and observe the size. | |
28 | + | |
29 | + Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> | |
30 | + | |
31 | +commit b5b004ad8a0ac6f98bd5708ec8b22fbddd1c1042 | |
32 | +Author: Tomasz Figa <tomasz.figa@gmail.com> | |
33 | +Date: Tue Dec 30 18:35:57 2008 +0100 | |
34 | + | |
35 | + jffs2: Fix zero sector_size when not using CONFIG_JFFS2_CMDLINE | |
36 | + | |
37 | + This patch fixes a bug (?) introduced after inclusion of the new | |
38 | + JFFS2 code. | |
39 | + | |
40 | + When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't | |
41 | + fill in part->sector_size (keeping it as 0), but a correct value is | |
42 | + needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses | |
43 | + to be in the same place of the memory, what obviously means | |
44 | + impossibility to use the JFFS2 partition. | |
45 | + | |
46 | + This problem is fixed in this patch by including sector size | |
47 | + calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant. | |
48 | + | |
49 | + Signed-off-by: Tomasz Figa <tomasz.figa_at_gmail.com> | |
50 | + | |
51 | +commit ba69dc26a5fd606da49573bb2f15e756a34f3f98 | |
52 | +Author: Mike Frysinger <vapier@gentoo.org> | |
53 | +Date: Tue Dec 30 02:59:25 2008 -0500 | |
54 | + | |
55 | + saveenv: standardize enablement | |
56 | + | |
57 | + Rather than special casing each environment type for enabling the saveenv | |
58 | + command, have them all behave the same. This avoids bitrot as new env | |
59 | + sources are added/removed. | |
60 | + | |
61 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
62 | + | |
63 | +commit 2ac6985a7466a1c8a7aa8b2fa24d360925a82764 | |
64 | +Author: Andrew Dyer <adyer@righthandtech.com> | |
65 | +Date: Mon Dec 29 17:36:01 2008 -0600 | |
66 | + | |
67 | + soft_i2c.c add option for repeated start in i2c_read() | |
68 | + | |
69 | + This patch adds a #define to optionally change the behaviour of | |
70 | + i2c_read() in soft_i2c.c to send an I2C repeated start instead of a | |
71 | + stop-start between sending the device address pointer write and | |
72 | + reading back the data. The current behaviour is retained as the | |
73 | + default. | |
74 | + | |
75 | + While most devices will work either way, I have a smart battery(*) | |
76 | + that requires repeated start, and someone at some point found a | |
77 | + device that required a stop-start. | |
78 | + | |
79 | + (*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20Data%20Sheet.pdf | |
80 | + | |
81 | + Signed-off-by: Andrew Dyer <adyer@righthandtech.com> | |
82 | + | |
83 | +commit 3429071700963ca2f944c51d695a7481af0cee33 | |
84 | +Author: Wolfgang Denk <wd@denx.de> | |
85 | +Date: Tue Jan 27 22:07:14 2009 +0100 | |
86 | + | |
87 | + {delta,zylonite}/lowlevel_init.S: fix typo | |
88 | + | |
89 | + Commit 9d803d8c mistakenly changed some constants | |
90 | + from 0x300 into 300 - this patch fixes it. | |
91 | + | |
92 | + Pointed out by Tom Evans <tom@ceos.com.au>, see | |
93 | + http://article.gmane.org/gmane.comp.boot-loaders.u-boot/51992 for | |
94 | + details. | |
95 | + | |
96 | + Signed-off-by: Wolfgang Denk <wd@denx.de> | |
97 | + | |
98 | +commit 1bc434373013af241835c14011ac3f291dccbf53 | |
99 | +Author: Stefan Althoefer <stefan.althoefer@web.de> | |
100 | +Date: Sat Dec 20 19:40:41 2008 +0100 | |
101 | + | |
102 | + drivers/net/e1000.c: missing terminator for supported devices | |
103 | + | |
104 | + Signed-off-by: Stefan Althoefer <stefan.althoefer@web.de> | |
105 | + | |
106 | +commit 65f7d41031a70b1649b35020995c505edca91533 | |
107 | +Author: Wolfgang Denk <wd@denx.de> | |
108 | +Date: Tue Jan 27 21:36:28 2009 +0100 | |
109 | + | |
110 | + fat.c: fix warning: array subscript is above array bounds | |
111 | + | |
112 | + Fix based on suggestion by David Hawkins <dwh@ovro.caltech.edu>. | |
113 | + | |
114 | + Signed-off-by: Wolfgang Denk <wd@denx.de> | |
115 | + | |
116 | +commit 107b801cf3fe39612d69d70581ebc3bf5e215554 | |
117 | +Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com> | |
118 | +Date: Fri Jan 2 15:11:41 2009 +0100 | |
119 | + | |
120 | + Fix gunzip in case of insufficient output buffer | |
121 | + | |
122 | + U-Boot's gunzip() function does not handle the return code | |
123 | + of zlib's inflate() function correctly. gunzip() is implemented | |
124 | + to uncompress all input data in one run. So the correct return | |
125 | + code for the good case is Z_STREAM_END. In case of insufficient | |
126 | + output buffer memory inflate returns Z_OK. For gunzip() this | |
127 | + is an error. | |
128 | + | |
129 | + It also makes sense to me to call inflateEnd() also in case | |
130 | + of an error. | |
131 | + | |
132 | + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> | |
133 | + | |
134 | +commit 2a61eff6a82f0d6e2335d968799b3fbeb3ff4d8e | |
135 | +Author: Stefan Roese <sr@denx.de> | |
136 | +Date: Wed Jan 21 17:25:01 2009 +0100 | |
137 | + | |
138 | + MIPS: Add VCT board series support (Part 3/3) | |
139 | + | |
140 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
141 | + | |
142 | +commit ae691e5719c48f1d2826cb72722497d1d162765b | |
143 | +Author: Stefan Roese <sr@denx.de> | |
144 | +Date: Wed Jan 21 17:24:49 2009 +0100 | |
145 | + | |
146 | + MIPS: Add VCT board series support (Part 2/3) | |
147 | + | |
148 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
149 | + | |
150 | +commit 50752790bc9285c0c1c5235e88f3a4ef2eec1e72 | |
151 | +Author: Stefan Roese <sr@denx.de> | |
152 | +Date: Wed Jan 21 17:24:39 2009 +0100 | |
153 | + | |
154 | + MIPS: Add VCT board series support (Part 1/3) | |
155 | + | |
156 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
157 | + | |
158 | +commit 03d3bfb00806b5441f1871c7408c1749863e0fdc | |
159 | +Author: Stefan Roese <sr@denx.de> | |
160 | +Date: Wed Jan 21 17:20:20 2009 +0100 | |
161 | + | |
162 | + MIPS: Add flush_dcache_range() and invalidate_dcache_range() | |
163 | + | |
164 | + This patch adds flush_/invalidate_dcache_range() to the MIPS architecture. | |
165 | + Those functions are needed for the upcoming dcache support for the USB | |
166 | + EHCI driver. I chose this API because those cache handling functions are | |
167 | + already present in the PPC architecture. | |
168 | + | |
169 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
170 | + Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | |
171 | + | |
172 | +commit e8eac437189430d8e04a5d254ed92c58bc534a79 | |
173 | +Author: Richard Retanubun <RichardRetanubun@RuggedCom.com> | |
174 | +Date: Wed Jan 14 08:44:26 2009 -0500 | |
175 | + | |
176 | + CFI: Add geometry reversal for STMicro M29W320ET | |
177 | + | |
178 | + Added flash_fixup_stm to fix geometry reversal on STMicro M29W320ET flash chip. | |
179 | + | |
180 | + Modeled after flash_fixup_amd, this patch handles the geometry reversal | |
181 | + or erase sectors that exist for ST Micro (now Numonyx) M29W320ET flash. | |
182 | + Since I cannot test all STM's chips, the detection is implemented as | |
183 | + narrow as possible for now. | |
184 | + | |
185 | + Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> | |
186 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
187 | + | |
188 | +commit 0f8e851e897b535959a0781171910cd97f33c30c | |
189 | +Author: Jens Gehrlein <sew_s@tqs.de> | |
190 | +Date: Tue Dec 16 17:25:55 2008 +0100 | |
191 | + | |
192 | + CFI: increase performance of function find_sector() | |
193 | + | |
194 | + Tested on TQM5200S-BD with Samsung K8P2815UQB | |
195 | + | |
196 | + Signed-off-by: Jens Gehrlein <sew_s@tqs.de> | |
197 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
198 | + | |
199 | +commit a7292871a79cc48d98e3a708dd3c3b81580db6ef | |
200 | +Author: Jens Gehrlein <sew_s@tqs.de> | |
201 | +Date: Tue Dec 16 17:25:54 2008 +0100 | |
202 | + | |
203 | + CFI: avoid redundant function call in single word programming mode | |
204 | + | |
205 | + The function find_sector() doesn't need to be called twice in | |
206 | + the case of AMD command set. | |
207 | + Tested on TQM5200S-BD with Samsung K8P2815UQB. | |
208 | + | |
209 | + Signed-off-by: Jens Gehrlein <sew_s@tqs.de> | |
210 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
211 | + | |
212 | +commit c8901f46a71ec16e084e604596a09e23bfb0f6ac | |
213 | +Author: Stefan Roese <sr@denx.de> | |
214 | +Date: Mon Jan 26 10:15:23 2009 +0100 | |
215 | + | |
216 | + ppc4xx: Remove compilation warning in gdppc440etc.c | |
217 | + | |
218 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
219 | + | |
220 | +commit 91f33534728e6416d332ad2b53ad1d6fde57f7fc | |
221 | +Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com> | |
222 | +Date: Fri Jan 2 12:19:47 2009 +0100 | |
223 | + | |
224 | + ppc4xx: Remove CONFIG_SYS_IGNORE_405_UART_ERRATA_59 from config files | |
225 | + | |
226 | + Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59. | |
227 | + Either they define or undef it. Because it's not used in any source | |
228 | + files this patch removes any references to it. | |
229 | + | |
230 | + Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> | |
231 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
232 | + | |
233 | +commit 89b8619aaeafc922ca0c3bb249872591050c8dcc | |
234 | +Author: Dirk Eibach <eibach@gdsys.de> | |
235 | +Date: Tue Dec 9 13:12:40 2008 +0100 | |
236 | + | |
237 | + ppc4xx: Add GDsys PowerPC 440 ETX board support. | |
238 | + | |
239 | + Board support for the Guntermann & Drunck PowerPC 440 ETX module. | |
240 | + Based on the AMCC Yosemite board support by Stefan Roese. | |
241 | + | |
242 | + Signed-off-by: Dirk Eibach <eibach@gdsys.de> | |
243 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
244 | + | |
245 | +commit 3943d2ff6cc40dd601a9feeb39eb6d3d5090ea6d | |
246 | +Author: Dirk Eibach <eibach@gdsys.de> | |
247 | +Date: Tue Dec 9 11:00:07 2008 +0100 | |
248 | + | |
249 | + ppc4xx: Improve DDR autodetect | |
250 | + | |
251 | + Added support for a second memory bank to DDR autodetection for 440 | |
252 | + platforms. | |
253 | + Made hardcoded values configurable. | |
254 | + | |
255 | + Signed-off-by: Dirk Eibach <eibach@gdsys.de> | |
256 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
257 | + | |
258 | +commit 24113a44ed5cd3257a0237c3961e121812fca6db | |
259 | +Author: Mike Frysinger <vapier@gentoo.org> | |
260 | +Date: Tue Dec 30 03:15:38 2008 -0500 | |
261 | + | |
262 | + easylogo: add optional gzip support | |
263 | + | |
264 | + Some images can be quite large, so add an option to compress the | |
265 | + image data with gzip in the U-Boot image. Then at runtime, the | |
266 | + board can decompress it with the normal zlib functions. | |
267 | + | |
268 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
269 | + | |
270 | +commit 7e4b9b4f6f43838fad3ad72c029a3d7fc7c7d48c | |
271 | +Author: Bryan Wu <bryan.wu@analog.com> | |
272 | +Date: Fri Jan 2 20:47:45 2009 -0500 | |
273 | + | |
274 | + fat: fix unaligned errors | |
275 | + | |
276 | + A couple of buffers in the fat code are declared as an array of bytes. | |
277 | + But it is then cast up to a structure with 16bit and 32bit members. | |
278 | + Since GCC assumes structure alignment here, we have to force the | |
279 | + buffers to be aligned according to the structure usage. | |
280 | + | |
281 | + Signed-off-by: Bryan Wu <bryan.wu@analog.com> | |
282 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
283 | + | |
284 | +commit 68f8718df2ed4c2f43031407ccf6cfa81125dddc | |
285 | +Author: Brad Bozarth <bflinux@yumbrad.com> | |
286 | +Date: Thu Jan 1 22:45:47 2009 -0500 | |
287 | + | |
288 | + spi flash: fix crash due to spi flash miscommunication | |
289 | + | |
290 | + Higher spi flash layers expect to be given back a pointer that was | |
291 | + malloced so that it can free the result, but the lower layers return | |
292 | + a pointer that is in the middle of the malloced memory. Reorder the | |
293 | + members of the lower spi structures so that things work out. | |
294 | + | |
295 | + Signed-off-by: Brad Bozarth <bflinux@yumbrad.com> | |
296 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
297 | + Acked-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | |
298 | + | |
299 | +commit ce82ff05388b5ddafdf6082ef0776cce72c40b1c | |
300 | +Author: Yuri Tikhonov <yur@emcraft.com> | |
301 | +Date: Sat Dec 20 14:54:21 2008 +0300 | |
302 | + | |
303 | + FPU POST: fix warnings when building with 2.18 binutils | |
304 | + | |
305 | + When compile u-boot with the 2.18 binutils the following | |
306 | + warning messages for each object file in post/lib_ppc/fpu/ is | |
307 | + produced at the linking stage: | |
308 | + | |
309 | + post/libpost.a(acc1.o) uses hard float, u-boot uses soft-float | |
310 | + ... | |
311 | + | |
312 | + This is because of the fact that, in general, the soft-float and | |
313 | + hard-float ABIs are incompatible; the 2.18 binutils do checking | |
314 | + of the Tag_GNU_Power_ABI_FP attribute of the files to be linked, and | |
315 | + produce the worning like above if these are not compatible. | |
316 | + | |
317 | + The incompatibility of ABIs is concerned only the float values: | |
318 | + e.g. the soft-float ABI assumes the float argument passing in the | |
319 | + pair of rX registers, and the hard-float ABI assumes passing of | |
320 | + the float argument in the fX register. When we don't pass the float | |
321 | + arguments between the functions compiled with different floatness, | |
322 | + then such an application will work correctly. | |
323 | + This is the case for the FPU POST: u-boot (compiled with soft-float) | |
324 | + doesn't pass to (and doesn't get from) the FPU POST functions any | |
325 | + floats; there are no functions exported from the post/lib_ppc/fpu/ | |
326 | + objects which would work with float parameters/returns too. So, we | |
327 | + can reassure the linker not to worry about the difference in ABI | |
328 | + attributes of linking files just by setting the 'soft-float' | |
329 | + attribute for the objects in post/lib_ppc/fpu. And this patch does | |
330 | + this. | |
331 | + | |
332 | + Also, to avoid passing both soft- and hard-float options in CFLAGS | |
333 | + when compiling the files from post/lib_ppc/fpu (which is OK, but | |
334 | + looks rather dirty) this patch removes the soft-float string from | |
335 | + CFLAGS in post/lib_ppc/fpu/Makefile. | |
336 | + | |
337 | + Signed-off-by: Yuri Tikhonov <yur@emcraft.com> | |
338 | + | |
339 | +commit a7c9310457e85b4598abe5b304108edf11332e2f | |
340 | +Author: Peter Tyser <ptyser@xes-inc.com> | |
341 | +Date: Wed Dec 17 16:36:22 2008 -0600 | |
342 | + | |
343 | + Add support for Maxim's DS4510 I2C device | |
344 | + | |
345 | + Initial support for the DS4510, a CPU supervisor with | |
346 | + integrated EEPROM, SRAM, and 4 programmable non-volatile | |
347 | + GPIO pins. The CONFIG_DS4510 define enables support | |
348 | + for the device while the CONFIG_CMD_DS4510 define | |
349 | + enables the ds4510 command. The additional | |
350 | + CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and | |
351 | + CONFIG_DS4510_RST defines add additional sub-commands | |
352 | + to the ds4510 command when defined. | |
353 | + | |
354 | + Signed-off-by: Peter Tyser <ptyser@xes-inc.com> | |
355 | + | |
356 | +commit b6fc6fd49a84543e1324e1620b9f301ff7c1f27f | |
357 | +Author: Dirk Eibach <eibach@gdsys.de> | |
358 | +Date: Tue Dec 16 14:51:56 2008 +0100 | |
359 | + | |
360 | + common: Iteration limit for memory test. | |
361 | + | |
362 | + The iteration limit is passed to mtest as a fourth parameter: | |
363 | + [start [end [pattern [iterations]]]] | |
364 | + If no fourth parameter is supplied, there is no iteration limit and the | |
365 | + test will loop forever. | |
366 | + | |
367 | + Signed-off-by: Dirk Eibach <eibach@gdsys.de> | |
368 | + | |
369 | +commit 97cae3a4c68d856374ccc70fd2c5f8714cc94f7d | |
370 | +Author: Stefan Roese <sr@denx.de> | |
371 | +Date: Mon Dec 15 15:40:12 2008 +0100 | |
372 | + | |
373 | + serial: Rename driver vcth to vct to support other board variants | |
374 | + | |
375 | + Moved driver vcth.c to vct.c to better reflect the VCT board series. | |
376 | + This driver is now used by the VCT platforms: | |
377 | + | |
378 | + vct_premium | |
379 | + vct_platinum | |
380 | + vct_platinumsvc | |
381 | + | |
382 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
383 | + | |
384 | +commit 36ede4d63e59c9277ec180b09c39b8bf46425ba2 | |
385 | +Author: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | |
386 | +Date: Fri Dec 12 00:45:27 2008 +0900 | |
387 | + | |
388 | + nios: Move README.nios_CONFIG_SYS_NIOS_CPU to doc/ dir | |
389 | + | |
390 | + Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp> | |
391 | + | |
392 | +commit c3284b030b1cd492b4f46c576aea01bef258599d | |
393 | +Author: Peter Korsgaard <jacmet@sunsite.dk> | |
394 | +Date: Wed Dec 10 16:24:16 2008 +0100 | |
395 | + | |
396 | + common/main: support bootdelay=0 for CONFIG_AUTOBOOT_KEYED | |
397 | + | |
398 | + Support bootdelay=0 in abortboot for the CONFIG_AUTOBOOT_KEYED case | |
399 | + similar to the CONFIG_ZERO_BOOTDELAY_CHECK support for the | |
400 | + !CONFIG_AUTOBOOT_KEYED case. | |
401 | + | |
402 | + Do this by reversing the loop so we do at least one iteration before | |
403 | + checking for timeout. | |
404 | + | |
405 | + Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> | |
406 | + | |
407 | +commit 94f9279f7bbdc01bbc7cf85aedf9b545943b94c3 | |
408 | +Author: Niklaus Giger <niklaus.giger@netstal.com> | |
409 | +Date: Mon Dec 8 17:24:08 2008 +0100 | |
410 | + | |
411 | + Added legacy flash ST Micro M29W040B | |
412 | + | |
413 | +commit 626d07348e5f9f302f4ea182161a89f7362a0488 | |
414 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
415 | +Date: Mon Dec 8 20:04:51 2008 +1100 | |
416 | + | |
417 | + Fixed off-by-one errors in lib_m68k/interrupts.c | |
418 | + | |
419 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
420 | + | |
421 | +commit a5989c42ae5e295f274a795c426c47819bbdbfda | |
422 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
423 | +Date: Sun Dec 7 10:29:05 2008 +1100 | |
424 | + | |
425 | + Removed all references to CONFIG_SYS_RESET_GENERIC | |
426 | + | |
427 | + Generic i386 reset - #define made redundant by weak function | |
428 | + | |
429 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
430 | + | |
431 | +commit 2b5360eb2bc0b741ae5cb3c84d35ccdd17667c8a | |
432 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
433 | +Date: Sun Dec 7 10:29:04 2008 +1100 | |
434 | + | |
435 | + Remove #ifdef CONFIG_SC520 in source code | |
436 | + | |
437 | + CONFIG_SC520 is now used for conditional compile | |
438 | + | |
439 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
440 | + | |
441 | +commit ead056bc206f6b7ee6dc98766678b64635ea20b8 | |
442 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
443 | +Date: Sun Dec 7 10:29:03 2008 +1100 | |
444 | + | |
445 | + Added MMCR reset functionality | |
446 | + | |
447 | + Reset function specific to AMD SC520 microcontroller - Is more of a | |
448 | + 'hard reset' that the triple fault. | |
449 | + | |
450 | + Requires CONFIG_SYS_RESET_SC520 to be defined in config | |
451 | + | |
452 | + I would have liked to add this to a new file (cpu/i386/sc520/reset.c) | |
453 | + but ld requires that a object file in a library arhive MUST contain | |
454 | + at least one function which does not override a weak function (and is | |
455 | + called from outside the object file) in order for that object file to | |
456 | + be extracted from the archive. This would be the only function on the | |
457 | + new file, and hence, will never get linked in. | |
458 | + | |
459 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
460 | + | |
461 | +commit 3f5f18d12d32ee0661bf51dfc55752c005230d6e | |
462 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
463 | +Date: Sun Dec 7 10:29:02 2008 +1100 | |
464 | + | |
465 | + Moved generic (triple fault) reset code | |
466 | + | |
467 | + Moved from interrupts.c to cpu.c and made into a weak function to | |
468 | + allow vendor specific override | |
469 | + | |
470 | + Vendor specific CPU reset (like the AMD SC520 MMCR reset) can now be | |
471 | + added to the vendor specific code without the need to remember to | |
472 | + #undef usage of the generic method and if you forget to include your | |
473 | + custom reset method, you will always get the default. | |
474 | + | |
475 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
476 | + | |
477 | +commit 9933d609020c297788f53f334c8465fa7a99b10c | |
478 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
479 | +Date: Sun Dec 7 10:29:01 2008 +1100 | |
480 | + | |
481 | + Moved definition of set_vector() to new header file | |
482 | + | |
483 | + This allows for future tidy ups and functionality that will require | |
484 | + set_vector () | |
485 | + | |
486 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
487 | + | |
488 | +commit 407976185e0dda2c90e89027121a1071b9c77bfb | |
489 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
490 | +Date: Sun Dec 7 10:29:00 2008 +1100 | |
491 | + | |
492 | + Moved sc520 specific code into new cpu/i386/sc520 folder | |
493 | + | |
494 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
495 | + Signed-off-by: Wolfgang Denk <wd@denx.de> | |
496 | + | |
497 | +commit 85ffbbd51914925a542d8528be7f072e5ab02157 | |
498 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
499 | +Date: Sun Dec 7 10:28:58 2008 +1100 | |
500 | + | |
501 | + Renamed cpu/i386/reset.S to resetvec.S | |
502 | + | |
503 | + Brings i386 in line with other CPUs with a reset vector and frees up reset.c | |
504 | + for CPU reset functions | |
505 | + | |
506 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
507 | + | |
508 | +commit a3f4c123f569474e80ea012b8db0de46afdb6443 | |
509 | +Author: Wolfgang Denk <wd@denx.de> | |
510 | +Date: Sat Jan 24 01:01:49 2009 +0100 | |
511 | + | |
512 | + Makefile: keep lists sorted. | |
513 | + | |
514 | + Signed-off-by: Wolfgang Denk <wd@denx.de> | |
515 | + | |
516 | +commit c620c01e96814558470698ed5cab1bf2f504d1b5 | |
517 | +Author: Graeme Russ <graeme.russ@gmail.com> | |
518 | +Date: Sun Dec 7 10:28:57 2008 +1100 | |
519 | + | |
520 | + Added initial eNET board support | |
521 | + | |
522 | + Signed-off-by: Graeme Russ <graeme.russ@gmail.com> | |
523 | + | |
524 | +commit 0c0ccf401ee03a5008fc2c19b05a662bce1a1086 | |
525 | +Author: Gary Jennejohn <garyj@denx.de> | |
526 | +Date: Thu Nov 20 11:37:26 2008 +0100 | |
527 | + | |
528 | + POWERPC 82xx: add the SCC as an HDLC controller | |
529 | + | |
530 | + Right now this is only used by keymile. | |
531 | + | |
532 | + Signed-off-by: Gary Jennejohn <garyj@denx.de> | |
533 | + | |
534 | +commit 1e8f4e78ca393b3d8e86bd8055758dd465d9113f | |
535 | +Author: Heiko Schocher <hs@denx.de> | |
536 | +Date: Thu Nov 20 09:59:09 2008 +0100 | |
537 | + | |
538 | + powerpc, keymile boards: extract identical config options | |
539 | + | |
540 | + This patch extracts the identical config options for the | |
541 | + keymile boards mgcoge, mgsuvd and kmeter1 in a new | |
542 | + common config file keymile-common.h. | |
543 | + | |
544 | + Signed-off-by: Heiko Schocher <hs@denx.de> | |
545 | + | |
546 | +commit 210c8c00aad3328145204adab434bb7d70b06b75 | |
547 | +Author: Heiko Schocher <hs@denx.de> | |
548 | +Date: Fri Nov 21 08:29:40 2008 +0100 | |
549 | + | |
550 | + powerpc: keymile: Add a check for the PIGGY debug board | |
551 | + | |
552 | + Check the presence of the PIGGY on the keymile boards mgcoge, | |
553 | + mgsuvd and kmeter1. If the PIGGY is not present, dont register | |
554 | + this Ethernet device. | |
555 | + | |
556 | + Signed-off-by: Heiko Schocher <hs@denx.de> | |
557 | + Acked-by: Ben Warren <biggerbadderben@gmail.com> | |
558 | + | |
559 | +commit de0443614af4d16675ab436665aeb11ddc9f7214 | |
560 | +Author: Heiko Schocher <hs@denx.de> | |
561 | +Date: Thu Nov 20 09:57:47 2008 +0100 | |
562 | + | |
563 | + powerpc: 83xx: add support for the kmeter1 board | |
564 | + | |
565 | + This patch adds support for the kmeter1 board from Keymile, | |
566 | + based on a Freescale MPC8360 CPU. | |
567 | + | |
568 | + - serial console on UART 1 | |
569 | + - 256 MB DDR2 RAM | |
570 | + - 64 MB NOR Flash | |
571 | + - Ethernet RMII Mode over UCC4 | |
572 | + - PHY SMSC LAN8700 | |
573 | + | |
574 | + Signed-off-by: Heiko Schocher <hs@denx.de> | |
575 | + | |
576 | +commit 3feb647f3fd0881382c7a29f4cf280b66473ae0a | |
577 | +Author: Sergei Poselenov <sposelenov@emcraft.com> | |
578 | +Date: Tue Nov 4 13:51:18 2008 +0100 | |
579 | + | |
580 | + Add a do_div() wrapper macro, lldiv(). | |
581 | + | |
582 | + Add a do_div() wrapper, lldiv(). The new inline function doesn't modify | |
583 | + the dividend and returns the result of division, so it is useful | |
584 | + in complex expressions, i.e. "return(a/b)" -> "return(lldiv(a,b))" | |
585 | + | |
586 | + Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com> | |
587 | + | |
588 | +commit 18af1c5f0f7402dc0d6a71b012c68025dd97cf72 | |
589 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
590 | +Date: Fri Jan 23 14:22:14 2009 -0600 | |
591 | + | |
592 | + 85xx: Add a 36-bit physical configuration for MPC8572DS | |
593 | + | |
594 | + We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary | |
595 | + to allow for larger memory sizes. | |
596 | + | |
597 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
598 | + | |
599 | +commit c51fc5d53c4560abc4d0a6126c06fc68133d1528 | |
600 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
601 | +Date: Fri Jan 23 14:22:13 2009 -0600 | |
602 | + | |
603 | + 85xx: Handle eLBC difference w/36-bit physical | |
604 | + | |
605 | + The eLBC only handles 32-bit physical address in systems with 36-bit | |
606 | + physical. The previos generation of LBC handled 34-bit physical | |
607 | + address in 36-bit systems. Added a new CONFIG option to convey | |
608 | + the difference between the LBC and eLBC. | |
609 | + | |
610 | + Also added defines for XAM bits used in LBC for the extended 34-bit | |
611 | + support. | |
612 | + | |
613 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
614 | + | |
615 | +commit 72a9414a8e21e9536822c7353bc08d21ce5ad53d | |
616 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
617 | +Date: Fri Jan 23 14:22:12 2009 -0600 | |
618 | + | |
619 | + 85xx: Use BR_ADDR macro for NAND chipselects | |
620 | + | |
621 | + Use the new BR_ADDR macro to properly setup the address field of the | |
622 | + localbus chipselects used by NAND. | |
623 | + | |
624 | + This allows us to deal with 36-bit phys on these boards in the future. | |
625 | + | |
626 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
627 | + | |
628 | +commit 2fc7eb0cfc608c9369001d57a0411af5e6a58f7c | |
629 | +Author: Haiying Wang <Haiying.Wang@freescale.com> | |
630 | +Date: Thu Jan 15 11:58:35 2009 -0500 | |
631 | + | |
632 | + Add secondary CPUs processor frequency for e500 core | |
633 | + | |
634 | + This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS, | |
635 | + and prints each CPU's frequency separately. It also fixes up each CPU's | |
636 | + frequency in "clock-frequency" of fdt blob. | |
637 | + | |
638 | + Signed-off-by: James Yang <James.Yang@freescale.com> | |
639 | + Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> | |
640 | + | |
641 | +commit bf5b1f0c0d28ce062e1d368680632dfb099de692 | |
642 | +Author: Dave Liu <daveliu@freescale.com> | |
643 | +Date: Fri Nov 21 16:31:53 2008 +0800 | |
644 | + | |
645 | + 85xx: enable the auto self refresh for wake up ARP | |
646 | + | |
647 | + The wake up ARP feature need use the memory to process | |
648 | + wake up packet, we enable auto self refresh to support it. | |
649 | + | |
650 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
651 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
652 | + | |
653 | +commit b4983e16d150ab7d039704c310aacbd2f4dc1e0f | |
654 | +Author: Dave Liu <daveliu@freescale.com> | |
655 | +Date: Fri Nov 21 16:31:43 2008 +0800 | |
656 | + | |
657 | + fsl-ddr: use the 1T timing as default configuration | |
658 | + | |
659 | + For light loaded system, we use the 1T timing to gain better | |
660 | + memory performance, but for some heavily loaded system, | |
661 | + you have to add the 2T timing options to board files. | |
662 | + | |
663 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
664 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
665 | + | |
666 | +commit 22cca7e1cd54590e967c73558b07ffbdccd39504 | |
667 | +Author: Dave Liu <daveliu@freescale.com> | |
668 | +Date: Fri Nov 21 16:31:35 2008 +0800 | |
669 | + | |
670 | + fsl-ddr: make the self refresh idle threshold configurable | |
671 | + | |
672 | + Some 85xx processors have the advanced power management feature, | |
673 | + such as wake up ARP, that needs enable the automatic self refresh. | |
674 | + | |
675 | + If the DDR controller pass the SR_IT (self refresh idle threshold) | |
676 | + idle cycles, it will automatically enter self refresh. However, | |
677 | + anytime one transaction is issued to the DDR controller, it will | |
678 | + reset the counter and exit self refresh state. | |
679 | + | |
680 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
681 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
682 | + | |
683 | +commit 22ff3d01348e0a2dc369b7efcbac30e4ce86d178 | |
684 | +Author: Dave Liu <daveliu@freescale.com> | |
685 | +Date: Fri Nov 21 16:31:29 2008 +0800 | |
686 | + | |
687 | + fsl-ddr: clean up the ddr code for DDR3 controller | |
688 | + | |
689 | + - The DDR3 controller is expanding the bits for timing config | |
690 | + - Add the DDR3 32-bit bus mode support | |
691 | + | |
692 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
693 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
694 | + | |
695 | +commit 80ee3ce6d7fe9441b4352d7cfaf6afc2507b1106 | |
696 | +Author: Dave Liu <daveliu@freescale.com> | |
697 | +Date: Fri Nov 21 16:31:22 2008 +0800 | |
698 | + | |
699 | + fsl-ddr: update the bit mask for DDR3 controller | |
700 | + | |
701 | + According to the latest 8572 UM, the DDR3 controller | |
702 | + is expanding the bit mask, and we use the extend ACTTOPRE | |
703 | + mode when tRAS more than 19 MCLK. | |
704 | + | |
705 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
706 | + | |
707 | +commit aca5f018a8386b85469482ed9867e3e29a2437d0 | |
708 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
709 | +Date: Tue Dec 2 16:08:40 2008 -0600 | |
710 | + | |
711 | + 85xx: Introduce CONFIG_SYS_PCI*_IO_VIRT for FSL boards | |
712 | + | |
713 | + Introduce a new define to seperate out the virtual address that PCI | |
714 | + IO space is at from the physical address. In most situations these are | |
715 | + mapped 1:1. However any code accessing the bus should use VIRT. | |
716 | + | |
717 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
718 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
719 | + | |
720 | +commit 5af0fdd81c3370c3a51421208fda568bdcbbec23 | |
721 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
722 | +Date: Tue Dec 2 16:08:39 2008 -0600 | |
723 | + | |
724 | + 85xx: Introduce CONFIG_SYS_PCI*_MEM_VIRT for FSL boards | |
725 | + | |
726 | + Introduce a new define to seperate out the virtual address that PCI | |
727 | + memory is at from the physical address. In most situations these are | |
728 | + mapped 1:1. However any code accessing the bus should use VIRT. | |
729 | + | |
730 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
731 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
732 | + | |
733 | +commit a6e04c344ad1eefd47a75484441b385da815b8df | |
734 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
735 | +Date: Tue Dec 2 16:08:38 2008 -0600 | |
736 | + | |
737 | + 85xx: Use CONFIG_SYS_{PCI*,RIO*}_MEM_PHYS for physical address on FSL boards | |
738 | + | |
739 | + Use the _MEM_PHYS defines instead of _MEM_BUS for LAW and real address fields | |
740 | + of TLBs. This is what we should have always been using from the start. | |
741 | + | |
742 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
743 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
744 | + | |
745 | +commit 5f91ef6acdbadec33e0192049e2b24a1d9692f1d | |
746 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
747 | +Date: Tue Dec 2 16:08:37 2008 -0600 | |
748 | + | |
749 | + 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards | |
750 | + | |
751 | + Use CONFIG_SYS_PCI*_IO_BUS for the bus relative address instead | |
752 | + of _IO_BASE so we are more explicit. | |
753 | + | |
754 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
755 | + | |
756 | +commit 10795f42cb94e71bcb262b615084f69dd886399a | |
757 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
758 | +Date: Tue Dec 2 16:08:36 2008 -0600 | |
759 | + | |
760 | + 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards | |
761 | + | |
762 | + Use CONFIG_SYS_{PCI,RIO}_MEM_BUS for the bus relative address instead | |
763 | + of _MEM_BASE so we are more explicit. | |
764 | + | |
765 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
766 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
767 | + | |
768 | +commit c953ddfd56b3ae3f28910fe3aed6de6968d1c9aa | |
769 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
770 | +Date: Tue Dec 2 14:19:34 2008 -0600 | |
771 | + | |
772 | + 85xx: separate FLASH BASE virtual from physical address | |
773 | + | |
774 | + Added a CONFIG_SYS_FLASH_BASE_PHYS for use as the physical address and | |
775 | + maintain CONFIG_SYS_FLASH_BASE as the virtual address of the flash. | |
776 | + | |
777 | + This allows us to deal with 36-bit phys on these boards in the future. | |
778 | + | |
779 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
780 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
781 | + | |
782 | +commit 52b565f5ad23b682489055b187767d8bf1c2e444 | |
783 | +Author: Kumar Gala <galak@kernel.crashing.org> | |
784 | +Date: Tue Dec 2 14:19:33 2008 -0600 | |
785 | + | |
786 | + 85xx: separate PIXIS virtual from physical address | |
787 | + | |
788 | + Added a PIXIS_BASE_PHYS for use as the physical address and maintain | |
789 | + PIXIS_BASE as the virtual address of the PIXIS fpga registers. | |
790 | + | |
791 | + This allows us to deal with 36-bit phys on these boards in the future. | |
792 | + | |
793 | + Signed-off-by: Kumar Gala <galak@kernel.crashing.org> | |
794 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
795 | + | |
796 | +commit 30837e5b21d5a742983581ab9ee3fac085311d19 | |
797 | +Author: Haiying Wang <Haiying.Wang@freescale.com> | |
798 | +Date: Tue Nov 11 08:52:09 2008 -0500 | |
799 | + | |
800 | + Add README file for MPC8572DS board | |
801 | + | |
802 | + Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> | |
803 | + Acked-by: Andy Fleming <afleming@freescale.com> | |
804 | + | |
805 | +commit 6dadc9195ad642cc662632f4d92f92d3d71e8bf2 | |
806 | +Author: Mike Frysinger <vapier@gentoo.org> | |
807 | +Date: Mon Oct 20 16:15:04 2008 -0400 | |
808 | + | |
809 | + Blackfin: use common strmhz() in system output | |
810 | + | |
811 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
812 | + | |
813 | +commit 5bb907a4925397789c90d074f4f7e92ce6b39402 | |
814 | +Author: Ron Madrid <ron_madrid@sbcglobal.net> | |
815 | +Date: Thu Jan 22 15:05:24 2009 -0800 | |
816 | + | |
817 | + mpc83xx: New board support for SIMPC8313 | |
818 | + | |
819 | + This patch will create a new board, SIMPC8313, from Sheldon Instruments. This | |
820 | + board boots from NAND devices and is configureable for either large or small | |
821 | + page devices. The board supports non-soldered DDR2, one ethernet port, a | |
822 | + Marvell 88E1118 PHY, and PCI host support. The board also has a FPGA connected | |
823 | + to the eLBC providing glue logic to a TMS320C67xx DSP. | |
824 | + | |
825 | + Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> | |
826 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
827 | + | |
828 | +commit d4bade8d77aa20e2846fa4accff0e7fa7961a134 | |
829 | +Author: Mike Frysinger <vapier@gentoo.org> | |
830 | +Date: Sun Jan 18 19:46:06 2009 -0500 | |
831 | + | |
832 | + nand: fixup printf modifiers to match types used | |
833 | + | |
834 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
835 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
836 | + | |
837 | +commit 389e6620e2271096df3316917528003627db4021 | |
838 | +Author: Schlaegl Manfred jun <manfred.schlaegl@gmx.at> | |
839 | +Date: Tue Jan 20 16:57:55 2009 +0100 | |
840 | + | |
841 | + nand read.jffs2 (nand_legacy) in common/cmd_nand.c | |
842 | + | |
843 | + Error with CONFIG_NAND_LEGACY in common/cmd_nand.c: | |
844 | + With current code "nand read.jffs2s" (read and skip bad blocks) is always interpreted as | |
845 | + "nand read.jffs2" (read and fill bad blocks with 0xff). This is because ".jffs2" is | |
846 | + tested before ".jffs2s" and only the first two characters are compared. | |
847 | + | |
848 | + Correction: | |
849 | + Test for ".jffs2s" first and compare the first 7 characters. | |
850 | + | |
851 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
852 | + | |
853 | +commit 6c869637fef31e66380f0ea1d49690a2e26ec0d7 | |
854 | +Author: Wolfgang Grandegger <wg@grandegger.com> | |
855 | +Date: Fri Jan 16 18:55:54 2009 +0100 | |
856 | + | |
857 | + NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS | |
858 | + | |
859 | + This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and | |
860 | + changes the default from 8 to 1 for the legacy and the new MTD | |
861 | + NAND layer. This allows to remove all NAND_MAX_CHIPS definitions | |
862 | + in the board config files because none of the boards use multi | |
863 | + chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 | |
864 | + define | |
865 | + | |
866 | + #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE | |
867 | + | |
868 | + but that's bogus and did not work anyhow. | |
869 | + | |
870 | + Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> | |
871 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
872 | + | |
873 | +commit c70564e6b1bd08f3230182392238907f3531a87e | |
874 | +Author: Dave Liu <daveliu@freescale.com> | |
875 | +Date: Tue Dec 2 11:48:51 2008 +0800 | |
876 | + | |
877 | + NAND: Fix cache and memory inconsistency issue | |
878 | + | |
879 | + We load the secondary stage u-boot image from NAND to | |
880 | + system memory by nand_load, but we did not flush d-cache | |
881 | + to memory, nor invalidate i-cache before we jump to RAM. | |
882 | + When the system has cache enabled and the TLB/page attribute | |
883 | + of system memory is cacheable, it will cause issues. | |
884 | + | |
885 | + - 83xx family is using the d-cache lock, so all of d-cache | |
886 | + access is cache-inhibited. so you can't see the issue. | |
887 | + - 85xx family is using d-cache, i-cache enable, partial | |
888 | + cache lock. you will see the issue. | |
889 | + | |
890 | + This patch fixes the cache issue. | |
891 | + | |
892 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
893 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
894 | + | |
895 | +commit 50657c273278f74378e1ac39b41d612b92fdffa0 | |
896 | +Author: Nishanth Menon <menon.nishanth@gmail.com> | |
897 | +Date: Sat Dec 13 09:43:06 2008 -0600 | |
898 | + | |
899 | + NAND: Enable nand lock, unlock feature | |
900 | + | |
901 | + Enable nand lock, unlock and status of lock feature. | |
902 | + Not every device and platform requires this, hence, | |
903 | + it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK | |
904 | + | |
905 | + Nand unlock and status operate on block boundary instead | |
906 | + of page boundary. Details in: | |
907 | + http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT | |
908 | + | |
909 | + Intial solution provided by Vikram Pandita <vikram.pandita@ti.com> | |
910 | + Includes preliminary suggestions from Scott Wood | |
911 | + | |
912 | + Signed-off-by: Nishanth Menon <nm@ti.com> | |
913 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
914 | + | |
915 | +commit 69fb8be4fc07162fdf6edf04bdc7233b0e9a920e | |
916 | +Author: Mike Frysinger <vapier@gentoo.org> | |
917 | +Date: Sat Dec 6 02:40:55 2008 -0500 | |
918 | + | |
919 | + NAND: move board_nand_init to nand.h | |
920 | + | |
921 | + Rather than putting the function prototype for board_nand_init() in the one | |
922 | + place where it gets called, put it into nand.h so that every place that also | |
923 | + defines it gets the prototype. Otherwise, errors can go silently unnoticed | |
924 | + such as using the wrong return value (void rather than int) when defining | |
925 | + the function. | |
926 | + | |
927 | + Signed-off-by: Mike Frysinger <vapier@gentoo.org> | |
928 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
929 | + | |
930 | +commit 1ae39862044ebb1e682234b51f94421e3f871d6a | |
931 | +Author: Stefan Roese <sr@denx.de> | |
932 | +Date: Tue Dec 2 11:06:47 2008 +0100 | |
933 | + | |
934 | + OneNAND: Additional sync with 2.6.27 | |
935 | + | |
936 | + - Add subpage write support | |
937 | + - Add onenand_oob_64/32 ecclayout | |
938 | + | |
939 | + This has been missing and without it UBI has some incompatibilies issues | |
940 | + with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is | |
941 | + placed differently (2048 instead of 512) without this fix. | |
942 | + | |
943 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
944 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
945 | + | |
946 | +commit 1714f51a2009baaecf3d4f6e3bd8c4e93a8d3f23 | |
947 | +Author: Kyungmin Park <kmpark@infradead.org> | |
948 | +Date: Thu Nov 13 15:14:33 2008 +0900 | |
949 | + | |
950 | + Add markbad function | |
951 | + | |
952 | + Add missing markbad function | |
953 | + If not, it's hang when it entered the mtd->mark_bad(). | |
954 | + | |
955 | + Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> | |
956 | + | |
957 | +commit c438ea175d8d002c1063b7a94b0c0e26668d1ac9 | |
958 | +Author: Stefan Roese <sr@denx.de> | |
959 | +Date: Wed Nov 12 13:47:24 2008 +0100 | |
960 | + | |
961 | + OneNAND: Bad block aware read/write command support | |
962 | + | |
963 | + Update OneNAND command to support bad block awareness. | |
964 | + Also change the OneNAND command style to better match the | |
965 | + NAND version. | |
966 | + | |
967 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
968 | + Acked-by: Kyungmin Park <kyungmin.park@samsung.com> | |
969 | + | |
970 | +commit 8cf11f3aa78673730e9ecbbe4b75213b53f212c8 | |
971 | +Author: Stefan Roese <sr@denx.de> | |
972 | +Date: Tue Nov 11 10:29:09 2008 +0100 | |
973 | + | |
974 | + OneNAND: Save version_id in onenand_chip struct | |
975 | + | |
976 | + The version (ver_id) was not stored in the onenand_chip structure and | |
977 | + because of this the continuous locking scheme could be enabled on some | |
978 | + chips. | |
979 | + | |
980 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
981 | + | |
982 | +commit 4fca3310d611cc0f51d7295ef3557afbdbd91dc3 | |
983 | +Author: Stefan Roese <sr@denx.de> | |
984 | +Date: Tue Nov 11 10:28:53 2008 +0100 | |
985 | + | |
986 | + OneNAND: Fix compiler warnings | |
987 | + | |
988 | + Signed-off-by: Stefan Roese <sr@denx.de> | |
989 | + | |
990 | +commit 1ac5744e33ee0aa6d6ddab3b99f9e70953156e69 | |
991 | +Author: Dave Liu <daveliu@freescale.com> | |
992 | +Date: Tue Nov 4 14:55:06 2008 +0800 | |
993 | + | |
994 | + mpc83xx: enable eLBC NAND support for MPC8315ERDB board | |
995 | + | |
996 | + Signed-off-by: Dave Liu <daveliu@freescale.com> | |
997 | + | |
998 | +commit ef0921d6b05aeb9034158f9bef5323d6da9c925e | |
999 | +Author: Kyungmin Park <kmpark@infradead.org> | |
1000 | +Date: Tue Nov 4 09:24:07 2008 +0900 | |
1001 | + | |
1002 | + Sync with 2.6.27 | |
1003 | + | |
1004 | + Sync with OneNAND kernel codes | |
1005 | + | |
1006 | + Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> | |
1007 | + | |
1008 | +commit e7f325be9edeb84bb457301776bbac1f7257dafc | |
1009 | +Author: Michal Simek <monstr@monstr.eu> | |
1010 | +Date: Mon Jan 5 13:35:31 2009 +0100 | |
1011 | + | |
1012 | + microblaze: Use cache functions (especially cache status) | |
1013 | + in systems which are configured without flash | |
1014 | + | |
1015 | +commit e9b737deb2c30125362d20e24170617476026e94 | |
1016 | +Author: Michal Simek <monstr@monstr.eu> | |
1017 | +Date: Mon Jan 5 13:29:32 2009 +0100 | |
1018 | + | |
1019 | + microblaze: Add cache flush | |
1020 | + | |
1021 | +commit b4f8dda35bfad447b4106828232705b2e878d168 | |
1022 | +Author: Michal Simek <monstr@monstr.eu> | |
1023 | +Date: Mon Jan 5 13:28:40 2009 +0100 | |
1024 | + | |
1025 | + microblaze: Add bootup messages to board.c | |
1026 | + | |
1027 | +commit 330e55459bc9983341da6c1d5c7fe00a664436fe | |
1028 | +Author: Michal Simek <monstr@monstr.eu> | |
1029 | +Date: Fri Dec 19 13:25:55 2008 +0100 | |
1030 | + | |
1031 | + microblaze: Change microblaze-generic config file | |
1032 | + | |
1033 | + Signed-off-by: Michal Simek <monstr@monstr.eu> | |
1034 | + | |
1035 | +commit 52a822ed9c37a2ea0ed112a26d8ff5a6cb1c6f10 | |
1036 | +Author: Michal Simek <monstr@monstr.eu> | |
1037 | +Date: Fri Dec 19 13:14:05 2008 +0100 | |
1038 | + | |
1039 | + microblaze: Rename ml401 to microblaze-generic | |
1040 | + | |
1041 | + Signed-off-by: Michal Simek <monstr@monstr.eu> | |
1042 | + | |
1043 | +commit 6677876181cc8772bca8a372479a500d160f3993 | |
1044 | +Author: Scott Wood <scottwood@freescale.com> | |
1045 | +Date: Tue Jan 20 11:56:11 2009 -0600 | |
1046 | + | |
1047 | + 83xx: Use the proper sequence for updating IMMR. | |
1048 | + | |
1049 | + This ensures that subsequent accesses properly hit the new window. | |
1050 | + | |
1051 | + The dcbi during the NAND loop was accidentally working around this; | |
1052 | + it's no longer necessary, as the cache is not enabled. | |
1053 | + | |
1054 | + Reported-by: Suchit Lepcha <Suchit.Lepcha@freescale.com> | |
1055 | + Signed-off-by: Scott Wood <scottwood@freescale.com> | |
1056 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1057 | + | |
1058 | +commit 8b34557c546e5e9f34ebf83c93413dad973d93df | |
1059 | +Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
1060 | +Date: Thu Jan 8 04:26:19 2009 +0300 | |
1061 | + | |
1062 | + mpc83xx: Add PCI-E support for MPC837XEMDS boards | |
1063 | + | |
1064 | + MPC837XEMDS boards can support PCI-E via "PCI-E riser card". The card | |
1065 | + provides two PCI-E (x2) ports. Though, only one port can be used in x2 | |
1066 | + mode. Two ports can function simultaneously in x1 mode. | |
1067 | + | |
1068 | + PCI-E x1/x2 modes can be switched via "pex_x2" environment variable. | |
1069 | + | |
1070 | + Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> | |
1071 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1072 | + | |
1073 | +commit 8f11e34b31a7be124a3239653f33af9510502045 | |
1074 | +Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
1075 | +Date: Thu Jan 8 04:26:17 2009 +0300 | |
1076 | + | |
1077 | + mpc83xx: Add PCI-E support for MPC8315ERDB boards | |
1078 | + | |
1079 | + MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's | |
1080 | + support them. | |
1081 | + | |
1082 | + Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> | |
1083 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1084 | + | |
1085 | +commit fd6646c0b9ebe7e5afc4ae4c78097d9cd317a5e8 | |
1086 | +Author: Anton Vorontsov <avorontsov@ru.mvista.com> | |
1087 | +Date: Thu Jan 8 04:26:12 2009 +0300 | |
1088 | + | |
1089 | + mpc83xx: Add support for MPC83xx PCI-E controllers | |
1090 | + | |
1091 | + This patch adds support for MPC83xx PCI-E controllers in Root Complex | |
1092 | + mode. | |
1093 | + | |
1094 | + The patch is based on Tony Li and Dave Liu work[1]. | |
1095 | + | |
1096 | + Though unlike the original patch, by default we don't register PCI-E | |
1097 | + buses for use in U-Boot, we only configure the controllers for future | |
1098 | + use in other OSes (Linux). This is done because we don't have enough | |
1099 | + of spare BATs to map all the PCI-E regions. | |
1100 | + | |
1101 | + To actually use PCI-E in U-Boot, users should explicitly define | |
1102 | + CONFIG_83XX_GENERIC_PCIE_REGISTER_HOSES symbol in the board file. And | |
1103 | + only then U-Boot will able to access PCI-E, but at the cost of disabled | |
1104 | + address translation. | |
1105 | + | |
1106 | + [1] http://lists.denx.de/pipermail/u-boot/2008-January/027630.html | |
1107 | + | |
1108 | + Signed-off-by: Tony Li <tony.li@freescale.com> | |
1109 | + Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> | |
1110 | + Acked-by: Dave Liu <daveliu@freescale.com> | |
1111 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1112 | + | |
1113 | +commit 88ecf55cabd7aea28fe8093720e208f53ccfdcf5 | |
1114 | +Author: Ira Snyder <iws@ovro.caltech.edu> | |
1115 | +Date: Mon Jan 12 13:33:17 2009 -0800 | |
1116 | + | |
1117 | + MPC8349EMDS: do not setup unused PCI clock outputs in PCI agent mode | |
1118 | + | |
1119 | + When running in PCI agent mode, the PCI_CLK_OUT signals are not used, so do | |
1120 | + not enable them. See the MPC8349EA Reference Manual, Section 4.4.2 | |
1121 | + "Clocking in PCI Agent Mode". | |
1122 | + | |
1123 | + Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> | |
1124 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1125 | + | |
1126 | +commit 75f35209f702bb26826855ed8c8e4d108ab5f412 | |
1127 | +Author: Ira Snyder <iws@ovro.caltech.edu> | |
1128 | +Date: Mon Jan 12 13:32:26 2009 -0800 | |
1129 | + | |
1130 | + 83xx: PCI agent mode fixes for multi-board systems | |
1131 | + | |
1132 | + When running a system with 2 or more MPC8349EMDS boards in PCI agent mode, | |
1133 | + the boards will lock up the PCI bus by scanning against each other. | |
1134 | + | |
1135 | + The boards lock against each other by trying to access the PCI bus before | |
1136 | + clearing their configuration lock bit. Both boards end up in a loop, | |
1137 | + sending and receiving "Target Not Ready" messages forever. | |
1138 | + | |
1139 | + When running in PCI agent mode, the scanning now takes place after the | |
1140 | + boards have cleared their configuration lock bit. | |
1141 | + | |
1142 | + Also, add a missing declaration to the mpc83xx.h header file, fixing a | |
1143 | + build warning. | |
1144 | + | |
1145 | + Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> | |
1146 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1147 | + | |
1148 | +commit 455a46915b82896cc2070eb326d075555c2bc580 | |
1149 | +Author: Ron Madrid <ron_madrid@sbcglobal.net> | |
1150 | +Date: Fri Dec 12 13:12:45 2008 -0800 | |
1151 | + | |
1152 | + mpc83xx: Size optimization of start.S | |
1153 | + | |
1154 | + Currently there are in excess of 100 bytes located at the beginning of the image | |
1155 | + built by start.S that are not being utilized. This patch moves a few functions | |
1156 | + into this part of the image. This will create a greater number of *available* | |
1157 | + bytes that can be used by board specific code in NAND builds and will decrease | |
1158 | + the size of the assembled code in other builds. | |
1159 | + | |
1160 | + Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> | |
1161 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
1162 | + | |
1163 | +commit 72d15e705bc3983884105cb7755c7ba80e74a0a5 | |
1164 | +Author: Wolfgang Denk <wd@denx.de> | |
1165 | +Date: Wed Jan 21 23:08:12 2009 +0100 | |
1166 | + | |
1167 | + Prepare v2009.01 | |
1168 | + | |
1169 | + Signed-off-by: Wolfgang Denk <wd@denx.de> | |
1170 | + | |
1 | 1171 | commit 635e5f8fc82365e6e9734b3132bc95135a6de679 |
2 | 1172 | Author: Wolfgang Denk <wd@denx.de> |
3 | 1173 | Date: Sun Jan 18 21:37:48 2009 +0100 |
... | ... | @@ -725,6 +1895,20 @@ |
725 | 1895 | |
726 | 1896 | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
727 | 1897 | |
1898 | +commit 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb | |
1899 | +Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | |
1900 | +Date: Wed Dec 17 16:43:18 2008 +0100 | |
1901 | + | |
1902 | + avr32: Remove second definition of virt_to_phys() | |
1903 | + | |
1904 | + The second definition introduced by 65e43a1063 conflicts with the | |
1905 | + existing one. | |
1906 | + | |
1907 | + Also, convert the existing definition to use phys_addr_t. The volatile | |
1908 | + qualifier is still needed due to brain damage elsewhere. | |
1909 | + | |
1910 | + Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | |
1911 | + | |
728 | 1912 | commit b616f2b545f73757669b37386f0b37bb61fc6797 |
729 | 1913 | Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
730 | 1914 | Date: Mon Sep 8 22:27:18 2008 +0200 |
... | ... | @@ -2357,6 +3541,32 @@ |
2357 | 3541 | Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> |
2358 | 3542 | Signed-off-by: Stefan Roese <sr@denx.de> |
2359 | 3543 | |
3544 | +commit 633639587e3596f0dbf5e6247dd3faf80b1d9063 | |
3545 | +Author: Heiko Schocher <hs@denx.de> | |
3546 | +Date: Thu Nov 20 09:59:09 2008 +0100 | |
3547 | + | |
3548 | + powerpc, keymile boards: extract identical config options | |
3549 | + | |
3550 | + This patch extracts the identical config options for the | |
3551 | + keymile boards mgcoge, mgsuvd and kmeter1 in a new | |
3552 | + common config file keymile-common.h. | |
3553 | + | |
3554 | + Signed-off-by: Heiko Schocher <hs@denx.de> | |
3555 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
3556 | + | |
3557 | +commit 9482a8e3d6ac766d90e5059dce777b1e4c868a30 | |
3558 | +Author: Heiko Schocher <hs@denx.de> | |
3559 | +Date: Fri Nov 21 08:29:40 2008 +0100 | |
3560 | + | |
3561 | + powerpc: keymile: Add a check for the PIGGY debug board | |
3562 | + | |
3563 | + Check the presence of the PIGGY on the keymile boards mgcoge, | |
3564 | + mgsuvd and kmeter1. If the PIGGY is not present, dont register | |
3565 | + this Ethernet device. | |
3566 | + | |
3567 | + Signed-off-by: Heiko Schocher <hs@denx.de> | |
3568 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
3569 | + | |
2360 | 3570 | commit 58c696eed839af894e0265064669c402dc28b371 |
2361 | 3571 | Author: Wolfgang Denk <wd@xpert.denx.de> |
2362 | 3572 | Date: Mon Nov 24 21:50:59 2008 +0100 |
... | ... | @@ -2630,6 +3840,24 @@ |
2630 | 3840 | corresponding board clocks. |
2631 | 3841 | |
2632 | 3842 | Signed-off-by: Stelian Pop <stelian@popies.net> |
3843 | + | |
3844 | +commit fed36ac5ae613773b6cd90e61e292c45440e10c8 | |
3845 | +Author: Heiko Schocher <hs@denx.de> | |
3846 | +Date: Thu Nov 20 09:57:47 2008 +0100 | |
3847 | + | |
3848 | + powerpc: 83xx: add support for the kmeter1 board | |
3849 | + | |
3850 | + This patch adds support for the kmeter1 board from Keymile, | |
3851 | + based on a Freescale MPC8360 CPU. | |
3852 | + | |
3853 | + - serial console on UART 1 | |
3854 | + - 256 MB DDR2 RAM | |
3855 | + - 64 MB NOR Flash | |
3856 | + - Ethernet RMII Mode over UCC4 | |
3857 | + - PHY SMSC LAN8700 | |
3858 | + | |
3859 | + Signed-off-by: Heiko Schocher <hs@denx.de> | |
3860 | + Signed-off-by: Kim Phillips <kim.phillips@freescale.com> | |
2633 | 3861 | |
2634 | 3862 | commit 25fb4eaaeab3f8866020818f4729d990dcc91cf0 |
2635 | 3863 | Author: Stefan Roese <sr@denx.de> |