Commit 648539c906bb3b039b503b9b6325076eff4d9e5d
Committed by
Stefano Babic
1 parent
75a565f297
Exists in
v2017.01-smarct4x
and in
33 other branches
arm: imx-common: init: rework wdog settings for imx6/imx7
Rework imx_set_wdog_powerdown to be reused by imx6 and imx7 Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Showing 3 changed files with 22 additions and 14 deletions Side-by-side Diff
arch/arm/cpu/armv7/mx6/soc.c
| ... | ... | @@ -250,20 +250,6 @@ |
| 250 | 250 | return 0; |
| 251 | 251 | } |
| 252 | 252 | |
| 253 | -static void imx_set_wdog_powerdown(bool enable) | |
| 254 | -{ | |
| 255 | - struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; | |
| 256 | - struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; | |
| 257 | - struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR; | |
| 258 | - | |
| 259 | - if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL)) | |
| 260 | - writew(enable, &wdog3->wmcr); | |
| 261 | - | |
| 262 | - /* Write to the PDE (Power Down Enable) bit */ | |
| 263 | - writew(enable, &wdog1->wmcr); | |
| 264 | - writew(enable, &wdog2->wmcr); | |
| 265 | -} | |
| 266 | - | |
| 267 | 253 | static void set_ahb_rate(u32 val) |
| 268 | 254 | { |
| 269 | 255 | struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; |
arch/arm/imx-common/init.c
| ... | ... | @@ -66,6 +66,27 @@ |
| 66 | 66 | } |
| 67 | 67 | } |
| 68 | 68 | |
| 69 | +void imx_set_wdog_powerdown(bool enable) | |
| 70 | +{ | |
| 71 | + struct wdog_regs *wdog1 = (struct wdog_regs *)WDOG1_BASE_ADDR; | |
| 72 | + struct wdog_regs *wdog2 = (struct wdog_regs *)WDOG2_BASE_ADDR; | |
| 73 | + struct wdog_regs *wdog3 = (struct wdog_regs *)WDOG3_BASE_ADDR; | |
| 74 | +#ifdef CONFIG_MX7D | |
| 75 | + struct wdog_regs *wdog4 = (struct wdog_regs *)WDOG4_BASE_ADDR; | |
| 76 | +#endif | |
| 77 | + | |
| 78 | + /* Write to the PDE (Power Down Enable) bit */ | |
| 79 | + writew(enable, &wdog1->wmcr); | |
| 80 | + writew(enable, &wdog2->wmcr); | |
| 81 | + | |
| 82 | + if (is_cpu_type(MXC_CPU_MX6SX) || is_cpu_type(MXC_CPU_MX6UL) || | |
| 83 | + is_soc_type(MXC_SOC_MX7)) | |
| 84 | + writew(enable, &wdog3->wmcr); | |
| 85 | +#ifdef CONFIG_MX7D | |
| 86 | + writew(enable, &wdog4->wmcr); | |
| 87 | +#endif | |
| 88 | +} | |
| 89 | + | |
| 69 | 90 | #define SRC_SCR_WARM_RESET_ENABLE 0 |
| 70 | 91 | |
| 71 | 92 | void init_src(void) |