Eric Lee / smarc-uboot

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Commit 649d0ffbc1eca693726937ff40e7d7ab852f4ae9

Authored by Simon Glass
Committed by Albert ARIBAUD
1 parent d376e8d228
Exists in master and in 54 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

tegra: Enable LP0 on Seaboard 

This enables LP0 to support suspend / resume on Seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

Showing 2 changed files with 25 additions and 0 deletions Inline Diff

include/configs/seaboard.h
Diff comments   View file @ 649d0ff
1 /* 1 /*
2 * (C) Copyright 2010,2011 2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com> 3 * NVIDIA Corporation <www.nvidia.com>
4 * 4 *
5 * See file CREDITS for list of people who contributed to this 5 * See file CREDITS for list of people who contributed to this
6 * project. 6 * project.
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as 9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of 10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version. 11 * the License, or (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA 21 * MA 02111-1307 USA
22 */ 22 */
23 23
24 #ifndef __CONFIG_H 24 #ifndef __CONFIG_H
25 #define __CONFIG_H 25 #define __CONFIG_H
26 26
27 #include <asm/sizes.h> 27 #include <asm/sizes.h>
28
29 /* LP0 suspend / resume */
30 #define CONFIG_TEGRA2_LP0
31 #define CONFIG_AES
32 #define CONFIG_TEGRA_PMU
33 #define CONFIG_TPS6586X_POWER
34 #define CONFIG_TEGRA_CLOCK_SCALING
35
28 #include "tegra2-common.h" 36 #include "tegra2-common.h"
29 37
30 /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */ 38 /* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
31 #define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard 39 #define CONFIG_DEFAULT_DEVICE_TREE tegra2-seaboard
32 #define CONFIG_OF_CONTROL 40 #define CONFIG_OF_CONTROL
33 #define CONFIG_OF_SEPARATE 41 #define CONFIG_OF_SEPARATE
34 42
35 /* High-level configuration options */ 43 /* High-level configuration options */
36 #define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M" 44 #define TEGRA2_SYSMEM "mem=384M@0M nvmem=128M@384M mem=512M@512M"
37 #define V_PROMPT "Tegra2 (SeaBoard) # " 45 #define V_PROMPT "Tegra2 (SeaBoard) # "
38 #define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard" 46 #define CONFIG_TEGRA2_BOARD_STRING "NVIDIA Seaboard"
39 47
40 /* Board-specific serial config */ 48 /* Board-specific serial config */
41 #define CONFIG_SERIAL_MULTI 49 #define CONFIG_SERIAL_MULTI
42 #define CONFIG_TEGRA2_ENABLE_UARTD 50 #define CONFIG_TEGRA2_ENABLE_UARTD
43 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE 51 #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
44 52
45 /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */ 53 /* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
46 #define CONFIG_UART_DISABLE_GPIO GPIO_PI3 54 #define CONFIG_UART_DISABLE_GPIO GPIO_PI3
47 55
48 #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD 56 #define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
49 #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */ 57 #define CONFIG_SYS_BOARD_ODMDATA 0x300d8011 /* lp1, 1GB */
50 58
51 #define CONFIG_BOARD_EARLY_INIT_F 59 #define CONFIG_BOARD_EARLY_INIT_F
52 60
53 /* SPI */ 61 /* SPI */
54 #define CONFIG_TEGRA2_SPI 62 #define CONFIG_TEGRA2_SPI
55 #define CONFIG_SPI_FLASH 63 #define CONFIG_SPI_FLASH
56 #define CONFIG_SPI_FLASH_WINBOND 64 #define CONFIG_SPI_FLASH_WINBOND
57 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 65 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
58 #define CONFIG_CMD_SPI 66 #define CONFIG_CMD_SPI
59 #define CONFIG_CMD_SF 67 #define CONFIG_CMD_SF
60 #define CONFIG_SPI_FLASH_SIZE (4 << 20) 68 #define CONFIG_SPI_FLASH_SIZE (4 << 20)
61 69
62 /* I2C */ 70 /* I2C */
63 #define CONFIG_TEGRA_I2C 71 #define CONFIG_TEGRA_I2C
64 #define CONFIG_SYS_I2C_INIT_BOARD 72 #define CONFIG_SYS_I2C_INIT_BOARD
65 #define CONFIG_I2C_MULTI_BUS 73 #define CONFIG_I2C_MULTI_BUS
66 #define CONFIG_SYS_MAX_I2C_BUS 4 74 #define CONFIG_SYS_MAX_I2C_BUS 4
67 #define CONFIG_SYS_I2C_SPEED 100000 75 #define CONFIG_SYS_I2C_SPEED 100000
68 #define CONFIG_CMD_I2C 76 #define CONFIG_CMD_I2C
69 77
70 /* SD/MMC */ 78 /* SD/MMC */
71 #define CONFIG_MMC 79 #define CONFIG_MMC
72 #define CONFIG_GENERIC_MMC 80 #define CONFIG_GENERIC_MMC
73 #define CONFIG_TEGRA2_MMC 81 #define CONFIG_TEGRA2_MMC
74 #define CONFIG_CMD_MMC 82 #define CONFIG_CMD_MMC
75 83
76 #define CONFIG_DOS_PARTITION 84 #define CONFIG_DOS_PARTITION
77 #define CONFIG_EFI_PARTITION 85 #define CONFIG_EFI_PARTITION
78 #define CONFIG_CMD_EXT2 86 #define CONFIG_CMD_EXT2
79 #define CONFIG_CMD_FAT 87 #define CONFIG_CMD_FAT
80 88
81 /* Environment in SPI */ 89 /* Environment in SPI */
82 #define CONFIG_ENV_IS_IN_SPI_FLASH 90 #define CONFIG_ENV_IS_IN_SPI_FLASH
83 #define CONFIG_ENV_SPI_MAX_HZ 48000000 91 #define CONFIG_ENV_SPI_MAX_HZ 48000000
84 #define CONFIG_ENV_SPI_MODE SPI_MODE_0 92 #define CONFIG_ENV_SPI_MODE SPI_MODE_0
85 93
86 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE 94 #define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
87 #define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE) 95 #define CONFIG_ENV_OFFSET (CONFIG_SPI_FLASH_SIZE - CONFIG_ENV_SECT_SIZE)
88 96
89 /* USB Host support */ 97 /* USB Host support */
90 #define CONFIG_USB_EHCI 98 #define CONFIG_USB_EHCI
91 #define CONFIG_USB_EHCI_TEGRA 99 #define CONFIG_USB_EHCI_TEGRA
92 #define CONFIG_USB_STORAGE 100 #define CONFIG_USB_STORAGE
93 #define CONFIG_CMD_USB 101 #define CONFIG_CMD_USB
94 102
95 #endif /* __CONFIG_H */ 103 #endif /* __CONFIG_H */
96 104
include/configs/tegra2-common.h
Diff comments   View file @ 649d0ff
1 /* 1 /*
2 * (C) Copyright 2010,2011 2 * (C) Copyright 2010,2011
3 * NVIDIA Corporation <www.nvidia.com> 3 * NVIDIA Corporation <www.nvidia.com>
4 * 4 *
5 * See file CREDITS for list of people who contributed to this 5 * See file CREDITS for list of people who contributed to this
6 * project. 6 * project.
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as 9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of 10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version. 11 * the License, or (at your option) any later version.
12 * 12 *
13 * This program is distributed in the hope that it will be useful, 13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details. 16 * GNU General Public License for more details.
17 * 17 *
18 * You should have received a copy of the GNU General Public License 18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software 19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA 21 * MA 02111-1307 USA
22 */ 22 */
23 23
24 #ifndef __TEGRA2_COMMON_H 24 #ifndef __TEGRA2_COMMON_H
25 #define __TEGRA2_COMMON_H 25 #define __TEGRA2_COMMON_H
26 #include <asm/sizes.h> 26 #include <asm/sizes.h>
27 27
28 /* 28 /*
29 * QUOTE(m) will evaluate to a string version of the value of the macro m
30 * passed in. The extra level of indirection here is to first evaluate the
31 * macro m before applying the quoting operator.
32 */
33 #define QUOTE_(m) #m
34 #define QUOTE(m) QUOTE_(m)
35
36 /*
29 * High Level Configuration Options 37 * High Level Configuration Options
30 */ 38 */
31 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */ 39 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
32 #define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */ 40 #define CONFIG_TEGRA2 /* in a NVidia Tegra2 core */
33 #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ 41 #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */
34 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ 42 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
35 43
36 #define CONFIG_SYS_CACHELINE_SIZE 32 44 #define CONFIG_SYS_CACHELINE_SIZE 32
37 45
38 #define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */ 46 #define CONFIG_ARCH_CPU_INIT /* Fire up the A9 core */
39 47
40 #include <asm/arch/tegra2.h> /* get chip and board defs */ 48 #include <asm/arch/tegra2.h> /* get chip and board defs */
41 49
42 /* 50 /*
43 * Display CPU and Board information 51 * Display CPU and Board information
44 */ 52 */
45 #define CONFIG_DISPLAY_CPUINFO 53 #define CONFIG_DISPLAY_CPUINFO
46 #define CONFIG_DISPLAY_BOARDINFO 54 #define CONFIG_DISPLAY_BOARDINFO
47 55
48 #define CONFIG_SKIP_LOWLEVEL_INIT 56 #define CONFIG_SKIP_LOWLEVEL_INIT
49 57
50 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 58 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
51 #define CONFIG_OF_LIBFDT /* enable passing of devicetree */ 59 #define CONFIG_OF_LIBFDT /* enable passing of devicetree */
60
61 #ifdef CONFIG_TEGRA2_LP0
62 #define TEGRA_LP0_ADDR 0x1C406000
63 #define TEGRA_LP0_SIZE 0x2000
64 #define TEGRA_LP0_VEC \
65 "lp0_vec=" QUOTE(TEGRA_LP0_SIZE) "@" QUOTE(TEGRA_LP0_ADDR) " "
66 #else
67 #define TEGRA_LP0_VEC
68 #endif
52 69
53 /* Environment */ 70 /* Environment */
54 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */ 71 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
55 72
56 /* 73 /*
57 * Size of malloc() pool 74 * Size of malloc() pool
58 */ 75 */
59 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */ 76 #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MB */
60 77
61 /* 78 /*
62 * PllX Configuration 79 * PllX Configuration
63 */ 80 */
64 #define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */ 81 #define CONFIG_SYS_CPU_OSC_FREQUENCY 1000000 /* Set CPU clock to 1GHz */
65 82
66 /* 83 /*
67 * NS16550 Configuration 84 * NS16550 Configuration
68 */ 85 */
69 #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */ 86 #define V_NS16550_CLK 216000000 /* 216MHz (pllp_out0) */
70 87
71 #define CONFIG_SYS_NS16550 88 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_SERIAL 89 #define CONFIG_SYS_NS16550_SERIAL
73 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 90 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
74 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 91 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
75 92
76 /* 93 /*
77 * select serial console configuration 94 * select serial console configuration
78 */ 95 */
79 #define CONFIG_CONS_INDEX 1 96 #define CONFIG_CONS_INDEX 1
80 97
81 /* allow to overwrite serial and ethaddr */ 98 /* allow to overwrite serial and ethaddr */
82 #define CONFIG_ENV_OVERWRITE 99 #define CONFIG_ENV_OVERWRITE
83 #define CONFIG_BAUDRATE 115200 100 #define CONFIG_BAUDRATE 115200
84 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 101 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
85 115200} 102 115200}
86 103
87 /* 104 /*
88 * This parameter affects a TXFILLTUNING field that controls how much data is 105 * This parameter affects a TXFILLTUNING field that controls how much data is
89 * sent to the latency fifo before it is sent to the wire. Without this 106 * sent to the latency fifo before it is sent to the wire. Without this
90 * parameter, the default (2) causes occasional Data Buffer Errors in OUT 107 * parameter, the default (2) causes occasional Data Buffer Errors in OUT
91 * packets depending on the buffer address and size. 108 * packets depending on the buffer address and size.
92 */ 109 */
93 #define CONFIG_USB_EHCI_TXFIFO_THRESH 10 110 #define CONFIG_USB_EHCI_TXFIFO_THRESH 10
94 #define CONFIG_EHCI_IS_TDI 111 #define CONFIG_EHCI_IS_TDI
95 #define CONFIG_EHCI_DCACHE 112 #define CONFIG_EHCI_DCACHE
96 113
97 /* Total I2C ports on Tegra2 */ 114 /* Total I2C ports on Tegra2 */
98 #define TEGRA_I2C_NUM_CONTROLLERS 4 115 #define TEGRA_I2C_NUM_CONTROLLERS 4
99 116
100 /* include default commands */ 117 /* include default commands */
101 #include <config_cmd_default.h> 118 #include <config_cmd_default.h>
102 119
103 /* remove unused commands */ 120 /* remove unused commands */
104 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */ 121 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
105 #undef CONFIG_CMD_FPGA /* FPGA configuration support */ 122 #undef CONFIG_CMD_FPGA /* FPGA configuration support */
106 #undef CONFIG_CMD_IMI 123 #undef CONFIG_CMD_IMI
107 #undef CONFIG_CMD_IMLS 124 #undef CONFIG_CMD_IMLS
108 #undef CONFIG_CMD_NFS /* NFS support */ 125 #undef CONFIG_CMD_NFS /* NFS support */
109 #undef CONFIG_CMD_NET /* network support */ 126 #undef CONFIG_CMD_NET /* network support */
110 127
111 /* turn on command-line edit/hist/auto */ 128 /* turn on command-line edit/hist/auto */
112 #define CONFIG_CMDLINE_EDITING 129 #define CONFIG_CMDLINE_EDITING
113 #define CONFIG_COMMAND_HISTORY 130 #define CONFIG_COMMAND_HISTORY
114 #define CONFIG_AUTO_COMPLETE 131 #define CONFIG_AUTO_COMPLETE
115 132
116 #define CONFIG_SYS_NO_FLASH 133 #define CONFIG_SYS_NO_FLASH
117 134
118 /* Environment information */ 135 /* Environment information */
119 #define CONFIG_EXTRA_ENV_SETTINGS \ 136 #define CONFIG_EXTRA_ENV_SETTINGS \
120 "console=ttyS0,115200n8\0" \ 137 "console=ttyS0,115200n8\0" \
121 "mem=" TEGRA2_SYSMEM "\0" \ 138 "mem=" TEGRA2_SYSMEM "\0" \
122 "smpflag=smp\0" \ 139 "smpflag=smp\0" \
123 140
124 #define CONFIG_LOADADDR 0x408000 /* def. location for kernel */ 141 #define CONFIG_LOADADDR 0x408000 /* def. location for kernel */
125 #define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */ 142 #define CONFIG_BOOTDELAY 2 /* -1 to disable auto boot */
126 143
127 /* 144 /*
128 * Miscellaneous configurable options 145 * Miscellaneous configurable options
129 */ 146 */
130 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 147 #define CONFIG_SYS_LONGHELP /* undef to save memory */
131 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 148 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
132 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 149 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
133 #define CONFIG_SYS_PROMPT V_PROMPT 150 #define CONFIG_SYS_PROMPT V_PROMPT
134 /* 151 /*
135 * Increasing the size of the IO buffer as default nfsargs size is more 152 * Increasing the size of the IO buffer as default nfsargs size is more
136 * than 256 and so it is not possible to edit it 153 * than 256 and so it is not possible to edit it
137 */ 154 */
138 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */ 155 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
139 /* Print Buffer Size */ 156 /* Print Buffer Size */
140 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 157 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
141 sizeof(CONFIG_SYS_PROMPT) + 16) 158 sizeof(CONFIG_SYS_PROMPT) + 16)
142 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 159 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
143 /* Boot Argument Buffer Size */ 160 /* Boot Argument Buffer Size */
144 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 161 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
145 162
146 #define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000) 163 #define CONFIG_SYS_MEMTEST_START (TEGRA2_SDRC_CS0 + 0x600000)
147 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000) 164 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
148 165
149 #define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */ 166 #define CONFIG_SYS_LOAD_ADDR (0xA00800) /* default */
150 #define CONFIG_SYS_HZ 1000 167 #define CONFIG_SYS_HZ 1000
151 168
152 /*----------------------------------------------------------------------- 169 /*-----------------------------------------------------------------------
153 * Stack sizes 170 * Stack sizes
154 * 171 *
155 * The stack sizes are set up in start.S using the settings below 172 * The stack sizes are set up in start.S using the settings below
156 */ 173 */
157 #define CONFIG_STACKBASE 0x2800000 /* 40MB */ 174 #define CONFIG_STACKBASE 0x2800000 /* 40MB */
158 #define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/ 175 #define CONFIG_STACKSIZE 0x20000 /* 128K regular stack*/
159 176
160 /*----------------------------------------------------------------------- 177 /*-----------------------------------------------------------------------
161 * Physical Memory Map 178 * Physical Memory Map
162 */ 179 */
163 #define CONFIG_NR_DRAM_BANKS 1 180 #define CONFIG_NR_DRAM_BANKS 1
164 #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0 181 #define PHYS_SDRAM_1 TEGRA2_SDRC_CS0
165 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */ 182 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
166 183
167 #define CONFIG_SYS_TEXT_BASE 0x00108000 184 #define CONFIG_SYS_TEXT_BASE 0x00108000
168 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 185 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
169 186
170 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE 187 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
171 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN 188 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
172 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 189 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
173 CONFIG_SYS_INIT_RAM_SIZE - \ 190 CONFIG_SYS_INIT_RAM_SIZE - \
174 GENERATED_GBL_DATA_SIZE) 191 GENERATED_GBL_DATA_SIZE)
175 192
176 #define CONFIG_TEGRA2_GPIO 193 #define CONFIG_TEGRA2_GPIO
177 #define CONFIG_CMD_GPIO 194 #define CONFIG_CMD_GPIO
178 #endif /* __TEGRA2_COMMON_H */ 195 #endif /* __TEGRA2_COMMON_H */
179 196