Commit d376e8d2283fc82d7366bc9c0e96110e3e5665e9
Committed by
Albert ARIBAUD
1 parent
e31c1e50ac
Exists in
master
and in
54 other branches
tegra: fdt: Add EMC data for Tegra2 Seaboard
This adds timings for T20 and T25 Seaboards, using the bindings found here: http://patchwork.ozlabs.org/patch/132928/ We supply both full speed options for normal running, and half speed options for testing / development. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Showing 1 changed file with 37 additions and 0 deletions Side-by-side Diff
board/nvidia/dts/tegra2-seaboard.dts
... | ... | @@ -89,5 +89,42 @@ |
89 | 89 | i2c@7000c500 { |
90 | 90 | clock-frequency = <100000>; |
91 | 91 | }; |
92 | + | |
93 | + emc@7000f400 { | |
94 | + emc-table@190000 { | |
95 | + reg = < 190000 >; | |
96 | + compatible = "nvidia,tegra20-emc-table"; | |
97 | + clock-frequency = < 190000 >; | |
98 | + nvidia,emc-registers = < 0x0000000c 0x00000026 | |
99 | + 0x00000009 0x00000003 0x00000004 0x00000004 | |
100 | + 0x00000002 0x0000000c 0x00000003 0x00000003 | |
101 | + 0x00000002 0x00000001 0x00000004 0x00000005 | |
102 | + 0x00000004 0x00000009 0x0000000d 0x0000059f | |
103 | + 0x00000000 0x00000003 0x00000003 0x00000003 | |
104 | + 0x00000003 0x00000001 0x0000000b 0x000000c8 | |
105 | + 0x00000003 0x00000007 0x00000004 0x0000000f | |
106 | + 0x00000002 0x00000000 0x00000000 0x00000002 | |
107 | + 0x00000000 0x00000000 0x00000083 0xa06204ae | |
108 | + 0x007dc010 0x00000000 0x00000000 0x00000000 | |
109 | + 0x00000000 0x00000000 0x00000000 0x00000000 >; | |
110 | + }; | |
111 | + emc-table@380000 { | |
112 | + reg = < 380000 >; | |
113 | + compatible = "nvidia,tegra20-emc-table"; | |
114 | + clock-frequency = < 380000 >; | |
115 | + nvidia,emc-registers = < 0x00000017 0x0000004b | |
116 | + 0x00000012 0x00000006 0x00000004 0x00000005 | |
117 | + 0x00000003 0x0000000c 0x00000006 0x00000006 | |
118 | + 0x00000003 0x00000001 0x00000004 0x00000005 | |
119 | + 0x00000004 0x00000009 0x0000000d 0x00000b5f | |
120 | + 0x00000000 0x00000003 0x00000003 0x00000006 | |
121 | + 0x00000006 0x00000001 0x00000011 0x000000c8 | |
122 | + 0x00000003 0x0000000e 0x00000007 0x0000000f | |
123 | + 0x00000002 0x00000000 0x00000000 0x00000002 | |
124 | + 0x00000000 0x00000000 0x00000083 0xe044048b | |
125 | + 0x007d8010 0x00000000 0x00000000 0x00000000 | |
126 | + 0x00000000 0x00000000 0x00000000 0x00000000 >; | |
127 | + }; | |
128 | + }; | |
92 | 129 | }; |