Eric Lee / smarc-uboot

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Commit 6617aae9b9f297c388fc011bdf4eb6c4553339e6

Authored by Wolfgang Denk
1 parent df3c7c8f52
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

Add new board specific commands for TQM5200/STK52XX 

- Sound commands (beep, wav, sound)
- Test commands (led, can, backlight, rs232)
Patch by Martin Krause, 02 May 2005

Showing 8 changed files with 1338 additions and 15 deletions Side-by-side Diff

... ... @@ -2,7 +2,12 @@
2 2 Changes for U-Boot 1.1.4:
3 3 ======================================================================
4 4  
5   -* Change main clock on CMC-PU2 board from 207 MHz to 179 MHz
  5 +* Add new board specific commands for TQM5200/STK52XX
  6 + - Sound commands (beep, wav, sound)
  7 + - Test commands (led, can, backlight, rs232)
  8 + Patch by Martin Krause, 02 May 2005
  9 +
  10 +* Change main clock on CMC-PU2 board from 207 MHz to 179 MHz
6 11 because of a bug in the AT91RM9200 CPU PLL
7 12 Patch by Martin Krause, 22 Apr 2005
8 13  
board/cmc_pu2/cmc_pu2.c
Diff comments   View file @ 6617aae
... ... @@ -138,7 +138,7 @@
138 138 pio->PIO_ODR = AT91C_PIO_PB12;
139 139 pio->PIO_PPUDR = AT91C_PIO_PB12;
140 140 pio->PIO_PER = AT91C_PIO_PB12;
141   -
  141 +
142 142 /* configure PB13 as input without pull up */
143 143 pio->PIO_ODR = AT91C_PIO_PB13;
144 144 pio->PIO_PPUDR = AT91C_PIO_PB13;
board/tqm5200/Makefile
Diff comments   View file @ 6617aae
... ... @@ -26,7 +26,7 @@
26 26 LIB = lib$(BOARD).a
27 27  
28 28 #OBJS := $(BOARD).o flash.o
29   -OBJS := $(BOARD).o
  29 +OBJS := $(BOARD).o cmd_stk52xx.o
30 30  
31 31 $(LIB): $(OBJS) $(SOBJS)
32 32 $(AR) crv $@ $(OBJS)
board/tqm5200/cmd_stk52xx.c
Diff comments   View file @ 6617aae
Changes suppressed. Click to show
  1 +/*
  2 + * (C) Copyright 2005
  3 + * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de.
  4 + *
  5 + * See file CREDITS for list of people who contributed to this
  6 + * project.
  7 + *
  8 + * This program is free software; you can redistribute it and/or
  9 + * modify it under the terms of the GNU General Public License as
  10 + * published by the Free Software Foundation; either version 2 of
  11 + * the License, or (at your option) any later version.
  12 + *
  13 + * This program is distributed in the hope that it will be useful,
  14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16 + * GNU General Public License for more details.
  17 + *
  18 + * You should have received a copy of the GNU General Public License
  19 + * along with this program; if not, write to the Free Software
  20 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 + * MA 02111-1307 USA
  22 + */
  23 +
  24 +/*
  25 + * SKT52XX specific functions
  26 + */
  27 +/*#define DEBUG*/
  28 +
  29 +#include <common.h>
  30 +#include <command.h>
  31 +
  32 +#if (CONFIG_COMMANDS & CFG_CMD_BSP)
  33 +
  34 +#define DEFAULT_VOL 45
  35 +#define DEFAULT_FREQ 500
  36 +#define DEFAULT_DURATION 200
  37 +#define LEFT 1
  38 +#define RIGHT 2
  39 +#define LEFT_RIGHT 3
  40 +#define BL_OFF 0
  41 +#define BL_ON 1
  42 +
  43 +#define SM501_GPIO_CTRL_LOW 0x00000008UL
  44 +#define SM501_GPIO_CTRL_HIGH 0x0000000CUL
  45 +#define SM501_POWER_MODE0_GATE 0x00000040UL
  46 +#define SM501_POWER_MODE1_GATE 0x00000048UL
  47 +#define POWER_MODE_GATE_GPIO_PWM_I2C 0x00000040UL
  48 +#define SM501_GPIO_DATA_LOW 0x00010000UL
  49 +#define SM501_GPIO_DATA_HIGH 0x00010004UL
  50 +#define SM501_GPIO_DATA_DIR_LOW 0x00010008UL
  51 +#define SM501_GPIO_DATA_DIR_HIGH 0x0001000CUL
  52 +#define SM501_PANEL_DISPLAY_CONTROL 0x00080000UL
  53 +
  54 +static int i2s_squarewave(unsigned long duration, unsigned int freq,
  55 + unsigned int channel);
  56 +static int i2s_sawtooth(unsigned long duration, unsigned int freq,
  57 + unsigned int channel);
  58 +static void spi_init(void);
  59 +static int spi_transmit(unsigned char data);
  60 +static void pcm1772_write_reg(unsigned char addr, unsigned char data);
  61 +static void set_attenuation(unsigned char attenuation);
  62 +
  63 +#ifdef CONFIG_STK52XX
  64 +static void spi_init(void)
  65 +{
  66 + struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI;
  67 + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
  68 +
  69 + /* PSC3 as SPI and GPIOs */
  70 + gpio->port_config &= 0xFFFFF0FF;
  71 + gpio->port_config |= 0x00000800;
  72 + /*
  73 + * Its important to use the correct order when initializing the
  74 + * registers
  75 + */
  76 + spi->ddr = 0x0F; /* set all SPI pins as output */
  77 + spi->pdr = 0x08; /* set SS high */
  78 + spi->cr1 = 0x50; /* SPI is master, SS is general purpose output */
  79 + spi->cr2 = 0x00; /* normal operation */
  80 + spi->brr = 0xFF; /* baud rate: IPB clock / 2048 */
  81 +}
  82 +
  83 +static int spi_transmit(unsigned char data)
  84 +{
  85 + int dummy;
  86 + struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI;
  87 +
  88 + spi->dr = data;
  89 + /* wait for SPI transmission completed */
  90 + while(!(spi->sr & 0x80))
  91 + {
  92 + if (spi->sr & 0x40) /* if write collision occured */
  93 + {
  94 + /* do dummy read to clear status register */
  95 + dummy = spi->dr;
  96 + printf ("SPI write collision\n");
  97 + return -1;
  98 + }
  99 + }
  100 + return (spi->dr);
  101 +}
  102 +
  103 +static void pcm1772_write_reg(unsigned char addr, unsigned char data)
  104 +{
  105 + struct mpc5xxx_spi *spi = (struct mpc5xxx_spi*)MPC5XXX_SPI;
  106 +
  107 + spi->pdr = 0x00; /* Set SS low */
  108 + spi_transmit(addr);
  109 + spi_transmit(data);
  110 + /* wait some time to meet MS# hold time of PCM1772 */
  111 + udelay (1);
  112 + spi->pdr = 0x08; /* set SS high */
  113 +}
  114 +
  115 +static void set_attenuation(unsigned char attenuation)
  116 +{
  117 + pcm1772_write_reg(0x01, attenuation); /* left channel */
  118 + debug ("PCM1772 attenuation left set to %d.\n", attenuation);
  119 + pcm1772_write_reg(0x02, attenuation); /* right channel */
  120 + debug ("PCM1772 attenuation right set to %d.\n", attenuation);
  121 +}
  122 +
  123 +void amplifier_init(void)
  124 +{
  125 + static int init_done = 0;
  126 + int i;
  127 + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
  128 +
  129 + /* Do this only once, because of the long time delay */
  130 + if (!init_done) {
  131 + /* configure PCM1772 audio format as I2S */
  132 + pcm1772_write_reg(0x03, 0x01);
  133 + /* enable audio amplifier */
  134 + gpio->sint_gpioe |= 0x02; /* PSC3_5 as GPIO */
  135 + gpio->sint_ode &= ~0x02; /* PSC3_5 is not open Drain */
  136 + gpio->sint_dvo &= ~0x02; /* PSC3_5 is LOW */
  137 + gpio->sint_ddr |= 0x02; /* PSC3_5 as output */
  138 + /*
  139 + * wait some time to allow amplifier to recover from shutdown
  140 + * mode.
  141 + */
  142 + for(i = 0; i < 350; i++)
  143 + udelay(1000);
  144 + /*
  145 + * The used amplifier (LM4867) has a so called "pop and click"
  146 + * elmination filter. The input signal of the amplifier must
  147 + * exceed a certain level once after power up to activate the
  148 + * generation of the output signal. This is achieved by
  149 + * sending a low frequent (nearly inaudible) sawtooth with a
  150 + * sufficient signal level.
  151 + */
  152 + set_attenuation(50);
  153 + i2s_sawtooth (200, 5, LEFT_RIGHT);
  154 + init_done = 1;
  155 + }
  156 +}
  157 +
  158 +static void i2s_init(void)
  159 +{
  160 + unsigned long i;
  161 + struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;;
  162 + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
  163 +
  164 + gpio->port_config |= 0x00000070; /* PSC2 ports as Codec with MCLK */
  165 + psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
  166 + psc->sicr = 0x22E00000; /* 16 bit data; I2S */
  167 +
  168 + *(vu_long *)(CFG_MBAR + 0x22C) = 0x805d; /* PSC2 CDM MCLK config; MCLK
  169 + * 5.617 MHz */
  170 + *(vu_long *)(CFG_MBAR + 0x214) |= 0x00000040; /* CDM clock enable
  171 + * register */
  172 + psc->ccr = 0x1F03; /* 16 bit data width; 5.617MHz MCLK */
  173 + psc->ctur = 0x0F; /* 16 bit frame width */
  174 +
  175 + for(i=0;i<128;i++)
  176 + {
  177 + psc->psc_buffer_32 = 0; /* clear tx fifo */
  178 + }
  179 +}
  180 +
  181 +static int i2s_play_wave(unsigned long addr, unsigned long len)
  182 +{
  183 + unsigned long i;
  184 + unsigned char *wave_file = (char *)addr + 44; /* quick'n dirty: skip
  185 + * wav header*/
  186 + unsigned char swapped[4];
  187 + struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;
  188 +
  189 + /*
  190 + * play wave file in memory; bytes/words are be swapped
  191 + */
  192 + psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
  193 +
  194 + for(i = 0;i < (len / 4); i++) {
  195 + swapped[3]=*wave_file++;
  196 + swapped[2]=*wave_file++;
  197 + swapped[1]=*wave_file++;
  198 + swapped[0]=*wave_file++;
  199 + psc->psc_buffer_32 = *((unsigned long*)swapped);
  200 + while (psc->tfnum > 400) {
  201 + if(ctrlc())
  202 + return 0;
  203 + }
  204 + }
  205 + while (psc->tfnum > 0); /* wait for fifo empty */
  206 + udelay (100);
  207 + psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
  208 + return 0;
  209 +}
  210 +
  211 +static int i2s_sawtooth(unsigned long duration, unsigned int freq,
  212 + unsigned int channel)
  213 +{
  214 + long i,j;
  215 + unsigned long data;
  216 + struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;
  217 +
  218 + psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
  219 +
  220 + /*
  221 + * Generate sawtooth. Start with middle level up to highest level. Then
  222 + * go to lowest level and back to middle level.
  223 + */
  224 + for(j = 0; j < ((duration * freq) / 1000); j++) {
  225 + for(i = 0; i <= 0x7FFF; i += (0x7FFF/(44100/(freq*4)))) {
  226 + data = (i & 0xFFFF);
  227 + /* data format: right data left data) */
  228 + if (channel == LEFT_RIGHT)
  229 + data |= (data<<16);
  230 + if (channel == RIGHT)
  231 + data = (data<<16);
  232 + psc->psc_buffer_32 = data;
  233 + while (psc->tfnum > 400);
  234 + }
  235 + for(i = 0x7FFF; i >= -0x7FFF; i -= (0xFFFF/(44100/(freq*2)))) {
  236 + data = (i & 0xFFFF);
  237 + /* data format: right data left data) */
  238 + if (channel == LEFT_RIGHT)
  239 + data |= (data<<16);
  240 + if (channel == RIGHT)
  241 + data = (data<<16);
  242 + psc->psc_buffer_32 = data;
  243 + while (psc->tfnum > 400);
  244 + }
  245 + for(i = -0x7FFF; i <= 0; i += (0x7FFF/(44100/(freq*4)))) {
  246 + data = (i & 0xFFFF);
  247 + /* data format: right data left data) */
  248 + if (channel == LEFT_RIGHT)
  249 + data |= (data<<16);
  250 + if (channel == RIGHT)
  251 + data = (data<<16);
  252 + psc->psc_buffer_32 = data;
  253 + while (psc->tfnum > 400);
  254 + }
  255 + }
  256 + while (psc->tfnum > 0); /* wait for fifo empty */
  257 + udelay (100);
  258 + psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
  259 +
  260 + return 0;
  261 +}
  262 +
  263 +static int i2s_squarewave(unsigned long duration, unsigned int freq,
  264 + unsigned int channel)
  265 +{
  266 + long i,j;
  267 + unsigned long data;
  268 + struct mpc5xxx_psc *psc = (struct mpc5xxx_psc*)MPC5XXX_PSC2;
  269 +
  270 + psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
  271 +
  272 + /*
  273 + * Generate sqarewave. Start with high level, duty cycle 1:1.
  274 + */
  275 + for(j = 0; j < ((duration * freq) / 1000); j++) {
  276 + for(i = 0; i < (44100/(freq*2)); i ++) {
  277 + data = 0x7FFF;
  278 + /* data format: right data left data) */
  279 + if (channel == LEFT_RIGHT)
  280 + data |= (data<<16);
  281 + if (channel == RIGHT)
  282 + data = (data<<16);
  283 + psc->psc_buffer_32 = data;
  284 + while (psc->tfnum > 400);
  285 + }
  286 + for(i = 0; i < (44100/(freq*2)); i ++) {
  287 + data = 0x8000;
  288 + /* data format: right data left data) */
  289 + if (channel == LEFT_RIGHT)
  290 + data |= (data<<16);
  291 + if (channel == RIGHT)
  292 + data = (data<<16);
  293 + psc->psc_buffer_32 = data;
  294 + while (psc->tfnum > 400);
  295 + }
  296 + }
  297 + while (psc->tfnum > 0); /* wait for fifo empty */
  298 + udelay (100);
  299 + psc->command = (PSC_RX_DISABLE | PSC_TX_DISABLE);
  300 +
  301 + return 0;
  302 +}
  303 +
  304 +static int cmd_sound(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  305 +{
  306 + unsigned long reg, val, duration;
  307 + unsigned char *tmp;
  308 + unsigned int freq, channel;
  309 + unsigned char volume;
  310 + int rcode = 1;
  311 +
  312 +#ifdef CONFIG_STK52XX_REV100
  313 + printf ("Revision 100 of STK52XX not supported!\n");
  314 + return 1;
  315 +#endif
  316 + spi_init();
  317 + i2s_init();
  318 + amplifier_init();
  319 +
  320 + if ((tmp = getenv ("volume")) != NULL) {
  321 + volume = simple_strtoul (tmp, NULL, 10);
  322 + } else {
  323 + volume = DEFAULT_VOL;
  324 + }
  325 + set_attenuation(volume);
  326 +
  327 + switch (argc) {
  328 + case 0:
  329 + case 1:
  330 + printf ("Usage:\n%s\n", cmdtp->usage);
  331 + return 1;
  332 + case 2:
  333 + if (strncmp(argv[1],"saw",3) == 0) {
  334 + printf ("Play sawtooth\n");
  335 + rcode = i2s_sawtooth (DEFAULT_DURATION, DEFAULT_FREQ,
  336 + LEFT_RIGHT);
  337 + return rcode;
  338 + } else if (strncmp(argv[1],"squ",3) == 0) {
  339 + printf ("Play squarewave\n");
  340 + rcode = i2s_squarewave (DEFAULT_DURATION, DEFAULT_FREQ,
  341 + LEFT_RIGHT);
  342 + return rcode;
  343 + }
  344 +
  345 + printf ("Usage:\n%s\n", cmdtp->usage);
  346 + return 1;
  347 + case 3:
  348 + if (strncmp(argv[1],"saw",3) == 0) {
  349 + duration = simple_strtoul(argv[2], NULL, 10);
  350 + printf ("Play sawtooth\n");
  351 + rcode = i2s_sawtooth (duration, DEFAULT_FREQ,
  352 + LEFT_RIGHT);
  353 + return rcode;
  354 + } else if (strncmp(argv[1],"squ",3) == 0) {
  355 + duration = simple_strtoul(argv[2], NULL, 10);
  356 + printf ("Play squarewave\n");
  357 + rcode = i2s_squarewave (duration, DEFAULT_FREQ,
  358 + LEFT_RIGHT);
  359 + return rcode;
  360 + }
  361 + printf ("Usage:\n%s\n", cmdtp->usage);
  362 + return 1;
  363 + case 4:
  364 + if (strncmp(argv[1],"saw",3) == 0) {
  365 + duration = simple_strtoul(argv[2], NULL, 10);
  366 + freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
  367 + printf ("Play sawtooth\n");
  368 + rcode = i2s_sawtooth (duration, freq,
  369 + LEFT_RIGHT);
  370 + return rcode;
  371 + } else if (strncmp(argv[1],"squ",3) == 0) {
  372 + duration = simple_strtoul(argv[2], NULL, 10);
  373 + freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
  374 + printf ("Play squarewave\n");
  375 + rcode = i2s_squarewave (duration, freq,
  376 + LEFT_RIGHT);
  377 + return rcode;
  378 + } else if (strcmp(argv[1],"pcm1772") == 0) {
  379 + reg = simple_strtoul(argv[2], NULL, 10);
  380 + val = simple_strtoul(argv[3], NULL, 10);
  381 + printf("Set PCM1772 %lu. %lu\n", reg, val);
  382 + pcm1772_write_reg((uchar)reg, (uchar)val);
  383 + return 0;
  384 + }
  385 + printf ("Usage:\n%s\n", cmdtp->usage);
  386 + return 1;
  387 + case 5:
  388 + if (strncmp(argv[1],"saw",3) == 0) {
  389 + duration = simple_strtoul(argv[2], NULL, 10);
  390 + freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
  391 + if (strncmp(argv[4],"l",1) == 0)
  392 + channel = LEFT;
  393 + else if (strncmp(argv[4],"r",1) == 0)
  394 + channel = RIGHT;
  395 + else
  396 + channel = LEFT_RIGHT;
  397 + printf ("Play squarewave\n");
  398 + rcode = i2s_sawtooth (duration, freq,
  399 + channel);
  400 + return rcode;
  401 + } else if (strncmp(argv[1],"squ",3) == 0) {
  402 + duration = simple_strtoul(argv[2], NULL, 10);
  403 + freq = (unsigned int)simple_strtoul(argv[3], NULL, 10);
  404 + if (strncmp(argv[4],"l",1) == 0)
  405 + channel = LEFT;
  406 + else if (strncmp(argv[4],"r",1) == 0)
  407 + channel = RIGHT;
  408 + else
  409 + channel = LEFT_RIGHT;
  410 + printf ("Play squarewave\n");
  411 + rcode = i2s_squarewave (duration, freq,
  412 + channel);
  413 + return rcode;
  414 + }
  415 + printf ("Usage:\n%s\n", cmdtp->usage);
  416 + return 1;
  417 + }
  418 + printf ("Usage:\nsound cmd [arg1] [arg2] ...\n");
  419 + return 1;
  420 +}
  421 +
  422 +static int cmd_wav(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  423 +{
  424 + unsigned long length, addr;
  425 + unsigned char volume;
  426 + int rcode = 1;
  427 + char *tmp;
  428 +
  429 +#ifdef CONFIG_STK52XX_REV100
  430 + printf ("Revision 100 of STK52XX not supported!\n");
  431 + return 1;
  432 +#endif
  433 + spi_init();
  434 + i2s_init();
  435 + amplifier_init();
  436 +
  437 + switch (argc) {
  438 +
  439 + case 3:
  440 + length = simple_strtoul(argv[2], NULL, 16);
  441 + addr = simple_strtoul(argv[1], NULL, 16);
  442 + break;
  443 +
  444 + case 2:
  445 + if ((tmp = getenv ("filesize")) != NULL) {
  446 + length = simple_strtoul (tmp, NULL, 16);
  447 + } else {
  448 + puts ("No filesize provided\n");
  449 + return 1;
  450 + }
  451 + addr = simple_strtoul(argv[1], NULL, 16);
  452 +
  453 + case 1:
  454 + if ((tmp = getenv ("filesize")) != NULL) {
  455 + length = simple_strtoul (tmp, NULL, 16);
  456 + } else {
  457 + puts ("No filesize provided\n");
  458 + return 1;
  459 + }
  460 + if ((tmp = getenv ("loadaddr")) != NULL) {
  461 + addr = simple_strtoul (tmp, NULL, 16);
  462 + } else {
  463 + puts ("No loadaddr provided\n");
  464 + return 1;
  465 + }
  466 + break;
  467 +
  468 + default:
  469 + printf("Usage:\nwav <addr> <length[s]\n");
  470 + return 1;
  471 + break;
  472 + }
  473 +
  474 + if ((tmp = getenv ("volume")) != NULL) {
  475 + volume = simple_strtoul (tmp, NULL, 10);
  476 + } else {
  477 + volume = DEFAULT_VOL;
  478 + }
  479 + set_attenuation(volume);
  480 +
  481 + printf("Play wave file at %#p with length %#x\n", addr, length);
  482 + rcode = i2s_play_wave(addr, length);
  483 +
  484 + return rcode;
  485 +}
  486 +
  487 +static int cmd_beep(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  488 +{
  489 + unsigned char volume;
  490 + unsigned int channel;
  491 + int rcode;
  492 + char *tmp;
  493 +
  494 +#ifdef CONFIG_STK52XX_REV100
  495 + printf ("Revision 100 of STK52XX not supported!\n");
  496 + return 1;
  497 +#endif
  498 + spi_init();
  499 + i2s_init();
  500 + amplifier_init();
  501 +
  502 + switch (argc) {
  503 + case 0:
  504 + case 1:
  505 + channel = LEFT_RIGHT;
  506 + break;
  507 + case 2:
  508 + if (strncmp(argv[1],"l",1) == 0)
  509 + channel = LEFT;
  510 + else if (strncmp(argv[1],"r",1) == 0)
  511 + channel = RIGHT;
  512 + else
  513 + channel = LEFT_RIGHT;
  514 + break;
  515 + default:
  516 + printf ("Usage:\n%s\n", cmdtp->usage);
  517 + return 1;
  518 + }
  519 +
  520 + if ((tmp = getenv ("volume")) != NULL) {
  521 + volume = simple_strtoul (tmp, NULL, 10);
  522 + } else {
  523 + volume = DEFAULT_VOL;
  524 + }
  525 + set_attenuation(volume);
  526 +
  527 + printf("Beep on ");
  528 + if (channel == LEFT)
  529 + printf ("left ");
  530 + else if (channel == RIGHT)
  531 + printf ("right ");
  532 + else
  533 + printf ("left and right ");
  534 + printf ("channel\n");
  535 +
  536 + rcode = i2s_squarewave (DEFAULT_DURATION, DEFAULT_FREQ, channel);
  537 +
  538 + return rcode;
  539 +}
  540 +
  541 +void led_init(void)
  542 +{
  543 + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
  544 + struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
  545 +
  546 + /* configure PSC3 for SPI and GPIO */
  547 + gpio->port_config &= ~(0x00000F00);
  548 + gpio->port_config |= 0x00000800;
  549 +
  550 + gpio->simple_gpioe &= ~(0x00000F00);
  551 + gpio->simple_gpioe |= 0x00000F00;
  552 +
  553 + gpio->simple_ddr &= ~(0x00000F00);
  554 + gpio->simple_ddr |= 0x00000F00;
  555 +
  556 + /* configure timer 4-7 for simple GPIO output */
  557 + gpt->gpt4.emsr |= 0x00000024;
  558 + gpt->gpt5.emsr |= 0x00000024;
  559 + gpt->gpt6.emsr |= 0x00000024;
  560 + gpt->gpt7.emsr |= 0x00000024;
  561 +
  562 +
  563 + /* enable SM501 GPIO control (in both power modes) */
  564 + *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE0_GATE) |=
  565 + POWER_MODE_GATE_GPIO_PWM_I2C;
  566 + *(vu_long *) (SM501_MMIO_BASE+SM501_POWER_MODE1_GATE) |=
  567 + POWER_MODE_GATE_GPIO_PWM_I2C;
  568 +
  569 + /* configure SM501 gpio pins 24-27 as output */
  570 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_CTRL_LOW) &= ~(0xF << 24);
  571 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_LOW) |= (0xF << 24);
  572 +
  573 + /* configure SM501 gpio pins 48-51 as output */
  574 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_DIR_HIGH) |= (0xF << 16);
  575 +}
  576 +
  577 +/*
  578 + * return 1 if led number unknown
  579 + * return 0 else
  580 + */
  581 +int do_led(char *argv[])
  582 +{
  583 + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
  584 + struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
  585 +
  586 + switch (simple_strtoul(argv[2], NULL, 10)) {
  587 +
  588 + case 0:
  589 + if (strcmp (argv[3], "on") == 0) {
  590 + gpio->simple_dvo |= (1 << 8);
  591 + } else {
  592 + gpio->simple_dvo &= ~(1 << 8);
  593 + }
  594 + break;
  595 +
  596 + case 1:
  597 + if (strcmp (argv[3], "on") == 0) {
  598 + gpio->simple_dvo |= (1 << 9);
  599 + } else {
  600 + gpio->simple_dvo &= ~(1 << 9);
  601 + }
  602 + break;
  603 +
  604 + case 2:
  605 + if (strcmp (argv[3], "on") == 0) {
  606 + gpio->simple_dvo |= (1 << 10);
  607 + } else {
  608 + gpio->simple_dvo &= ~(1 << 10);
  609 + }
  610 + break;
  611 +
  612 + case 3:
  613 + if (strcmp (argv[3], "on") == 0) {
  614 + gpio->simple_dvo |= (1 << 11);
  615 + } else {
  616 + gpio->simple_dvo &= ~(1 << 11);
  617 + }
  618 + break;
  619 +
  620 + case 4:
  621 + if (strcmp (argv[3], "on") == 0) {
  622 + gpt->gpt4.emsr |= (1 << 4);
  623 + } else {
  624 + gpt->gpt4.emsr &= ~(1 << 4);
  625 + }
  626 + break;
  627 +
  628 + case 5:
  629 + if (strcmp (argv[3], "on") == 0) {
  630 + gpt->gpt5.emsr |= (1 << 4);
  631 + } else {
  632 + gpt->gpt5.emsr &= ~(1 << 4);
  633 + }
  634 + break;
  635 +
  636 + case 6:
  637 + if (strcmp (argv[3], "on") == 0) {
  638 + gpt->gpt6.emsr |= (1 << 4);
  639 + } else {
  640 + gpt->gpt6.emsr &= ~(1 << 4);
  641 + }
  642 + break;
  643 +
  644 + case 7:
  645 + if (strcmp (argv[3], "on") == 0) {
  646 + gpt->gpt7.emsr |= (1 << 4);
  647 + } else {
  648 + gpt->gpt7.emsr &= ~(1 << 4);
  649 + }
  650 + break;
  651 +
  652 + case 24:
  653 + if (strcmp (argv[3], "on") == 0) {
  654 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
  655 + (0x1 << 24);
  656 + } else {
  657 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
  658 + ~(0x1 << 24);
  659 + }
  660 + break;
  661 +
  662 + case 25:
  663 + if (strcmp (argv[3], "on") == 0) {
  664 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
  665 + (0x1 << 25);
  666 + } else {
  667 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
  668 + ~(0x1 << 25);
  669 + }
  670 + break;
  671 +
  672 + case 26:
  673 + if (strcmp (argv[3], "on") == 0) {
  674 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
  675 + (0x1 << 26);
  676 + } else {
  677 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
  678 + ~(0x1 << 26);
  679 + }
  680 + break;
  681 +
  682 + case 27:
  683 + if (strcmp (argv[3], "on") == 0) {
  684 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) |=
  685 + (0x1 << 27);
  686 + } else {
  687 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_LOW) &=
  688 + ~(0x1 << 27);
  689 + }
  690 + break;
  691 +
  692 + case 48:
  693 + if (strcmp (argv[3], "on") == 0) {
  694 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
  695 + (0x1 << 16);
  696 + } else {
  697 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
  698 + ~(0x1 << 16);
  699 + }
  700 + break;
  701 +
  702 + case 49:
  703 + if (strcmp (argv[3], "on") == 0) {
  704 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
  705 + (0x1 << 17);
  706 + } else {
  707 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
  708 + ~(0x1 << 17);
  709 + }
  710 + break;
  711 +
  712 + case 50:
  713 + if (strcmp (argv[3], "on") == 0) {
  714 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
  715 + (0x1 << 18);
  716 + } else {
  717 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
  718 + ~(0x1 << 18);
  719 + }
  720 + break;
  721 +
  722 + case 51:
  723 + if (strcmp (argv[3], "on") == 0) {
  724 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) |=
  725 + (0x1 << 19);
  726 + } else {
  727 + *(vu_long *) (SM501_MMIO_BASE+SM501_GPIO_DATA_HIGH) &=
  728 + ~(0x1 << 19);
  729 + }
  730 + break;
  731 +
  732 + default:
  733 + printf ("%s: invalid led number %s\n", __FUNCTION__, argv[2]);
  734 + return 1;
  735 + }
  736 +
  737 + return 0;
  738 +}
  739 +
  740 +/*
  741 + * return 1 on CAN initialization failure
  742 + * return 0 if no failure
  743 + */
  744 +int can_init(void)
  745 +{
  746 + static int init_done = 0;
  747 + int i;
  748 + struct mpc5xxx_mscan *can1 =
  749 + (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0900);
  750 + struct mpc5xxx_mscan *can2 =
  751 + (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0980);
  752 +
  753 + /* GPIO configuration of the CAN pins is done in TQM5200.h */
  754 +
  755 + if (!init_done) {
  756 + /* init CAN 1 */
  757 + can1->canctl1 |= 0x80; /* CAN enable */
  758 + udelay(100);
  759 +
  760 + i = 0;
  761 + can1->canctl0 |= 0x02; /* sleep mode */
  762 + /* wait until sleep mode reached */
  763 + while (!(can1->canctl1 & 0x02)) {
  764 + udelay(10);
  765 + i++;
  766 + if (i == 10) {
  767 + printf ("%s: CAN1 initialize error, "
  768 + "can not enter sleep mode!\n",
  769 + __FUNCTION__);
  770 + return 1;
  771 + }
  772 + }
  773 + i = 0;
  774 + can1->canctl0 = 0x01; /* enter init mode */
  775 + /* wait until init mode reached */
  776 + while (!(can1->canctl1 & 0x01)) {
  777 + udelay(10);
  778 + i++;
  779 + if (i == 10) {
  780 + printf ("%s: CAN1 initialize error, "
  781 + "can not enter init mode!\n",
  782 + __FUNCTION__);
  783 + return 1;
  784 + }
  785 + }
  786 + can1->canctl1 = 0x80;
  787 + can1->canctl1 |= 0x40;
  788 + can1->canbtr0 = 0x0F;
  789 + can1->canbtr1 = 0x7F;
  790 + can1->canidac &= ~(0x30);
  791 + can1->canidar1 = 0x00;
  792 + can1->canidar3 = 0x00;
  793 + can1->canidar5 = 0x00;
  794 + can1->canidar7 = 0x00;
  795 + can1->canidmr0 = 0xFF;
  796 + can1->canidmr1 = 0xFF;
  797 + can1->canidmr2 = 0xFF;
  798 + can1->canidmr3 = 0xFF;
  799 + can1->canidmr4 = 0xFF;
  800 + can1->canidmr5 = 0xFF;
  801 + can1->canidmr6 = 0xFF;
  802 + can1->canidmr7 = 0xFF;
  803 +
  804 + i = 0;
  805 + can1->canctl0 &= ~(0x01); /* leave init mode */
  806 + can1->canctl0 &= ~(0x02);
  807 + /* wait until init and sleep mode left */
  808 + while ((can1->canctl1 & 0x01) || (can1->canctl1 & 0x02)) {
  809 + udelay(10);
  810 + i++;
  811 + if (i == 10) {
  812 + printf ("%s: CAN1 initialize error, "
  813 + "can not leave init/sleep mode!\n",
  814 + __FUNCTION__);
  815 + return 1;
  816 + }
  817 + }
  818 +
  819 + /* init CAN 2 */
  820 + can2->canctl1 |= 0x80; /* CAN enable */
  821 + udelay(100);
  822 +
  823 + i = 0;
  824 + can2->canctl0 |= 0x02; /* sleep mode */
  825 + /* wait until sleep mode reached */
  826 + while (!(can2->canctl1 & 0x02)) {
  827 + udelay(10);
  828 + i++;
  829 + if (i == 10) {
  830 + printf ("%s: CAN2 initialize error, "
  831 + "can not enter sleep mode!\n",
  832 + __FUNCTION__);
  833 + return 1;
  834 + }
  835 + }
  836 + i = 0;
  837 + can2->canctl0 = 0x01; /* enter init mode */
  838 + /* wait until init mode reached */
  839 + while (!(can2->canctl1 & 0x01)) {
  840 + udelay(10);
  841 + i++;
  842 + if (i == 10) {
  843 + printf ("%s: CAN2 initialize error, "
  844 + "can not enter init mode!\n",
  845 + __FUNCTION__);
  846 + return 1;
  847 + }
  848 + }
  849 + can2->canctl1 = 0x80;
  850 + can2->canctl1 |= 0x40;
  851 + can2->canbtr0 = 0x0F;
  852 + can2->canbtr1 = 0x7F;
  853 + can2->canidac &= ~(0x30);
  854 + can2->canidar1 = 0x00;
  855 + can2->canidar3 = 0x00;
  856 + can2->canidar5 = 0x00;
  857 + can2->canidar7 = 0x00;
  858 + can2->canidmr0 = 0xFF;
  859 + can2->canidmr1 = 0xFF;
  860 + can2->canidmr2 = 0xFF;
  861 + can2->canidmr3 = 0xFF;
  862 + can2->canidmr4 = 0xFF;
  863 + can2->canidmr5 = 0xFF;
  864 + can2->canidmr6 = 0xFF;
  865 + can2->canidmr7 = 0xFF;
  866 + can2->canctl0 &= ~(0x01); /* leave init mode */
  867 + can2->canctl0 &= ~(0x02);
  868 +
  869 + i = 0;
  870 + /* wait until init mode left */
  871 + while ((can2->canctl1 & 0x01) || (can2->canctl1 & 0x02)) {
  872 + udelay(10);
  873 + i++;
  874 + if (i == 10) {
  875 + printf ("%s: CAN2 initialize error, "
  876 + "can not leave init/sleep mode!\n",
  877 + __FUNCTION__);
  878 + return 1;
  879 + }
  880 + }
  881 + init_done = 1;
  882 + }
  883 + return 0;
  884 +}
  885 +
  886 +/*
  887 + * return 1 on CAN failure
  888 + * return 0 if no failure
  889 + */
  890 +int do_can(char *argv[])
  891 +{
  892 + int i;
  893 + struct mpc5xxx_mscan *can1 =
  894 + (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0900);
  895 + struct mpc5xxx_mscan *can2 =
  896 + (struct mpc5xxx_mscan *)(CFG_MBAR + 0x0980);
  897 +
  898 + /* send a message on CAN1 */
  899 + can1->cantbsel = 0x01;
  900 + can1->cantxfg.idr[0] = 0x55;
  901 + can1->cantxfg.idr[1] = 0x00;
  902 + can1->cantxfg.idr[1] &= ~0x8;
  903 + can1->cantxfg.idr[1] &= ~0x10;
  904 + can1->cantxfg.dsr[0] = 0xCC;
  905 + can1->cantxfg.dlr = 1;
  906 + can1->cantxfg.tbpr = 0;
  907 + can1->cantflg = 0x01;
  908 +
  909 + i = 0;
  910 + while ((can1->cantflg & 0x01) == 0) {
  911 + i++;
  912 + if (i == 10) {
  913 + printf ("%s: CAN1 send timeout, "
  914 + "can not send message!\n",
  915 + __FUNCTION__);
  916 + return 1;
  917 + }
  918 + udelay(1000);
  919 + }
  920 + udelay(1000);
  921 +
  922 + i = 0;
  923 + while (!(can2->canrflg & 0x01)) {
  924 + i++;
  925 + if (i == 10) {
  926 + printf ("%s: CAN2 receive timeout, "
  927 + "no message received!\n",
  928 + __FUNCTION__);
  929 + return 1;
  930 + }
  931 + udelay(1000);
  932 + }
  933 +
  934 + if (can2->canrxfg.dsr[0] != 0xCC) {
  935 + printf ("%s: CAN2 receive error, "
  936 + "data mismatch!\n",
  937 + __FUNCTION__);
  938 + return 1;
  939 + }
  940 +
  941 + /* send a message on CAN2 */
  942 + can2->cantbsel = 0x01;
  943 + can2->cantxfg.idr[0] = 0x55;
  944 + can2->cantxfg.idr[1] = 0x00;
  945 + can2->cantxfg.idr[1] &= ~0x8;
  946 + can2->cantxfg.idr[1] &= ~0x10;
  947 + can2->cantxfg.dsr[0] = 0xCC;
  948 + can2->cantxfg.dlr = 1;
  949 + can2->cantxfg.tbpr = 0;
  950 + can2->cantflg = 0x01;
  951 +
  952 + i = 0;
  953 + while ((can2->cantflg & 0x01) == 0) {
  954 + i++;
  955 + if (i == 10) {
  956 + printf ("%s: CAN2 send error, "
  957 + "can not send message!\n",
  958 + __FUNCTION__);
  959 + return 1;
  960 + }
  961 + udelay(1000);
  962 + }
  963 + udelay(1000);
  964 +
  965 + i = 0;
  966 + while (!(can1->canrflg & 0x01)) {
  967 + i++;
  968 + if (i == 10) {
  969 + printf ("%s: CAN1 receive timeout, "
  970 + "no message received!\n",
  971 + __FUNCTION__);
  972 + return 1;
  973 + }
  974 + udelay(1000);
  975 + }
  976 +
  977 + if (can1->canrxfg.dsr[0] != 0xCC) {
  978 + printf ("%s: CAN1 receive error 0x%02x\n",
  979 + __FUNCTION__, (can1->canrxfg.dsr[0]));
  980 + return 1;
  981 + }
  982 +
  983 + return 0;
  984 +}
  985 +
  986 +/*
  987 + * return 1 if rs232 port unknown
  988 + * return 2 on txd/rxd failure (only rs232 2)
  989 + * return 3 on rts/cts failure
  990 + * return 0 if no failure
  991 + */
  992 +int do_rs232(char *argv[])
  993 +{
  994 + int error_status = 0;
  995 + struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
  996 + struct mpc5xxx_psc *psc1 = (struct mpc5xxx_psc *)MPC5XXX_PSC1;
  997 +
  998 + switch (simple_strtoul(argv[2], NULL, 10)) {
  999 +
  1000 + case 1:
  1001 + /* check RTS <-> CTS loop */
  1002 + /* set rts to 0 */
  1003 + psc1->op1 |= 0x01;
  1004 +
  1005 + /* wait some time before requesting status */
  1006 + udelay(10);
  1007 +
  1008 + /* check status at cts */
  1009 + if ((psc1->ip & 0x01) != 0) {
  1010 + error_status = 3;
  1011 + printf ("%s: failure at rs232_1, cts status is %d "
  1012 + "(should be 0)\n",
  1013 + __FUNCTION__, (psc1->ip & 0x01));
  1014 + }
  1015 +
  1016 + /* set rts to 1 */
  1017 + psc1->op0 |= 0x01;
  1018 +
  1019 + /* wait some time before requesting status */
  1020 + udelay(10);
  1021 +
  1022 + /* check status at cts */
  1023 + if ((psc1->ip & 0x01) != 1) {
  1024 + error_status = 3;
  1025 + printf ("%s: failure at rs232_1, cts status is %d "
  1026 + "(should be 1)\n",
  1027 + __FUNCTION__, (psc1->ip & 0x01));
  1028 + }
  1029 +
  1030 + break;
  1031 +
  1032 + case 2:
  1033 + /* set PSC3_0, PSC3_2 as output and PSC3_1, PSC3_3 as input */
  1034 + gpio->simple_ddr &= ~(0x00000F00);
  1035 + gpio->simple_ddr |= 0x00000500;
  1036 +
  1037 + /* check TXD <-> RXD loop */
  1038 + /* set TXD to 1 */
  1039 + gpio->simple_dvo |= (1 << 8);
  1040 +
  1041 + /* wait some time before requesting status */
  1042 + udelay(10);
  1043 +
  1044 + if ((gpio->simple_ival & 0x00000200) != 0x00000200) {
  1045 + error_status = 2;
  1046 + printf ("%s: failure at rs232_2, rxd status is %d "
  1047 + "(should be 1)\n",
  1048 + __FUNCTION__,
  1049 + (gpio->simple_ival & 0x00000200) >> 9);
  1050 + }
  1051 +
  1052 + /* set TXD to 0 */
  1053 + gpio->simple_dvo &= ~(1 << 8);
  1054 +
  1055 + /* wait some time before requesting status */
  1056 + udelay(10);
  1057 +
  1058 + if ((gpio->simple_ival & 0x00000200) != 0x00000000) {
  1059 + error_status = 2;
  1060 + printf ("%s: failure at rs232_2, rxd status is %d "
  1061 + "(should be 0)\n",
  1062 + __FUNCTION__,
  1063 + (gpio->simple_ival & 0x00000200) >> 9);
  1064 + }
  1065 +
  1066 + /* check RTS <-> CTS loop */
  1067 + /* set RTS to 1 */
  1068 + gpio->simple_dvo |= (1 << 10);
  1069 +
  1070 + /* wait some time before requesting status */
  1071 + udelay(10);
  1072 +
  1073 + if ((gpio->simple_ival & 0x00000800) != 0x00000800) {
  1074 + error_status = 3;
  1075 + printf ("%s: failure at rs232_2, cts status is %d "
  1076 + "(should be 1)\n",
  1077 + __FUNCTION__,
  1078 + (gpio->simple_ival & 0x00000800) >> 11);
  1079 + }
  1080 +
  1081 + /* set RTS to 0 */
  1082 + gpio->simple_dvo &= ~(1 << 10);
  1083 +
  1084 + /* wait some time before requesting status */
  1085 + udelay(10);
  1086 +
  1087 + if ((gpio->simple_ival & 0x00000800) != 0x00000000) {
  1088 + error_status = 3;
  1089 + printf ("%s: failure at rs232_2, cts status is %d "
  1090 + "(should be 0)\n",
  1091 + __FUNCTION__,
  1092 + (gpio->simple_ival & 0x00000800) >> 11);
  1093 + }
  1094 +
  1095 + /* set PSC3_0, PSC3_1, PSC3_2 and PSC3_3 as output */
  1096 + gpio->simple_ddr &= ~(0x00000F00);
  1097 + gpio->simple_ddr |= 0x00000F00;
  1098 + break;
  1099 +
  1100 + default:
  1101 + printf ("%s: invalid rs232 number %s\n", __FUNCTION__, argv[2]);
  1102 + error_status = 1;
  1103 + break;
  1104 + }
  1105 +
  1106 + return error_status;
  1107 +}
  1108 +
  1109 +static void sm501_backlight (unsigned int state)
  1110 +{
  1111 + if (state == BL_ON) {
  1112 + *(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) |=
  1113 + (1 << 26) | (1 << 27);
  1114 + } else if (state == BL_OFF)
  1115 + *(vu_long *)(SM501_MMIO_BASE+SM501_PANEL_DISPLAY_CONTROL) &=
  1116 + ~((1 << 26) | (1 << 27));
  1117 +}
  1118 +
  1119 +int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  1120 +{
  1121 + int rcode;
  1122 +
  1123 +#ifdef CONFIG_STK52XX_REV100
  1124 + printf ("Revision 100 of STK52XX not supported!\n");
  1125 + return 1;
  1126 +#endif
  1127 + led_init();
  1128 + can_init();
  1129 +
  1130 + switch (argc) {
  1131 +
  1132 + case 0:
  1133 + case 1:
  1134 + break;
  1135 +
  1136 + case 2:
  1137 + if (strncmp (argv[1], "can", 3) == 0) {
  1138 + rcode = do_can (argv);
  1139 + if (rcode == 0)
  1140 + printf ("OK\n");
  1141 + else
  1142 + printf ("Error\n");
  1143 + return rcode;
  1144 + }
  1145 + break;
  1146 +
  1147 + case 3:
  1148 + if (strncmp (argv[1], "rs232", 3) == 0) {
  1149 + rcode = do_rs232 (argv);
  1150 + if (rcode == 0)
  1151 + printf ("OK\n");
  1152 + else
  1153 + printf ("Error\n");
  1154 + return rcode;
  1155 + } else if (strncmp (argv[1], "backlight", 4) == 0) {
  1156 + if (strncmp (argv[2], "on", 2) == 0) {
  1157 + sm501_backlight (BL_ON);
  1158 + return 0;
  1159 + }
  1160 + else if (strncmp (argv[2], "off", 3) == 0) {
  1161 + sm501_backlight (BL_OFF);
  1162 + return 0;
  1163 + }
  1164 + }
  1165 + break;
  1166 +
  1167 + case 4:
  1168 + if (strcmp (argv[1], "led") == 0) {
  1169 + return (do_led (argv));
  1170 + }
  1171 + break;
  1172 +
  1173 + default:
  1174 + break;
  1175 + }
  1176 +
  1177 + printf ("Usage:\nfkt cmd [arg1] [arg2] ...\n");
  1178 + return 1;
  1179 +}
  1180 +
  1181 +
  1182 +U_BOOT_CMD(
  1183 + sound , 5, 1, cmd_sound,
  1184 + "sound - Sound sub-system\n",
  1185 + "saw [duration] [freq] [channel]\n"
  1186 + " - generate sawtooth for 'duration' ms with frequency 'freq'\n"
  1187 + " on left \"l\" or right \"r\" channel\n"
  1188 + "sound square [duration] [freq] [channel]\n"
  1189 + " - generate squarewave for 'duration' ms with frequency 'freq'\n"
  1190 + " on left \"l\" or right \"r\" channel\n"
  1191 + "pcm1772 reg val\n"
  1192 +);
  1193 +
  1194 +U_BOOT_CMD(
  1195 + wav , 3, 1, cmd_wav,
  1196 + "wav - play wav file\n",
  1197 + "[addr] [bytes]\n"
  1198 + " - play wav file at address 'addr' with length 'bytes'\n"
  1199 +);
  1200 +
  1201 +U_BOOT_CMD(
  1202 + beep , 2, 1, cmd_beep,
  1203 + "beep - play short beep\n",
  1204 + "[channel]\n"
  1205 + " - play short beep on \"l\"eft or \"r\"ight channel\n"
  1206 +);
  1207 +
  1208 +U_BOOT_CMD(
  1209 + fkt , 4, 1, cmd_fkt,
  1210 + "fkt - Function test routines\n",
  1211 + "led number on/off\n"
  1212 + " - 'number's like printed on SKT52XX board\n"
  1213 + "fkt can\n"
  1214 + " - loopback plug for X83 required\n"
  1215 + "fkt rs232 number\n"
  1216 + " - loopback plug(s) for X2 required\n"
  1217 + "fkt backlight on/off\n"
  1218 + " - switch backlight on or off\n"
  1219 +);
  1220 +#endif /* CONFIG_STK52XX */
  1221 +#endif /* CFG_CMD_BSP */
... ... @@ -28,10 +28,10 @@
28 28 * FRAM devices read and write data at bus speed. In particular, there is no
29 29 * write delay. Also, there is no limit imposed on the numer of bytes that can
30 30 * be transferred with a single read or write.
31   - *
  31 + *
32 32 * Use the following configuration options to ensure no unneeded performance
33 33 * degradation (typical for EEPROM) is incured for FRAM memory:
34   - *
  34 + *
35 35 * #define CFG_I2C_FRAM
36 36 * #undef CFG_EEPROM_PAGE_WRITE_DELAY_MS
37 37 *
include/configs/TQM5200.h
Diff comments   View file @ 6617aae
... ... @@ -169,7 +169,8 @@
169 169 CFG_CMD_PING | \
170 170 CFG_CMD_POST_DIAG | \
171 171 CFG_CMD_REGINFO | \
172   - CFG_CMD_SNTP )
  172 + CFG_CMD_SNTP | \
  173 + CFG_CMD_BSP)
173 174  
174 175 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
175 176 #include <cmd_confdefs.h>
include/configs/o2dnt.h
Diff comments   View file @ 6617aae
... ... @@ -225,8 +225,8 @@
225 225 /*
226 226 * GPIO configuration
227 227 */
228   -//#define CFG_GPS_PORT_CONFIG 0x10002004
229   -#define CFG_GPS_PORT_CONFIG 0x00002004 //no CAN
  228 +/*#define CFG_GPS_PORT_CONFIG 0x10002004 */
  229 +#define CFG_GPS_PORT_CONFIG 0x00002004 /* no CAN */
230 230  
231 231 /*
232 232 * Miscellaneous configurable options
... ... @@ -91,6 +91,7 @@
91 91 #define MPC5XXX_GPIO (CFG_MBAR + 0x0b00)
92 92 #define MPC5XXX_WU_GPIO (CFG_MBAR + 0x0c00)
93 93 #define MPC5XXX_PCI (CFG_MBAR + 0x0d00)
  94 +#define MPC5XXX_SPI (CFG_MBAR + 0x0f00)
94 95 #define MPC5XXX_USB (CFG_MBAR + 0x1000)
95 96 #define MPC5XXX_SDMA (CFG_MBAR + 0x1200)
96 97 #define MPC5XXX_XLBARB (CFG_MBAR + 0x1f00)
97 98  
98 99  
99 100  
100 101  
101 102  
... ... @@ -381,17 +382,18 @@
381 382 volatile u8 ctur; /* PSC + 0x18 */
382 383 volatile u8 reserved5[3];
383 384 volatile u8 ctlr; /* PSC + 0x1c */
384   - volatile u8 reserved6[19];
  385 + volatile u8 reserved6[3];
  386 + volatile u16 ccr; /* PSC + 0x20 */
  387 + volatile u8 reserved7[14];
385 388 volatile u8 ivr; /* PSC + 0x30 */
386   - volatile u8 reserved7[3];
387   - volatile u8 ip; /* PSC + 0x34 */
388 389 volatile u8 reserved8[3];
389   - volatile u8 op1; /* PSC + 0x38 */
  390 + volatile u8 ip; /* PSC + 0x34 */
390 391 volatile u8 reserved9[3];
391   - volatile u8 op0; /* PSC + 0x3c */
  392 + volatile u8 op1; /* PSC + 0x38 */
392 393 volatile u8 reserved10[3];
393   - volatile u8 sicr; /* PSC + 0x40 */
  394 + volatile u8 op0; /* PSC + 0x3c */
394 395 volatile u8 reserved11[3];
  396 + volatile u32 sicr; /* PSC + 0x40 */
395 397 volatile u8 ircr1; /* PSC + 0x44 */
396 398 volatile u8 reserved12[3];
397 399 volatile u8 ircr2; /* PSC + 0x44 */
... ... @@ -598,6 +600,101 @@
598 600 volatile u32 msr; /* I2Cn + 0x0C */
599 601 volatile u32 mdr; /* I2Cn + 0x10 */
600 602 };
  603 +
  604 +struct mpc5xxx_spi {
  605 + volatile u8 cr1; /* SPI + 0x0F00 */
  606 + volatile u8 cr2; /* SPI + 0x0F01 */
  607 + volatile u8 reserved1[2];
  608 + volatile u8 brr; /* SPI + 0x0F04 */
  609 + volatile u8 sr; /* SPI + 0x0F05 */
  610 + volatile u8 reserved2[3];
  611 + volatile u8 dr; /* SPI + 0x0F09 */
  612 + volatile u8 reserved3[3];
  613 + volatile u8 pdr; /* SPI + 0x0F0D */
  614 + volatile u8 reserved4[2];
  615 + volatile u8 ddr; /* SPI + 0x0F10 */
  616 +};
  617 +
  618 +
  619 +struct mpc5xxx_gpt {
  620 + volatile u32 emsr; /* GPT + Timer# * 0x10 + 0x00 */
  621 + volatile u32 cir; /* GPT + Timer# * 0x10 + 0x04 */
  622 + volatile u32 pwmcr; /* GPT + Timer# * 0x10 + 0x08 */
  623 + volatile u32 sr; /* GPT + Timer# * 0x10 + 0x0c */
  624 +};
  625 +
  626 +struct mpc5xxx_gpt_0_7 {
  627 + struct mpc5xxx_gpt gpt0;
  628 + struct mpc5xxx_gpt gpt1;
  629 + struct mpc5xxx_gpt gpt2;
  630 + struct mpc5xxx_gpt gpt3;
  631 + struct mpc5xxx_gpt gpt4;
  632 + struct mpc5xxx_gpt gpt5;
  633 + struct mpc5xxx_gpt gpt6;
  634 + struct mpc5xxx_gpt gpt7;
  635 +};
  636 +
  637 +struct mscan_buffer {
  638 + volatile u8 idr[0x8]; /* 0x00 */
  639 + volatile u8 dsr[0x10]; /* 0x08 */
  640 + volatile u8 dlr; /* 0x18 */
  641 + volatile u8 tbpr; /* 0x19 */ /* This register is not applicable for receive buffers */
  642 + volatile u16 rsrv1; /* 0x1A */
  643 + volatile u8 tsrh; /* 0x1C */
  644 + volatile u8 tsrl; /* 0x1D */
  645 + volatile u16 rsrv2; /* 0x1E */
  646 +};
  647 +
  648 +struct mpc5xxx_mscan {
  649 + volatile u8 canctl0; /* MSCAN + 0x00 */
  650 + volatile u8 canctl1; /* MSCAN + 0x01 */
  651 + volatile u16 rsrv1; /* MSCAN + 0x02 */
  652 + volatile u8 canbtr0; /* MSCAN + 0x04 */
  653 + volatile u8 canbtr1; /* MSCAN + 0x05 */
  654 + volatile u16 rsrv2; /* MSCAN + 0x06 */
  655 + volatile u8 canrflg; /* MSCAN + 0x08 */
  656 + volatile u8 canrier; /* MSCAN + 0x09 */
  657 + volatile u16 rsrv3; /* MSCAN + 0x0A */
  658 + volatile u8 cantflg; /* MSCAN + 0x0C */
  659 + volatile u8 cantier; /* MSCAN + 0x0D */
  660 + volatile u16 rsrv4; /* MSCAN + 0x0E */
  661 + volatile u8 cantarq; /* MSCAN + 0x10 */
  662 + volatile u8 cantaak; /* MSCAN + 0x11 */
  663 + volatile u16 rsrv5; /* MSCAN + 0x12 */
  664 + volatile u8 cantbsel; /* MSCAN + 0x14 */
  665 + volatile u8 canidac; /* MSCAN + 0x15 */
  666 + volatile u16 rsrv6[3]; /* MSCAN + 0x16 */
  667 + volatile u8 canrxerr; /* MSCAN + 0x1C */
  668 + volatile u8 cantxerr; /* MSCAN + 0x1D */
  669 + volatile u16 rsrv7; /* MSCAN + 0x1E */
  670 + volatile u8 canidar0; /* MSCAN + 0x20 */
  671 + volatile u8 canidar1; /* MSCAN + 0x21 */
  672 + volatile u16 rsrv8; /* MSCAN + 0x22 */
  673 + volatile u8 canidar2; /* MSCAN + 0x24 */
  674 + volatile u8 canidar3; /* MSCAN + 0x25 */
  675 + volatile u16 rsrv9; /* MSCAN + 0x26 */
  676 + volatile u8 canidmr0; /* MSCAN + 0x28 */
  677 + volatile u8 canidmr1; /* MSCAN + 0x29 */
  678 + volatile u16 rsrv10; /* MSCAN + 0x2A */
  679 + volatile u8 canidmr2; /* MSCAN + 0x2C */
  680 + volatile u8 canidmr3; /* MSCAN + 0x2D */
  681 + volatile u16 rsrv11; /* MSCAN + 0x2E */
  682 + volatile u8 canidar4; /* MSCAN + 0x30 */
  683 + volatile u8 canidar5; /* MSCAN + 0x31 */
  684 + volatile u16 rsrv12; /* MSCAN + 0x32 */
  685 + volatile u8 canidar6; /* MSCAN + 0x34 */
  686 + volatile u8 canidar7; /* MSCAN + 0x35 */
  687 + volatile u16 rsrv13; /* MSCAN + 0x36 */
  688 + volatile u8 canidmr4; /* MSCAN + 0x38 */
  689 + volatile u8 canidmr5; /* MSCAN + 0x39 */
  690 + volatile u16 rsrv14; /* MSCAN + 0x3A */
  691 + volatile u8 canidmr6; /* MSCAN + 0x3C */
  692 + volatile u8 canidmr7; /* MSCAN + 0x3D */
  693 + volatile u16 rsrv15; /* MSCAN + 0x3E */
  694 +
  695 + struct mscan_buffer canrxfg; /* MSCAN + 0x40 */ /* Foreground receive buffer */
  696 + struct mscan_buffer cantxfg; /* MSCAN + 0x60 */ /* Foreground transmit buffer */
  697 + };
601 698  
602 699 /* function prototypes */
603 700 void loadtask(int basetask, int tasks);