Commit 6789e84ecaa8f45d053084e08c381284a04abff7

Authored by Heiko Schocher
1 parent 124913556c

i2c, omap24xx: convert driver to new mutlibus/mutliadapter framework

- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver

Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Tom Rini <trini@ti.com>
Cc: Lars Poeschel <poeschel@lemonage.de>
Cc: Steve Sakoman <sakoman@gmail.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>
Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Cc: Luca Ceresoli <luca.ceresoli@comelit.it>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Ilya Yanok <yanok@emcraft.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Nishanth Menon <nm@ti.com>
Cc: Pali Rohár <pali.rohar@gmail.com>
Cc: Peter Barada <peter.barada@logicpd.com>
Cc: Nagendra T S  <nagendra@mistralsolutions.com>
Cc: Michael Jones <michael.jones@matrix-vision.de>
Cc: Raphael Assenat <raph@8d.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>

Showing 41 changed files with 239 additions and 188 deletions Side-by-side Diff

... ... @@ -2058,6 +2058,19 @@
2058 2058 - CONFIG_SYS_I2C_SH_SPEED5 for for the speed channel 5
2059 2059 - CONFIF_SYS_I2C_SH_NUM_CONTROLLERS for nummber of i2c buses
2060 2060  
  2061 + - drivers/i2c/omap24xx_i2c.c
  2062 + - activate this driver with CONFIG_SYS_I2C_OMAP24XX
  2063 + - CONFIG_SYS_OMAP24_I2C_SPEED speed channel 0
  2064 + - CONFIG_SYS_OMAP24_I2C_SLAVE slave addr channel 0
  2065 + - CONFIG_SYS_OMAP24_I2C_SPEED1 speed channel 1
  2066 + - CONFIG_SYS_OMAP24_I2C_SLAVE1 slave addr channel 1
  2067 + - CONFIG_SYS_OMAP24_I2C_SPEED2 speed channel 2
  2068 + - CONFIG_SYS_OMAP24_I2C_SLAVE2 slave addr channel 2
  2069 + - CONFIG_SYS_OMAP24_I2C_SPEED3 speed channel 3
  2070 + - CONFIG_SYS_OMAP24_I2C_SLAVE3 slave addr channel 3
  2071 + - CONFIG_SYS_OMAP24_I2C_SPEED4 speed channel 4
  2072 + - CONFIG_SYS_OMAP24_I2C_SLAVE4 slave addr channel 4
  2073 +
2061 2074 additional defines:
2062 2075  
2063 2076 CONFIG_SYS_NUM_I2C_BUSES
arch/arm/cpu/armv7/omap-common/clocks-common.c
... ... @@ -779,7 +779,8 @@
779 779 static int gpi2c = 1;
780 780  
781 781 if (gpi2c) {
782   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  782 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED,
  783 + CONFIG_SYS_OMAP24_I2C_SLAVE);
783 784 gpi2c = 0;
784 785 }
785 786 }
arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
... ... @@ -33,6 +33,10 @@
33 33 .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
34 34  
35 35 . = ALIGN(4);
  36 + .u_boot_list : {
  37 + KEEP(*(SORT(.u_boot_list*)));
  38 + } >.sram
  39 + . = ALIGN(4);
36 40 __image_copy_end = .;
37 41 _end = .;
38 42  
arch/arm/cpu/armv7/omap3/board.c
... ... @@ -98,7 +98,7 @@
98 98 gpmc_init();
99 99 #endif
100 100 #ifdef CONFIG_SPL_I2C_SUPPORT
101   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  101 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
102 102 #endif
103 103 }
104 104 #endif /* CONFIG_SPL_BUILD */
arch/arm/cpu/armv7/omap3/clock.c
... ... @@ -708,7 +708,7 @@
708 708 sr32(&prcm_base->iclken_per, 17, 1, 1);
709 709 #endif
710 710  
711   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
  711 +#ifdef CONFIG_SYS_I2C_OMAP34XX
712 712 /* Turn on all 3 I2C clocks */
713 713 sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
714 714 sr32(&prcm_base->iclken1_core, 15, 3, 0x7); /* I2C1,2,3 = on */
arch/arm/include/asm/arch-am33xx/i2c.h
... ... @@ -4,8 +4,8 @@
4 4 *
5 5 * SPDX-License-Identifier: GPL-2.0+
6 6 */
7   -#ifndef _I2C_H_
8   -#define _I2C_H_
  7 +#ifndef _I2C_AM33XX_H_
  8 +#define _I2C_AM33XX_H_
9 9  
10 10 #define I2C_BASE1 0x44E0B000
11 11 #define I2C_BASE2 0x4802A000
... ... @@ -62,5 +62,5 @@
62 62 #define I2C_IP_CLK 48000000
63 63 #define I2C_INTERNAL_SAMPLING_CLK 12000000
64 64  
65   -#endif /* _I2C_H_ */
  65 +#endif /* _I2C_AM33XX_H_ */
board/compulab/cm_t35/cm_t35.c
... ... @@ -482,7 +482,7 @@
482 482 &ctrl_base->gpmc_nadv_ale);
483 483 }
484 484  
485   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
  485 +#ifdef CONFIG_SYS_I2C_OMAP34XX
486 486 /*
487 487 * Routine: reset_net_chip
488 488 * Description: reset the Ethernet controller via TPS65930 GPIO
board/compulab/common/Makefile
... ... @@ -6,6 +6,6 @@
6 6 # SPDX-License-Identifier: GPL-2.0+
7 7 #
8 8  
9   -obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += eeprom.o
  9 +obj-$(CONFIG_SYS_I2C_OMAP34XX) += eeprom.o
10 10 obj-$(CONFIG_LCD) += omap3_display.o
board/compulab/common/eeprom.h
... ... @@ -10,7 +10,7 @@
10 10 #ifndef _EEPROM_
11 11 #define _EEPROM_
12 12  
13   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
  13 +#ifdef CONFIG_SYS_I2C_OMAP34XX
14 14 int cl_eeprom_read_mac_addr(uchar *buf);
15 15 u32 cl_eeprom_get_board_rev(void);
16 16 #else
board/logicpd/am3517evm/am3517evm.c
... ... @@ -98,8 +98,8 @@
98 98 */
99 99 int misc_init_r(void)
100 100 {
101   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
102   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  101 +#ifdef CONFIG_SYS_I2C_OMAP34XX
  102 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
103 103 #endif
104 104  
105 105 dieid_num_r();
... ... @@ -92,7 +92,7 @@
92 92 {
93 93 int revision;
94 94  
95   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
  95 +#ifdef CONFIG_SYS_I2C_OMAP34XX
96 96 unsigned char data;
97 97  
98 98 /* board revisions <= R2410 connect 4030 irq_1 to gpio112 */
board/phytec/pcm051/board.c
... ... @@ -91,7 +91,7 @@
91 91 {
92 92 /* Initalize the board header */
93 93 enable_i2c0_pin_mux();
94   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  94 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
95 95  
96 96 enable_board_pin_mux();
97 97 }
... ... @@ -108,7 +108,7 @@
108 108 */
109 109 int board_init(void)
110 110 {
111   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  111 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
112 112  
113 113 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
114 114  
board/siemens/common/board.c
... ... @@ -42,7 +42,7 @@
42 42 {
43 43 /* Initalize the board header */
44 44 enable_i2c0_pin_mux();
45   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  45 + i2c_set_bus_num(0);
46 46 if (read_eeprom() < 0)
47 47 puts("Could not get board ID.\n");
48 48  
... ... @@ -67,7 +67,7 @@
67 67 #if defined(CONFIG_HW_WATCHDOG)
68 68 hw_watchdog_init();
69 69 #endif /* defined(CONFIG_HW_WATCHDOG) */
70   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  70 + i2c_set_bus_num(0);
71 71 if (read_eeprom() < 0)
72 72 puts("Could not get board ID.\n");
73 73  
board/ti/am335x/board.c
... ... @@ -397,7 +397,7 @@
397 397 struct am335x_baseboard_id header;
398 398  
399 399 enable_i2c0_pin_mux();
400   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  400 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
401 401 if (read_eeprom(&header) < 0)
402 402 puts("Could not get board ID.\n");
403 403  
board/ti/am3517crane/am3517crane.c
... ... @@ -43,8 +43,8 @@
43 43 */
44 44 int misc_init_r(void)
45 45 {
46   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
47   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  46 +#ifdef CONFIG_SYS_I2C_OMAP34XX
  47 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
48 48 #endif
49 49  
50 50 dieid_num_r();
... ... @@ -146,8 +146,8 @@
146 146 int misc_init_r(void)
147 147 {
148 148  
149   -#ifdef CONFIG_DRIVER_OMAP34XX_I2C
150   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  149 +#ifdef CONFIG_SYS_I2C_OMAP34XX
  150 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
151 151 #endif
152 152  
153 153 #if defined(CONFIG_CMD_NET)
drivers/i2c/Makefile
... ... @@ -12,8 +12,6 @@
12 12 obj-$(CONFIG_I2C_MV) += mv_i2c.o
13 13 obj-$(CONFIG_I2C_MXS) += mxs_i2c.o
14 14 obj-$(CONFIG_DRIVER_OMAP1510_I2C) += omap1510_i2c.o
15   -obj-$(CONFIG_DRIVER_OMAP24XX_I2C) += omap24xx_i2c.o
16   -obj-$(CONFIG_DRIVER_OMAP34XX_I2C) += omap24xx_i2c.o
17 15 obj-$(CONFIG_PCA9564_I2C) += pca9564_i2c.o
18 16 obj-$(CONFIG_DRIVER_S3C24X0_I2C) += s3c24x0_i2c.o
19 17 obj-$(CONFIG_TSI108_I2C) += tsi108_i2c.o
... ... @@ -23,6 +21,8 @@
23 21 obj-$(CONFIG_SYS_I2C_FSL) += fsl_i2c.o
24 22 obj-$(CONFIG_SYS_I2C_FTI2C010) += fti2c010.o
25 23 obj-$(CONFIG_SYS_I2C_MXC) += mxc_i2c.o
  24 +obj-$(CONFIG_SYS_I2C_OMAP24XX) += omap24xx_i2c.o
  25 +obj-$(CONFIG_SYS_I2C_OMAP34XX) += omap24xx_i2c.o
26 26 obj-$(CONFIG_SYS_I2C_PPC4XX) += ppc4xx_i2c.o
27 27 obj-$(CONFIG_SYS_I2C_RCAR) += rcar_i2c.o
28 28 obj-$(CONFIG_SYS_I2C_SH) += sh_i2c.o
drivers/i2c/omap24xx_i2c.c
... ... @@ -35,6 +35,7 @@
35 35 */
36 36  
37 37 #include <common.h>
  38 +#include <i2c.h>
38 39  
39 40 #include <asm/arch/i2c.h>
40 41 #include <asm/io.h>
41 42  
42 43  
... ... @@ -48,22 +49,14 @@
48 49 /* Absolutely safe for status update at 100 kHz I2C: */
49 50 #define I2C_WAIT 200
50 51  
51   -static int wait_for_bb(void);
52   -static u16 wait_for_event(void);
53   -static void flush_fifo(void);
  52 +static int wait_for_bb(struct i2c_adapter *adap);
  53 +static struct i2c *omap24_get_base(struct i2c_adapter *adap);
  54 +static u16 wait_for_event(struct i2c_adapter *adap);
  55 +static void flush_fifo(struct i2c_adapter *adap);
54 56  
55   -/*
56   - * For SPL boot some boards need i2c before SDRAM is initialised so force
57   - * variables to live in SRAM
58   - */
59   -static struct i2c __attribute__((section (".data"))) *i2c_base =
60   - (struct i2c *)I2C_DEFAULT_BASE;
61   -static unsigned int __attribute__((section (".data"))) bus_initialized[I2C_BUS_MAX] =
62   - { [0 ... (I2C_BUS_MAX-1)] = 0 };
63   -static unsigned int __attribute__((section (".data"))) current_bus = 0;
64   -
65   -void i2c_init(int speed, int slaveadd)
  57 +static void omap24_i2c_init(struct i2c_adapter *adap, int speed, int slaveadd)
66 58 {
  59 + struct i2c *i2c_base = omap24_get_base(adap);
67 60 int psc, fsscll, fssclh;
68 61 int hsscll = 0, hssclh = 0;
69 62 u32 scll, sclh;
70 63  
71 64  
... ... @@ -163,16 +156,15 @@
163 156 I2C_IE_NACK_IE | I2C_IE_AL_IE, &i2c_base->ie);
164 157 #endif
165 158 udelay(1000);
166   - flush_fifo();
  159 + flush_fifo(adap);
167 160 writew(0xFFFF, &i2c_base->stat);
168 161 writew(0, &i2c_base->cnt);
169   -
170   - if (gd->flags & GD_FLG_RELOC)
171   - bus_initialized[current_bus] = 1;
172 162 }
173 163  
174   -static void flush_fifo(void)
175   -{ u16 stat;
  164 +static void flush_fifo(struct i2c_adapter *adap)
  165 +{
  166 + struct i2c *i2c_base = omap24_get_base(adap);
  167 + u16 stat;
176 168  
177 169 /* note: if you try and read data when its not there or ready
178 170 * you get a bus error
179 171  
... ... @@ -192,8 +184,9 @@
192 184 * i2c_probe: Use write access. Allows to identify addresses that are
193 185 * write-only (like the config register of dual-port EEPROMs)
194 186 */
195   -int i2c_probe(uchar chip)
  187 +static int omap24_i2c_probe(struct i2c_adapter *adap, uchar chip)
196 188 {
  189 + struct i2c *i2c_base = omap24_get_base(adap);
197 190 u16 status;
198 191 int res = 1; /* default = fail */
199 192  
... ... @@ -201,7 +194,7 @@
201 194 return res;
202 195  
203 196 /* Wait until bus is free */
204   - if (wait_for_bb())
  197 + if (wait_for_bb(adap))
205 198 return res;
206 199  
207 200 /* No data transfer, slave addr only */
... ... @@ -212,7 +205,7 @@
212 205 writew(I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
213 206 I2C_CON_STP, &i2c_base->con);
214 207  
215   - status = wait_for_event();
  208 + status = wait_for_event(adap);
216 209  
217 210 if ((status & ~I2C_STAT_XRDY) == 0 || (status & I2C_STAT_AL)) {
218 211 /*
... ... @@ -223,7 +216,7 @@
223 216 */
224 217 if (status == I2C_STAT_XRDY)
225 218 printf("i2c_probe: pads on bus %d probably not configured (status=0x%x)\n",
226   - current_bus, status);
  219 + adap->hwadapnr, status);
227 220  
228 221 goto pr_exit;
229 222 }
... ... @@ -239,7 +232,7 @@
239 232 I2C_CON_STP, &i2c_base->con); /* STP */
240 233 }
241 234 pr_exit:
242   - flush_fifo();
  235 + flush_fifo(adap);
243 236 writew(0xFFFF, &i2c_base->stat);
244 237 writew(0, &i2c_base->cnt);
245 238 return res;
246 239  
... ... @@ -258,8 +251,10 @@
258 251 * or that do not need a register address at all (such as some clock
259 252 * distributors).
260 253 */
261   -int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
  254 +static int omap24_i2c_read(struct i2c_adapter *adap, uchar chip, uint addr,
  255 + int alen, uchar *buffer, int len)
262 256 {
  257 + struct i2c *i2c_base = omap24_get_base(adap);
263 258 int i2c_error = 0;
264 259 u16 status;
265 260  
... ... @@ -287,7 +282,7 @@
287 282 }
288 283  
289 284 /* Wait until bus not busy */
290   - if (wait_for_bb())
  285 + if (wait_for_bb(adap))
291 286 return 1;
292 287  
293 288 /* Zero, one or two bytes reg address (offset) */
294 289  
... ... @@ -308,12 +303,12 @@
308 303 #endif
309 304 /* Send register offset */
310 305 while (1) {
311   - status = wait_for_event();
  306 + status = wait_for_event(adap);
312 307 /* Try to identify bus that is not padconf'd for I2C */
313 308 if (status == I2C_STAT_XRDY) {
314 309 i2c_error = 2;
315 310 printf("i2c_read (addr phase): pads on bus %d probably not configured (status=0x%x)\n",
316   - current_bus, status);
  311 + adap->hwadapnr, status);
317 312 goto rd_exit;
318 313 }
319 314 if (status == 0 || status & I2C_STAT_NACK) {
... ... @@ -348,7 +343,7 @@
348 343  
349 344 /* Receive data */
350 345 while (1) {
351   - status = wait_for_event();
  346 + status = wait_for_event(adap);
352 347 /*
353 348 * Try to identify bus that is not padconf'd for I2C. This
354 349 * state could be left over from previous transactions if
... ... @@ -357,7 +352,7 @@
357 352 if (status == I2C_STAT_XRDY) {
358 353 i2c_error = 2;
359 354 printf("i2c_read (data phase): pads on bus %d probably not configured (status=0x%x)\n",
360   - current_bus, status);
  355 + adap->hwadapnr, status);
361 356 goto rd_exit;
362 357 }
363 358 if (status == 0 || status & I2C_STAT_NACK) {
364 359  
365 360  
... ... @@ -375,15 +370,17 @@
375 370 }
376 371  
377 372 rd_exit:
378   - flush_fifo();
  373 + flush_fifo(adap);
379 374 writew(0xFFFF, &i2c_base->stat);
380 375 writew(0, &i2c_base->cnt);
381 376 return i2c_error;
382 377 }
383 378  
384 379 /* i2c_write: Address (reg offset) may be 0, 1 or 2 bytes long. */
385   -int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
  380 +static int omap24_i2c_write(struct i2c_adapter *adap, uchar chip, uint addr,
  381 + int alen, uchar *buffer, int len)
386 382 {
  383 + struct i2c *i2c_base = omap24_get_base(adap);
387 384 int i;
388 385 u16 status;
389 386 int i2c_error = 0;
... ... @@ -415,7 +412,7 @@
415 412 }
416 413  
417 414 /* Wait until bus not busy */
418   - if (wait_for_bb())
  415 + if (wait_for_bb(adap))
419 416 return 1;
420 417  
421 418 /* Start address phase - will write regoffset + len bytes data */
422 419  
... ... @@ -428,12 +425,12 @@
428 425  
429 426 while (alen) {
430 427 /* Must write reg offset (one or two bytes) */
431   - status = wait_for_event();
  428 + status = wait_for_event(adap);
432 429 /* Try to identify bus that is not padconf'd for I2C */
433 430 if (status == I2C_STAT_XRDY) {
434 431 i2c_error = 2;
435 432 printf("i2c_write: pads on bus %d probably not configured (status=0x%x)\n",
436   - current_bus, status);
  433 + adap->hwadapnr, status);
437 434 goto wr_exit;
438 435 }
439 436 if (status == 0 || status & I2C_STAT_NACK) {
... ... @@ -455,7 +452,7 @@
455 452 }
456 453 /* Address phase is over, now write data */
457 454 for (i = 0; i < len; i++) {
458   - status = wait_for_event();
  455 + status = wait_for_event(adap);
459 456 if (status == 0 || status & I2C_STAT_NACK) {
460 457 i2c_error = 1;
461 458 printf("i2c_write: error waiting for data ACK (status=0x%x)\n",
... ... @@ -474,7 +471,7 @@
474 471 }
475 472  
476 473 wr_exit:
477   - flush_fifo();
  474 + flush_fifo(adap);
478 475 writew(0xFFFF, &i2c_base->stat);
479 476 writew(0, &i2c_base->cnt);
480 477 return i2c_error;
481 478  
... ... @@ -484,8 +481,9 @@
484 481 * Wait for the bus to be free by checking the Bus Busy (BB)
485 482 * bit to become clear
486 483 */
487   -static int wait_for_bb(void)
  484 +static int wait_for_bb(struct i2c_adapter *adap)
488 485 {
  486 + struct i2c *i2c_base = omap24_get_base(adap);
489 487 int timeout = I2C_TIMEOUT;
490 488 u16 stat;
491 489  
492 490  
... ... @@ -514,8 +512,9 @@
514 512 * Wait for the I2C controller to complete current action
515 513 * and update status
516 514 */
517   -static u16 wait_for_event(void)
  515 +static u16 wait_for_event(struct i2c_adapter *adap)
518 516 {
  517 + struct i2c *i2c_base = omap24_get_base(adap);
519 518 u16 status;
520 519 int timeout = I2C_TIMEOUT;
521 520  
... ... @@ -540,7 +539,7 @@
540 539 * not been configured for I2C, and/or pull-ups are missing.
541 540 */
542 541 printf("Check if pads/pull-ups of bus %d are properly configured\n",
543   - current_bus);
  542 + adap->hwadapnr);
544 543 writew(0xFFFF, &i2c_base->stat);
545 544 status = 0;
546 545 }
547 546  
548 547  
549 548  
550 549  
551 550  
552 551  
553 552  
554 553  
555 554  
556 555  
557 556  
558 557  
... ... @@ -548,49 +547,94 @@
548 547 return status;
549 548 }
550 549  
551   -int i2c_set_bus_num(unsigned int bus)
  550 +static struct i2c *omap24_get_base(struct i2c_adapter *adap)
552 551 {
553   - if (bus >= I2C_BUS_MAX) {
554   - printf("Bad bus: %x\n", bus);
555   - return -1;
556   - }
557   -
558   - switch (bus) {
559   - default:
560   - bus = 0; /* Fall through */
  552 + switch (adap->hwadapnr) {
561 553 case 0:
562   - i2c_base = (struct i2c *)I2C_BASE1;
  554 + return (struct i2c *)I2C_BASE1;
563 555 break;
564 556 case 1:
565   - i2c_base = (struct i2c *)I2C_BASE2;
  557 + return (struct i2c *)I2C_BASE2;
566 558 break;
567 559 #if (I2C_BUS_MAX > 2)
568 560 case 2:
569   - i2c_base = (struct i2c *)I2C_BASE3;
  561 + return (struct i2c *)I2C_BASE3;
570 562 break;
571 563 #if (I2C_BUS_MAX > 3)
572 564 case 3:
573   - i2c_base = (struct i2c *)I2C_BASE4;
  565 + return (struct i2c *)I2C_BASE4;
574 566 break;
575 567 #if (I2C_BUS_MAX > 4)
576 568 case 4:
577   - i2c_base = (struct i2c *)I2C_BASE5;
  569 + return (struct i2c *)I2C_BASE5;
578 570 break;
579 571 #endif
580 572 #endif
581 573 #endif
  574 + default:
  575 + printf("wrong hwadapnr: %d\n", adap->hwadapnr);
  576 + break;
582 577 }
  578 + return NULL;
  579 +}
583 580  
584   - current_bus = bus;
  581 +#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED1)
  582 +#define CONFIG_SYS_OMAP24_I2C_SPEED1 CONFIG_SYS_OMAP24_I2C_SPEED
  583 +#endif
  584 +#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE1)
  585 +#define CONFIG_SYS_OMAP24_I2C_SLAVE1 CONFIG_SYS_OMAP24_I2C_SLAVE
  586 +#endif
585 587  
586   - if (!bus_initialized[current_bus])
587   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  588 +U_BOOT_I2C_ADAP_COMPLETE(omap24_0, omap24_i2c_init, omap24_i2c_probe,
  589 + omap24_i2c_read, omap24_i2c_write, NULL,
  590 + CONFIG_SYS_OMAP24_I2C_SPEED,
  591 + CONFIG_SYS_OMAP24_I2C_SLAVE,
  592 + 0)
  593 +U_BOOT_I2C_ADAP_COMPLETE(omap24_1, omap24_i2c_init, omap24_i2c_probe,
  594 + omap24_i2c_read, omap24_i2c_write, NULL,
  595 + CONFIG_SYS_OMAP24_I2C_SPEED1,
  596 + CONFIG_SYS_OMAP24_I2C_SLAVE1,
  597 + 1)
  598 +#if (I2C_BUS_MAX > 2)
  599 +#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED2)
  600 +#define CONFIG_SYS_OMAP24_I2C_SPEED2 CONFIG_SYS_OMAP24_I2C_SPEED
  601 +#endif
  602 +#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE2)
  603 +#define CONFIG_SYS_OMAP24_I2C_SLAVE2 CONFIG_SYS_OMAP24_I2C_SLAVE
  604 +#endif
588 605  
589   - return 0;
590   -}
  606 +U_BOOT_I2C_ADAP_COMPLETE(omap24_2, omap24_i2c_init, omap24_i2c_probe,
  607 + omap24_i2c_read, omap24_i2c_write, NULL,
  608 + CONFIG_SYS_OMAP24_I2C_SPEED2,
  609 + CONFIG_SYS_OMAP24_I2C_SLAVE2,
  610 + 2)
  611 +#if (I2C_BUS_MAX > 3)
  612 +#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED3)
  613 +#define CONFIG_SYS_OMAP24_I2C_SPEED3 CONFIG_SYS_OMAP24_I2C_SPEED
  614 +#endif
  615 +#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE3)
  616 +#define CONFIG_SYS_OMAP24_I2C_SLAVE3 CONFIG_SYS_OMAP24_I2C_SLAVE
  617 +#endif
591 618  
592   -int i2c_get_bus_num(void)
593   -{
594   - return (int) current_bus;
595   -}
  619 +U_BOOT_I2C_ADAP_COMPLETE(omap24_3, omap24_i2c_init, omap24_i2c_probe,
  620 + omap24_i2c_read, omap24_i2c_write, NULL,
  621 + CONFIG_SYS_OMAP24_I2C_SPEED3,
  622 + CONFIG_SYS_OMAP24_I2C_SLAVE3,
  623 + 3)
  624 +#if (I2C_BUS_MAX > 4)
  625 +#if !defined(CONFIG_SYS_OMAP24_I2C_SPEED4)
  626 +#define CONFIG_SYS_OMAP24_I2C_SPEED4 CONFIG_SYS_OMAP24_I2C_SPEED
  627 +#endif
  628 +#if !defined(CONFIG_SYS_OMAP24_I2C_SLAVE4)
  629 +#define CONFIG_SYS_OMAP24_I2C_SLAVE4 CONFIG_SYS_OMAP24_I2C_SLAVE
  630 +#endif
  631 +
  632 +U_BOOT_I2C_ADAP_COMPLETE(omap24_4, omap24_i2c_init, omap24_i2c_probe,
  633 + omap24_i2c_read, omap24_i2c_write, NULL,
  634 + CONFIG_SYS_OMAP24_I2C_SPEED4,
  635 + CONFIG_SYS_OMAP24_I2C_SLAVE4,
  636 + 4)
  637 +#endif
  638 +#endif
  639 +#endif
include/configs/am335x_evm.h
... ... @@ -183,7 +183,6 @@
183 183 #define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */
184 184 #define CONFIG_BAUDRATE 115200
185 185  
186   -/* I2C Configuration */
187 186 #define CONFIG_CMD_EEPROM
188 187 #define CONFIG_ENV_EEPROM_IS_ON_I2C
189 188 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
include/configs/am3517_crane.h
... ... @@ -142,10 +142,10 @@
142 142 #undef CONFIG_CMD_IMLS /* List all found images */
143 143  
144 144 #define CONFIG_SYS_NO_FLASH
145   -#define CONFIG_HARD_I2C 1
146   -#define CONFIG_SYS_I2C_SPEED 100000
147   -#define CONFIG_SYS_I2C_SLAVE 1
148   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  145 +#define CONFIG_SYS_I2C
  146 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  147 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  148 +#define CONFIG_SYS_I2C_OMAP34XX
149 149  
150 150 #undef CONFIG_CMD_NET
151 151 #undef CONFIG_CMD_NFS
include/configs/am3517_evm.h
... ... @@ -136,10 +136,10 @@
136 136 #undef CONFIG_CMD_IMLS /* List all found images */
137 137  
138 138 #define CONFIG_SYS_NO_FLASH
139   -#define CONFIG_HARD_I2C 1
140   -#define CONFIG_SYS_I2C_SPEED 100000
141   -#define CONFIG_SYS_I2C_SLAVE 1
142   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  139 +#define CONFIG_SYS_I2C
  140 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  141 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  142 +#define CONFIG_SYS_I2C_OMAP34XX
143 143  
144 144 #undef CONFIG_CMD_NET
145 145 #undef CONFIG_CMD_NFS
include/configs/cm_t35.h
... ... @@ -141,10 +141,10 @@
141 141 #undef CONFIG_CMD_IMLS /* List all found images */
142 142  
143 143 #define CONFIG_SYS_NO_FLASH
144   -#define CONFIG_HARD_I2C
145   -#define CONFIG_SYS_I2C_SPEED 100000
146   -#define CONFIG_SYS_I2C_SLAVE 1
147   -#define CONFIG_DRIVER_OMAP34XX_I2C
  144 +#define CONFIG_SYS_I2C
  145 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  146 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  147 +#define CONFIG_SYS_I2C_OMAP34XX
148 148 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
149 149 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
150 150 #define CONFIG_I2C_MULTI_BUS
include/configs/devkit8000.h
... ... @@ -90,10 +90,10 @@
90 90 #define CONFIG_DOS_PARTITION 1
91 91  
92 92 /* I2C */
93   -#define CONFIG_HARD_I2C 1
94   -#define CONFIG_SYS_I2C_SPEED 100000
95   -#define CONFIG_SYS_I2C_SLAVE 1
96   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  93 +#define CONFIG_SYS_I2C
  94 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  95 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  96 +#define CONFIG_SYS_I2C_OMAP34XX
97 97  
98 98 /* TWL4030 */
99 99 #define CONFIG_TWL4030_POWER 1
include/configs/dig297.h
... ... @@ -123,10 +123,10 @@
123 123 #undef CONFIG_CMD_NFS /* NFS support */
124 124  
125 125 #define CONFIG_SYS_NO_FLASH
126   -#define CONFIG_HARD_I2C
127   -#define CONFIG_SYS_I2C_SPEED 100000
128   -#define CONFIG_SYS_I2C_SLAVE 1
129   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  126 +#define CONFIG_SYS_I2C
  127 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  128 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  129 +#define CONFIG_SYS_I2C_OMAP34XX
130 130  
131 131 /*
132 132 * TWL4030
include/configs/mcx.h
... ... @@ -137,10 +137,10 @@
137 137 #undef CONFIG_CMD_IMLS /* List all found images */
138 138  
139 139 #define CONFIG_SYS_NO_FLASH
140   -#define CONFIG_HARD_I2C
141   -#define CONFIG_SYS_I2C_SPEED 100000
142   -#define CONFIG_SYS_I2C_SLAVE 1
143   -#define CONFIG_DRIVER_OMAP34XX_I2C
  140 +#define CONFIG_SYS_I2C
  141 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  142 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  143 +#define CONFIG_SYS_I2C_OMAP34XX
144 144  
145 145 /* RTC */
146 146 #define CONFIG_RTC_DS1337
include/configs/nokia_rx51.h
... ... @@ -157,10 +157,10 @@
157 157 #undef CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
158 158  
159 159 #define CONFIG_OMAP3_SPI
160   -#define CONFIG_HARD_I2C
161   -#define CONFIG_SYS_I2C_SPEED 100000
162   -#define CONFIG_SYS_I2C_SLAVE 1
163   -#define CONFIG_DRIVER_OMAP34XX_I2C
  160 +#define CONFIG_SYS_I2C
  161 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  162 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  163 +#define CONFIG_SYS_I2C_OMAP34XX
164 164  
165 165 /*
166 166 * TWL4030
include/configs/omap3_beagle.h
... ... @@ -161,11 +161,10 @@
161 161 #undef CONFIG_CMD_IMLS /* List all found images */
162 162  
163 163 #define CONFIG_SYS_NO_FLASH
164   -#define CONFIG_HARD_I2C 1
165   -#define CONFIG_SYS_I2C_SPEED 100000
166   -#define CONFIG_SYS_I2C_SLAVE 1
167   -#define CONFIG_I2C_MULTI_BUS 1
168   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  164 +#define CONFIG_SYS_I2C
  165 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  166 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  167 +#define CONFIG_SYS_I2C_OMAP34XX
169 168 #define CONFIG_VIDEO_OMAP3 /* DSS Support */
170 169  
171 170 /*
include/configs/omap3_evm_common.h
... ... @@ -87,11 +87,10 @@
87 87 /*
88 88 * I2C
89 89 */
90   -#define CONFIG_HARD_I2C
91   -#define CONFIG_DRIVER_OMAP34XX_I2C
92   -
93   -#define CONFIG_SYS_I2C_SPEED 100000
94   -#define CONFIG_SYS_I2C_SLAVE 1
  90 +#define CONFIG_SYS_I2C
  91 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  92 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  93 +#define CONFIG_SYS_I2C_OMAP34XX
95 94  
96 95 /*
97 96 * PISMO support
include/configs/omap3_igep00x0.h
... ... @@ -124,10 +124,10 @@
124 124 #undef CONFIG_CMD_IMLS /* List all found images */
125 125  
126 126 #define CONFIG_SYS_NO_FLASH
127   -#define CONFIG_HARD_I2C 1
128   -#define CONFIG_SYS_I2C_SPEED 100000
129   -#define CONFIG_SYS_I2C_SLAVE 1
130   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  127 +#define CONFIG_SYS_I2C
  128 +#define CONFIG_SYS_I2C_OMAP34XX
  129 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  130 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
131 131  
132 132 /*
133 133 * TWL4030
include/configs/omap3_logic.h
... ... @@ -118,12 +118,10 @@
118 118 /*
119 119 * I2C
120 120 */
121   -#define CONFIG_HARD_I2C
122   -#define CONFIG_DRIVER_OMAP34XX_I2C
123   -
124   -#define CONFIG_SYS_I2C_SPEED 100000
125   -#define CONFIG_SYS_I2C_SLAVE 1
126   -#define CONFIG_I2C_MULTI_BUS
  121 +#define CONFIG_SYS_I2C
  122 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  123 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  124 +#define CONFIG_SYS_I2C_OMAP34XX
127 125  
128 126 /*
129 127 * TWL4030
include/configs/omap3_mvblx.h
... ... @@ -128,11 +128,10 @@
128 128 #define CONFIG_CMD_PING
129 129 #define CONFIG_CMD_FPGA
130 130  
131   -#define CONFIG_HARD_I2C 1
132   -#define CONFIG_SYS_I2C_SPEED 100000
133   -#define CONFIG_SYS_I2C_SLAVE 0
134   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
135   -#define CONFIG_I2C_MULTI_BUS 1
  131 +#define CONFIG_SYS_I2C
  132 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  133 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  134 +#define CONFIG_SYS_I2C_OMAP34XX
136 135  
137 136 /*
138 137 * TWL4030
include/configs/omap3_overo.h
... ... @@ -98,11 +98,10 @@
98 98 #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
99 99  
100 100 #define CONFIG_SYS_NO_FLASH
101   -#define CONFIG_HARD_I2C
102   -#define CONFIG_SYS_I2C_SPEED 100000
103   -#define CONFIG_SYS_I2C_SLAVE 1
104   -#define CONFIG_I2C_MULTI_BUS
105   -#define CONFIG_DRIVER_OMAP34XX_I2C
  101 +#define CONFIG_SYS_I2C
  102 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  103 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  104 +#define CONFIG_SYS_I2C_OMAP34XX
106 105  
107 106 /*
108 107 * TWL4030
include/configs/omap3_pandora.h
... ... @@ -111,10 +111,10 @@
111 111 #undef CONFIG_CMD_NFS /* NFS support */
112 112  
113 113 #define CONFIG_SYS_NO_FLASH
114   -#define CONFIG_HARD_I2C 1
115   -#define CONFIG_SYS_I2C_SPEED 100000
116   -#define CONFIG_SYS_I2C_SLAVE 1
117   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  114 +#define CONFIG_SYS_I2C
  115 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  116 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  117 +#define CONFIG_SYS_I2C_OMAP34XX
118 118  
119 119 /*
120 120 * TWL4030
include/configs/omap3_sdp3430.h
... ... @@ -114,10 +114,10 @@
114 114 /*
115 115 * I2C for power management setup
116 116 */
117   -#define CONFIG_HARD_I2C 1
118   -#define CONFIG_SYS_I2C_SPEED 100000
119   -#define CONFIG_SYS_I2C_SLAVE 1
120   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  117 +#define CONFIG_SYS_I2C
  118 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  119 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  120 +#define CONFIG_SYS_I2C_OMAP34XX
121 121  
122 122 /* OMITTED: single 1 Gbit MT29F1G NAND flash */
123 123  
include/configs/omap3_zoom1.h
... ... @@ -118,10 +118,10 @@
118 118 #undef CONFIG_CMD_NFS /* NFS support */
119 119  
120 120 #define CONFIG_SYS_NO_FLASH
121   -#define CONFIG_HARD_I2C 1
122   -#define CONFIG_SYS_I2C_SPEED 100000
123   -#define CONFIG_SYS_I2C_SLAVE 1
124   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  121 +#define CONFIG_SYS_I2C
  122 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  123 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  124 +#define CONFIG_SYS_I2C_OMAP34XX
125 125  
126 126 /*
127 127 * TWL4030
include/configs/omap3_zoom2.h
... ... @@ -138,10 +138,10 @@
138 138 #undef CONFIG_CMD_NFS /* NFS support */
139 139  
140 140 #define CONFIG_SYS_NO_FLASH
141   -#define CONFIG_HARD_I2C 1
142   -#define CONFIG_SYS_I2C_SPEED 100000
143   -#define CONFIG_SYS_I2C_SLAVE 1
144   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
  141 +#define CONFIG_SYS_I2C
  142 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  143 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  144 +#define CONFIG_SYS_I2C_OMAP34XX
145 145  
146 146 /*
147 147 * TWL4030
include/configs/pcm051.h
... ... @@ -172,11 +172,10 @@
172 172 /* I2C Configuration */
173 173 #define CONFIG_I2C
174 174 #define CONFIG_CMD_I2C
175   -#define CONFIG_HARD_I2C
176   -#define CONFIG_SYS_I2C_SPEED 100000
177   -#define CONFIG_SYS_I2C_SLAVE 1
178   -#define CONFIG_I2C_MULTI_BUS
179   -#define CONFIG_DRIVER_OMAP24XX_I2C
  175 +#define CONFIG_SYS_I2C
  176 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  177 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  178 +#define CONFIG_SYS_I2C_OMAP24XX
180 179 #define CONFIG_CMD_EEPROM
181 180 #define CONFIG_ENV_EEPROM_IS_ON_I2C
182 181 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */
include/configs/siemens-am33x-common.h
... ... @@ -131,11 +131,10 @@
131 131 /* I2C Configuration */
132 132 #define CONFIG_I2C
133 133 #define CONFIG_CMD_I2C
134   -#define CONFIG_HARD_I2C
135   -#define CONFIG_SYS_I2C_SLAVE 1
136   -#define CONFIG_I2C_MULTI_BUS
137   -#define CONFIG_DRIVER_OMAP24XX_I2C
138   -
  134 +#define CONFIG_SYS_I2C
  135 +#define CONFIG_SYS_OMAP24_I2C_SPEED OMAP_I2C_STANDARD
  136 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  137 +#define CONFIG_SYS_I2C_OMAP24XX
139 138  
140 139 /* Defines for SPL */
141 140 #define CONFIG_SPL
include/configs/tam3517-common.h
... ... @@ -117,15 +117,14 @@
117 117 #undef CONFIG_CMD_IMLS
118 118  
119 119 #define CONFIG_SYS_NO_FLASH
120   -#define CONFIG_HARD_I2C
121   -#define CONFIG_SYS_I2C_SPEED 400000
122   -#define CONFIG_SYS_I2C_SLAVE 1
  120 +#define CONFIG_SYS_I2C
  121 +#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
  122 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  123 +#define CONFIG_SYS_I2C_OMAP34XX
123 124 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
124 125 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
125 126 #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
126   -#define CONFIG_DRIVER_OMAP34XX_I2C
127 127  
128   -
129 128 /*
130 129 * Board NAND Info.
131 130 */
... ... @@ -369,7 +368,7 @@
369 368  
370 369 #define TAM3517_READ_EEPROM(info, ret) \
371 370 do { \
372   - i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
  371 + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
373 372 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
374 373 (void *)info, sizeof(*info))) \
375 374 ret = 1; \
include/configs/ti_armv7_common.h
... ... @@ -59,12 +59,11 @@
59 59  
60 60 /* I2C IP block */
61 61 #define CONFIG_I2C
62   -#define CONFIG_HARD_I2C
63   -#define CONFIG_SYS_I2C_SPEED 100000
64   -#define CONFIG_SYS_I2C_SLAVE 1
65   -#define CONFIG_I2C_MULTI_BUS
66   -#define CONFIG_DRIVER_OMAP24XX_I2C
67 62 #define CONFIG_CMD_I2C
  63 +#define CONFIG_SYS_I2C
  64 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  65 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  66 +#define CONFIG_SYS_I2C_OMAP24XX
68 67  
69 68 /* MMC/SD IP block */
70 69 #define CONFIG_MMC
include/configs/tricorder.h
... ... @@ -98,11 +98,11 @@
98 98 #define CONFIG_DOS_PARTITION
99 99  
100 100 /* I2C */
101   -#define CONFIG_HARD_I2C
102   -#define CONFIG_SYS_I2C_SPEED 100000
103   -#define CONFIG_SYS_I2C_SLAVE 1
104   -#define CONFIG_DRIVER_OMAP34XX_I2C 1
105   -#define CONFIG_I2C_MULTI_BUS
  101 +#define CONFIG_SYS_I2C
  102 +#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
  103 +#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
  104 +#define CONFIG_SYS_I2C_OMAP34XX
  105 +
106 106  
107 107 /* EEPROM */
108 108 #define CONFIG_SYS_I2C_MULTI_EEPROMS