arm, arm-kirkwood: disable l2c before linux boot

The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de>

arm, arm-kirkwood: disable l2c before linux boot
The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled. Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de>
Michael Walle · Albert ARIBAUD
1 parent 81a6c009fe
Showing 4 changed files with 46 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/arm926ejs/cache.c
arch/arm/cpu/arm926ejs/cpu.c
arch/arm/cpu/arm926ejs/kirkwood/Makefile
arch/arm/cpu/arm926ejs/kirkwood/cache.c
@@ -68,4 +68,13 @@
 {
 }
 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
+
+/*
+ * Stub implementations for l2 cache operations
+ */
+void __l2_cache_disable(void)
+{
+}
+void l2_cache_disable(void)
+        __attribute__((weak, alias("__l2_cache_disable")));
@@ -50,6 +50,8 @@
 	/* turn off I/D-cache */
 	icache_disable();
 	dcache_disable();
+	l2_cache_disable();
+
 	/* flush I/D-cache */
 	cache_flush();
  
@@ -30,6 +30,7 @@
 COBJS-y	+= dram.o
 COBJS-y	+= mpp.o
 COBJS-y	+= timer.o
+COBJS-y	+= cache.o
  
 SRCS	:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
 OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
+/*
+ * Copyright (c) 2012 Michael Walle
+ * Michael Walle <michael@walle.cc>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+#include <common.h>
+#include <asm/arch/cpu.h>
+
+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
+
+void l2_cache_disable()
+{
+	u32 ctrl;
+
+	ctrl = readfr_extra_feature_reg();
+	ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
+	writefr_extra_feature_reg(ctrl);
+}
...	...	@@ -68,4 +68,13 @@
68	68	{
69	69	}
70	70	#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
	71	+
	72	+/*
	73	+ * Stub implementations for l2 cache operations
	74	+ */
	75	+void __l2_cache_disable(void)
	76	+{
	77	+}
	78	+void l2_cache_disable(void)
	79	+ __attribute__((weak, alias("__l2_cache_disable")));
...	...	@@ -50,6 +50,8 @@
50	50	/* turn off I/D-cache */
51	51	icache_disable();
52	52	dcache_disable();
	53	+ l2_cache_disable();
	54	+
53	55	/* flush I/D-cache */
54	56	cache_flush();
55	57
...	...	@@ -30,6 +30,7 @@
30	30	COBJS-y += dram.o
31	31	COBJS-y += mpp.o
32	32	COBJS-y += timer.o
	33	+COBJS-y += cache.o
33	34
34	35	SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
35	36	OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS-y))
	1	+/*
	2	+ * Copyright (c) 2012 Michael Walle
	3	+ * Michael Walle <michael@walle.cc>
	4	+ *
	5	+ * See file CREDITS for list of people who contributed to this
	6	+ * project.
	7	+ *
	8	+ * This program is free software; you can redistribute it and/or
	9	+ * modify it under the terms of the GNU General Public License as
	10	+ * published by the Free Software Foundation; either version 2 of
	11	+ * the License, or (at your option) any later version.
	12	+ *
	13	+ * This program is distributed in the hope that it will be useful,
	14	+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	+ * GNU General Public License for more details.
	17	+ *
	18	+ * You should have received a copy of the GNU General Public License
	19	+ * along with this program; if not, write to the Free Software
	20	+ * Foundation, Inc.
	21	+ */
	22	+#include <common.h>
	23	+#include <asm/arch/cpu.h>
	24	+
	25	+#define FEROCEON_EXTRA_FEATURE_L2C_EN (1<<22)
	26	+
	27	+void l2_cache_disable()
	28	+{
	29	+ u32 ctrl;
	30	+
	31	+ ctrl = readfr_extra_feature_reg();
	32	+ ctrl &= ~FEROCEON_EXTRA_FEATURE_L2C_EN;
	33	+ writefr_extra_feature_reg(ctrl);
	34	+}