ARM: pxa: Fix OneNAND SPL builds

The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>

ARM: pxa: Fix OneNAND SPL builds
The OneNAND SPL used on PXA is slightly obscure. Due to the OneNAND limitation, where we have only the first 1KiB of the OneNAND available upon power-up as a memory-mapped area, from which the CPU starts executing, we place only the most essential code into this first 1KiB . This code copies the rest of the SPL into SRAM and jumps to it. This code is stored in section .text.0 . The rest of the SPL is stored in section .text.1 . When running the OBJCOPY on the SPL, it will preserve only .text section, but the .text.0 and .text.1 are stripped away from the result, thus making the SPL binary empty. The patch adds additional -j parameters to the OBJCOPY for PXA during the SPL build, which will preserve the .text.0 and .text.1 sections. Moreover, this patch also adds missing functions into the .text.0 section, since otherwise the PXA270 with 1KiB-window OneNAND won't be able to boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com>
Marek Vasut
1 parent 7f673c99c2
Showing 2 changed files with 14 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/pxa/config.mk
board/vpac270/u-boot-spl.lds
@@ -14,4 +14,17 @@
 # ========================================================================
 PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
 PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
+
+#
+# !WARNING!
+# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from
+# really small OneNAND memories where the mmap'd window is only 1KiB big. The
+# .text.0 contains only the bare minimum needed to load the real SPL into SRAM.
+# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd,
+# they are not discarded.
+#
+
+#ifdef CONFIG_SPL_BUILD
+OBJCFLAGS += -j .text.0 -j .text.1
+#endif
@@ -20,6 +20,7 @@
 	.text.0	:
 	{
 		arch/arm/cpu/pxa/start.o		(.text*)
+		arch/arm/lib/built-in.o			(.text*)
 		board/vpac270/built-in.o		(.text*)
 		drivers/mtd/onenand/built-in.o		(.text*)
 	}
...	...	@@ -14,4 +14,17 @@
14	14	# ========================================================================
15	15	PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
16	16	PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
	17	+
	18	+#
	19	+# !WARNING!
	20	+# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from
	21	+# really small OneNAND memories where the mmap'd window is only 1KiB big. The
	22	+# .text.0 contains only the bare minimum needed to load the real SPL into SRAM.
	23	+# Add .text.0 and .text.1 into OBJFLAGS, so when the SPL is being objcopy'd,
	24	+# they are not discarded.
	25	+#
	26	+
	27	+#ifdef CONFIG_SPL_BUILD
	28	+OBJCFLAGS += -j .text.0 -j .text.1
	29	+#endif
...	...	@@ -20,6 +20,7 @@
20	20	.text.0 :
21	21	{
22	22	arch/arm/cpu/pxa/start.o (.text*)
	23	+ arch/arm/lib/built-in.o (.text*)
23	24	board/vpac270/built-in.o (.text*)
24	25	drivers/mtd/onenand/built-in.o (.text*)
25	26	}