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Commit 686203737e5370cb24cdda383fba6e6c5233159e

Authored by Peng Ma
Committed by York Sun
1 parent cf2250e787
Exists in smarc_8mq_lf_v2020.04 and in 11 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

armv7: fsl: remove sata support 

Remove the old implementation in order to enable DM for sata

Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

Showing 7 changed files with 0 additions and 92 deletions Side-by-side Diff

arch/arm/cpu/armv7/ls102xa/Makefile
Diff comments   View file @ 6862037
... ... @@ -10,7 +10,6 @@
10 10 obj-y += fsl_epu.o
11 11 obj-y += soc.o
12 12  
13   -obj-$(CONFIG_SCSI_AHCI_PLAT) += ls102xa_sata.o
14 13 obj-$(CONFIG_OF_LIBFDT) += fdt.o
15 14 obj-$(CONFIG_SYS_HAS_SERDES) += fsl_ls1_serdes.o ls102xa_serdes.o
16 15 obj-$(CONFIG_SPL) += spl.o
arch/arm/cpu/armv7/ls102xa/ls102xa_sata.c
View file @ 6862037
1   -// SPDX-License-Identifier: GPL-2.0+
2   -/*
3   - * Copyright 2015 Freescale Semiconductor, Inc.
4   - */
5   -#include <common.h>
6   -#include <asm/io.h>
7   -#include <asm/arch/immap_ls102xa.h>
8   -#include <ahci.h>
9   -#include <scsi.h>
10   -
11   -/* port register default value */
12   -#define AHCI_PORT_PHY_1_CFG 0xa003fffe
13   -#define AHCI_PORT_PHY_2_CFG 0x28183414
14   -#define AHCI_PORT_PHY_3_CFG 0x0e080e06
15   -#define AHCI_PORT_PHY_4_CFG 0x064a080b
16   -#define AHCI_PORT_PHY_5_CFG 0x2aa86470
17   -#define AHCI_PORT_TRANS_CFG 0x08000029
18   -
19   -#define SATA_ECC_REG_ADDR 0x20220520
20   -#define SATA_ECC_DISABLE 0x00020000
21   -
22   -int ls1021a_sata_init(void)
23   -{
24   - struct ccsr_ahci __iomem *ccsr_ahci = (void *)AHCI_BASE_ADDR;
25   -
26   -#ifdef CONFIG_SYS_FSL_ERRATUM_A008407
27   - out_le32((void *)SATA_ECC_REG_ADDR, SATA_ECC_DISABLE);
28   -#endif
29   -
30   - out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
31   - out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY_2_CFG);
32   - out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY_3_CFG);
33   - out_le32(&ccsr_ahci->pp4c, AHCI_PORT_PHY_4_CFG);
34   - out_le32(&ccsr_ahci->pp5c, AHCI_PORT_PHY_5_CFG);
35   - out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
36   -
37   - ahci_init((void __iomem *)AHCI_BASE_ADDR);
38   - scsi_scan(false);
39   -
40   - return 0;
41   -}
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h
Diff comments   View file @ 6862037
... ... @@ -389,33 +389,6 @@
389 389 u8 res_a00[0x1000-0xa00]; /* from 0xa00 to 0xfff */
390 390 };
391 391  
392   -
393   -
394   -/* AHCI (sata) register map */
395   -struct ccsr_ahci {
396   - u32 res1[0xa4/4]; /* 0x0 - 0xa4 */
397   - u32 pcfg; /* port config */
398   - u32 ppcfg; /* port phy1 config */
399   - u32 pp2c; /* port phy2 config */
400   - u32 pp3c; /* port phy3 config */
401   - u32 pp4c; /* port phy4 config */
402   - u32 pp5c; /* port phy5 config */
403   - u32 paxic; /* port AXI config */
404   - u32 axicc; /* AXI cache control */
405   - u32 axipc; /* AXI PROT control */
406   - u32 ptc; /* port Trans Config */
407   - u32 pts; /* port Trans Status */
408   - u32 plc; /* port link config */
409   - u32 plc1; /* port link config1 */
410   - u32 plc2; /* port link config2 */
411   - u32 pls; /* port link status */
412   - u32 pls1; /* port link status1 */
413   - u32 pcmdc; /* port CMD config */
414   - u32 ppcs; /* port phy control status */
415   - u32 pberr; /* port 0/1 BIST error */
416   - u32 cmds; /* port 0/1 CMD status error */
417   -};
418   -
419 392 #define RCPM_POWMGTCSR 0x130
420 393 #define RCPM_POWMGTCSR_SERDES_PW 0x80000000
421 394 #define RCPM_POWMGTCSR_LPM20_REQ 0x00100000
arch/arm/include/asm/arch-ls102xa/ls102xa_sata.h
View file @ 6862037
1   -/* SPDX-License-Identifier: GPL-2.0+ */
2   -/*
3   - * Copyright 2015 Freescale Semiconductor, Inc.
4   - */
5   -
6   -#ifndef __FSL_SATA_H_
7   -#define __FSL_SATA_H_
8   -
9   -int ls1021a_sata_init(void);
10   -#endif
board/freescale/ls1021aiot/ls1021aiot.c
Diff comments   View file @ 6862037
... ... @@ -11,7 +11,6 @@
11 11  
12 12 #include <asm/arch/ls102xa_devdis.h>
13 13 #include <asm/arch/ls102xa_soc.h>
14   -#include <asm/arch/ls102xa_sata.h>
15 14 #include <fsl_csu.h>
16 15 #include <fsl_esdhc.h>
17 16 #include <fsl_immap.h>
... ... @@ -206,10 +205,6 @@
206 205 #ifdef CONFIG_BOARD_LATE_INIT
207 206 int board_late_init(void)
208 207 {
209   -#ifdef CONFIG_SCSI_AHCI_PLAT
210   - ls1021a_sata_init();
211   -#endif
212   -
213 208 return 0;
214 209 }
215 210 #endif
board/freescale/ls1021aqds/ls1021aqds.c
Diff comments   View file @ 6862037
... ... @@ -11,7 +11,6 @@
11 11 #include <asm/arch/fsl_serdes.h>
12 12 #include <asm/arch/ls102xa_soc.h>
13 13 #include <asm/arch/ls102xa_devdis.h>
14   -#include <asm/arch/ls102xa_sata.h>
15 14 #include <hwconfig.h>
16 15 #include <mmc.h>
17 16 #include <fsl_csu.h>
... ... @@ -362,9 +361,6 @@
362 361 #ifdef CONFIG_BOARD_LATE_INIT
363 362 int board_late_init(void)
364 363 {
365   -#ifdef CONFIG_SCSI_AHCI_PLAT
366   - ls1021a_sata_init();
367   -#endif
368 364 #ifdef CONFIG_CHAIN_OF_TRUST
369 365 fsl_setenv_chain_of_trust();
370 366 #endif
board/freescale/ls1021atwr/ls1021atwr.c
Diff comments   View file @ 6862037
... ... @@ -11,7 +11,6 @@
11 11 #include <asm/arch/fsl_serdes.h>
12 12 #include <asm/arch/ls102xa_devdis.h>
13 13 #include <asm/arch/ls102xa_soc.h>
14   -#include <asm/arch/ls102xa_sata.h>
15 14 #include <hwconfig.h>
16 15 #include <mmc.h>
17 16 #include <fsl_csu.h>
... ... @@ -556,9 +555,6 @@
556 555 #ifdef CONFIG_BOARD_LATE_INIT
557 556 int board_late_init(void)
558 557 {
559   -#ifdef CONFIG_SCSI_AHCI_PLAT
560   - ls1021a_sata_init();
561   -#endif
562 558 #ifdef CONFIG_CHAIN_OF_TRUST
563 559 fsl_setenv_chain_of_trust();
564 560 #endif