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Commit 68cd4a4c9f4d7be8dc95796fb567f6b03faf9d97

Authored by Vishwanathrao Badarkhe, Manish
Committed by Tom Rini
1 parent cf32b53b97
Exists in master and in 53 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

arm: da830: moved pinmux configurations to the arch tree 

Move pinmux configurations for the DA830 SoCs from board file
to the arch tree so that it can be used for all da830 based devices.
Also, avoids duplicate pinmuxing in case of NAND.

Signed-off-by: Vishwanathrao Badarkhe, Manish <manishv.b@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Acked-by: Christian Riesch <christian.riesch@omicron.at>

Showing 5 changed files with 181 additions and 132 deletions Side-by-side Diff

arch/arm/cpu/arm926ejs/davinci/Makefile
Diff comments   View file @ 68cd4a4
... ... @@ -33,6 +33,7 @@
33 33 COBJS-$(CONFIG_SOC_DM365) += dm365.o
34 34 COBJS-$(CONFIG_SOC_DM644X) += dm644x.o
35 35 COBJS-$(CONFIG_SOC_DM646X) += dm646x.o
  36 +COBJS-$(CONFIG_SOC_DA830) += da830_pinmux.o
36 37 COBJS-$(CONFIG_SOC_DA850) += da850_pinmux.o
37 38 COBJS-$(CONFIG_DRIVER_TI_EMAC) += lxt972.o dp83848.o et1011c.o ksz8873.o
38 39  
arch/arm/cpu/arm926ejs/davinci/da830_pinmux.c
Diff comments   View file @ 68cd4a4
  1 +/*
  2 + * Pinmux configurations for the DA830 SoCs
  3 + *
  4 + * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
  5 + *
  6 + * This program is free software; you can redistribute it and/or modify
  7 + * it under the terms of the GNU General Public License as published by
  8 + * the Free Software Foundation; either version 2 of the License, or
  9 + * (at your option) any later version.
  10 + *
  11 + * This program is distributed in the hope that it will be useful,
  12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14 + * GNU General Public License for more details.
  15 + *
  16 + * You should have received a copy of the GNU General Public License
  17 + * along with this program; if not, write to the Free Software
  18 + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19 + */
  20 +
  21 +#include <common.h>
  22 +#include <asm/arch/davinci_misc.h>
  23 +#include <asm/arch/hardware.h>
  24 +#include <asm/arch/pinmux_defs.h>
  25 +
  26 +/* SPI0 pin muxer settings */
  27 +const struct pinmux_config spi0_pins_base[] = {
  28 + { pinmux(7), 1, 3 }, /* SPI0_SOMI */
  29 + { pinmux(7), 1, 4 }, /* SPI0_SIMO */
  30 + { pinmux(7), 1, 6 } /* SPI0_CLK */
  31 +};
  32 +
  33 +const struct pinmux_config spi0_pins_scs0[] = {
  34 + { pinmux(7), 1, 7 } /* SPI0_SCS[0] */
  35 +};
  36 +
  37 +const struct pinmux_config spi0_pins_ena[] = {
  38 + { pinmux(7), 1, 5 } /* SPI0_ENA */
  39 +};
  40 +
  41 +/* NAND pin muxer settings */
  42 +const struct pinmux_config emifa_pins_cs0[] = {
  43 + { pinmux(18), 1, 2 } /* EMA_CS[0] */
  44 +};
  45 +
  46 +const struct pinmux_config emifa_pins_cs2[] = {
  47 + { pinmux(18), 1, 3 } /* EMA_CS[2] */
  48 +};
  49 +
  50 +const struct pinmux_config emifa_pins_cs3[] = {
  51 + { pinmux(18), 1, 4 } /* EMA_CS[3] */
  52 +};
  53 +
  54 +#ifdef CONFIG_USE_NAND
  55 +const struct pinmux_config emifa_pins[] = {
  56 + { pinmux(13), 1, 6 }, /* EMA_D[0] */
  57 + { pinmux(13), 1, 7 }, /* EMA_D[1] */
  58 + { pinmux(14), 1, 0 }, /* EMA_D[2] */
  59 + { pinmux(14), 1, 1 }, /* EMA_D[3] */
  60 + { pinmux(14), 1, 2 }, /* EMA_D[4] */
  61 + { pinmux(14), 1, 3 }, /* EMA_D[5] */
  62 + { pinmux(14), 1, 4 }, /* EMA_D[6] */
  63 + { pinmux(14), 1, 5 }, /* EMA_D[7] */
  64 + { pinmux(14), 1, 6 }, /* EMA_D[8] */
  65 + { pinmux(14), 1, 7 }, /* EMA_D[9] */
  66 + { pinmux(15), 1, 0 }, /* EMA_D[10] */
  67 + { pinmux(15), 1, 1 }, /* EMA_D[11] */
  68 + { pinmux(15), 1, 2 }, /* EMA_D[12] */
  69 + { pinmux(15), 1, 3 }, /* EMA_D[13] */
  70 + { pinmux(15), 1, 4 }, /* EMA_D[14] */
  71 + { pinmux(15), 1, 5 }, /* EMA_D[15] */
  72 + { pinmux(15), 1, 6 }, /* EMA_A[0] */
  73 + { pinmux(15), 1, 7 }, /* EMA_A[1] */
  74 + { pinmux(16), 1, 0 }, /* EMA_A[2] */
  75 + { pinmux(16), 1, 1 }, /* EMA_A[3] */
  76 + { pinmux(16), 1, 2 }, /* EMA_A[4] */
  77 + { pinmux(16), 1, 3 }, /* EMA_A[5] */
  78 + { pinmux(16), 1, 4 }, /* EMA_A[6] */
  79 + { pinmux(16), 1, 5 }, /* EMA_A[7] */
  80 + { pinmux(16), 1, 6 }, /* EMA_A[8] */
  81 + { pinmux(16), 1, 7 }, /* EMA_A[9] */
  82 + { pinmux(17), 1, 0 }, /* EMA_A[10] */
  83 + { pinmux(17), 1, 1 }, /* EMA_A[11] */
  84 + { pinmux(17), 1, 2 }, /* EMA_A[12] */
  85 + { pinmux(17), 1, 3 }, /* EMA_BA[1] */
  86 + { pinmux(17), 1, 4 }, /* EMA_BA[0] */
  87 + { pinmux(17), 1, 5 }, /* EMA_CLK */
  88 + { pinmux(17), 1, 6 }, /* EMA_SDCKE */
  89 + { pinmux(17), 1, 7 }, /* EMA_CAS */
  90 + { pinmux(18), 1, 0 }, /* EMA_CAS */
  91 + { pinmux(18), 1, 1 }, /* EMA_WE */
  92 + { pinmux(18), 1, 5 }, /* EMA_OE */
  93 + { pinmux(18), 1, 6 }, /* EMA_WE_DQM[1] */
  94 + { pinmux(18), 1, 7 }, /* EMA_WE_DQM[0] */
  95 + { pinmux(10), 1, 0 } /* Tristate */
  96 +};
  97 +#endif
  98 +
  99 +/* EMAC PHY interface pins */
  100 +const struct pinmux_config emac_pins_rmii[] = {
  101 + { pinmux(10), 2, 1 }, /* RMII_TXD[0] */
  102 + { pinmux(10), 2, 2 }, /* RMII_TXD[1] */
  103 + { pinmux(10), 2, 3 }, /* RMII_TXEN */
  104 + { pinmux(10), 2, 4 }, /* RMII_CRS_DV */
  105 + { pinmux(10), 2, 5 }, /* RMII_RXD[0] */
  106 + { pinmux(10), 2, 6 }, /* RMII_RXD[1] */
  107 + { pinmux(10), 2, 7 } /* RMII_RXER */
  108 +};
  109 +
  110 +const struct pinmux_config emac_pins_mdio[] = {
  111 + { pinmux(11), 2, 0 }, /* MDIO_CLK */
  112 + { pinmux(11), 2, 1 } /* MDIO_D */
  113 +};
  114 +
  115 +const struct pinmux_config emac_pins_rmii_clk_source[] = {
  116 + { pinmux(9), 0, 5 } /* ref.clk from external source */
  117 +};
  118 +
  119 +/* UART2 pin muxer settings */
  120 +const struct pinmux_config uart2_pins_txrx[] = {
  121 + { pinmux(8), 2, 7 }, /* UART2_RXD */
  122 + { pinmux(9), 2, 0 } /* UART2_TXD */
  123 +};
  124 +
  125 +/* I2C0 pin muxer settings */
  126 +const struct pinmux_config i2c0_pins[] = {
  127 + { pinmux(8), 2, 3 }, /* I2C0_SDA */
  128 + { pinmux(8), 2, 4 } /* I2C0_SCL */
  129 +};
  130 +
  131 +/* USB0_DRVVBUS pin muxer settings */
  132 +const struct pinmux_config usb_pins[] = {
  133 + { pinmux(9), 1, 1 } /* USB0_DRVVBUS */
  134 +};
  135 +
  136 +#ifdef CONFIG_DAVINCI_MMC
  137 +/* MMC0 pin muxer settings */
  138 +const struct pinmux_config mmc0_pins_8bit[] = {
  139 + { pinmux(15), 2, 7 }, /* MMCSD0_CLK */
  140 + { pinmux(16), 2, 0 }, /* MMCSD0_CMD */
  141 + { pinmux(13), 2, 6 }, /* MMCSD0_DAT_0 */
  142 + { pinmux(13), 2, 7 }, /* MMCSD0_DAT_1 */
  143 + { pinmux(14), 2, 0 }, /* MMCSD0_DAT_2 */
  144 + { pinmux(14), 2, 1 }, /* MMCSD0_DAT_3 */
  145 + { pinmux(14), 2, 2 }, /* MMCSD0_DAT_4 */
  146 + { pinmux(14), 2, 3 }, /* MMCSD0_DAT_5 */
  147 + { pinmux(14), 2, 4 }, /* MMCSD0_DAT_6 */
  148 + { pinmux(14), 2, 5 } /* MMCSD0_DAT_7 */
  149 + /* DA830 supports 8-bit mode */
  150 +};
  151 +#endif
arch/arm/include/asm/arch-davinci/pinmux_defs.h
Diff comments   View file @ 68cd4a4
... ... @@ -22,8 +22,14 @@
22 22 #define __ASM_ARCH_PINMUX_DEFS_H
23 23  
24 24 #include <asm/arch/davinci_misc.h>
  25 +#include <config.h>
25 26  
26   -/* SPI pin muxer settings */
  27 +/* SPI0 pin muxer settings */
  28 +extern const struct pinmux_config spi0_pins_base[3];
  29 +extern const struct pinmux_config spi0_pins_scs0[1];
  30 +extern const struct pinmux_config spi0_pins_ena[1];
  31 +
  32 +/* SPI1 pin muxer settings */
27 33 extern const struct pinmux_config spi1_pins_base[3];
28 34 extern const struct pinmux_config spi1_pins_scs0[1];
29 35  
... ... @@ -35,6 +41,7 @@
35 41  
36 42 /* EMAC pin muxer settings*/
37 43 extern const struct pinmux_config emac_pins_rmii[7];
  44 +extern const struct pinmux_config emac_pins_rmii_clk_source[1];
38 45 extern const struct pinmux_config emac_pins_mii[15];
39 46 extern const struct pinmux_config emac_pins_mdio[2];
40 47  
41 48  
42 49  
... ... @@ -43,13 +50,19 @@
43 50 extern const struct pinmux_config i2c1_pins[2];
44 51  
45 52 /* EMIFA pin muxer settings */
  53 +extern const struct pinmux_config emifa_pins[40];
  54 +extern const struct pinmux_config emifa_pins_cs0[1];
46 55 extern const struct pinmux_config emifa_pins_cs2[1];
47 56 extern const struct pinmux_config emifa_pins_cs3[1];
48 57 extern const struct pinmux_config emifa_pins_cs4[1];
49 58 extern const struct pinmux_config emifa_pins_nand[12];
50 59 extern const struct pinmux_config emifa_pins_nor[43];
51 60  
  61 +/* USB pin mux setting */
  62 +extern const struct pinmux_config usb_pins[1];
  63 +
52 64 /* MMC pin muxer settings */
  65 +extern const struct pinmux_config mmc0_pins_8bit[10];
53 66 extern const struct pinmux_config mmc0_pins[6];
54 67  
55 68 #endif
board/davinci/da8xxevm/da830evm.c
Diff comments   View file @ 68cd4a4
... ... @@ -39,6 +39,7 @@
39 39 #include <asm/arch/hardware.h>
40 40 #include <asm/arch/emif_defs.h>
41 41 #include <asm/arch/emac_defs.h>
  42 +#include <asm/arch/pinmux_defs.h>
42 43 #include <asm/io.h>
43 44 #include <nand.h>
44 45 #include <asm/arch/nand_defs.h>
45 46  
46 47  
47 48  
48 49  
49 50  
... ... @@ -51,148 +52,30 @@
51 52  
52 53 DECLARE_GLOBAL_DATA_PTR;
53 54  
54   -/* SPI0 pin muxer settings */
55   -static const struct pinmux_config spi0_pins[] = {
56   - { pinmux(7), 1, 3 },
57   - { pinmux(7), 1, 4 },
58   - { pinmux(7), 1, 5 },
59   - { pinmux(7), 1, 6 },
60   - { pinmux(7), 1, 7 }
61   -};
62   -
63   -/* EMIF-A bus pins for 8-bit NAND support on CS3 */
64   -static const struct pinmux_config emifa_nand_pins[] = {
65   - { pinmux(13), 1, 6 },
66   - { pinmux(13), 1, 7 },
67   - { pinmux(14), 1, 0 },
68   - { pinmux(14), 1, 1 },
69   - { pinmux(14), 1, 2 },
70   - { pinmux(14), 1, 3 },
71   - { pinmux(14), 1, 4 },
72   - { pinmux(14), 1, 5 },
73   - { pinmux(15), 1, 7 },
74   - { pinmux(16), 1, 0 },
75   - { pinmux(18), 1, 1 },
76   - { pinmux(18), 1, 4 },
77   - { pinmux(18), 1, 5 },
78   -};
79   -
80   -/* EMAC PHY interface pins */
81   -static const struct pinmux_config emac_pins[] = {
82   - { pinmux(9), 0, 5 },
83   - { pinmux(10), 2, 1 },
84   - { pinmux(10), 2, 2 },
85   - { pinmux(10), 2, 3 },
86   - { pinmux(10), 2, 4 },
87   - { pinmux(10), 2, 5 },
88   - { pinmux(10), 2, 6 },
89   - { pinmux(10), 2, 7 },
90   - { pinmux(11), 2, 0 },
91   - { pinmux(11), 2, 1 },
92   -};
93   -
94   -/* UART pin muxer settings */
95   -static const struct pinmux_config uart_pins[] = {
96   - { pinmux(8), 2, 7 },
97   - { pinmux(9), 2, 0 }
98   -};
99   -
100   -/* I2C pin muxer settings */
101   -static const struct pinmux_config i2c_pins[] = {
102   - { pinmux(8), 2, 3 },
103   - { pinmux(8), 2, 4 }
104   -};
105   -
106   -#ifdef CONFIG_USE_NAND
107   -/* NAND pin muxer settings */
108   -const struct pinmux_config aemif_pins[] = {
109   - { pinmux(13), 1, 6 },
110   - { pinmux(13), 1, 7 },
111   - { pinmux(14), 1, 0 },
112   - { pinmux(14), 1, 1 },
113   - { pinmux(14), 1, 2 },
114   - { pinmux(14), 1, 3 },
115   - { pinmux(14), 1, 4 },
116   - { pinmux(14), 1, 5 },
117   - { pinmux(14), 1, 6 },
118   - { pinmux(14), 1, 7 },
119   - { pinmux(15), 1, 0 },
120   - { pinmux(15), 1, 1 },
121   - { pinmux(15), 1, 2 },
122   - { pinmux(15), 1, 3 },
123   - { pinmux(15), 1, 4 },
124   - { pinmux(15), 1, 5 },
125   - { pinmux(15), 1, 6 },
126   - { pinmux(15), 1, 7 },
127   - { pinmux(16), 1, 0 },
128   - { pinmux(16), 1, 1 },
129   - { pinmux(16), 1, 2 },
130   - { pinmux(16), 1, 3 },
131   - { pinmux(16), 1, 4 },
132   - { pinmux(16), 1, 5 },
133   - { pinmux(16), 1, 6 },
134   - { pinmux(16), 1, 7 },
135   - { pinmux(17), 1, 0 },
136   - { pinmux(17), 1, 1 },
137   - { pinmux(17), 1, 2 },
138   - { pinmux(17), 1, 3 },
139   - { pinmux(17), 1, 4 },
140   - { pinmux(17), 1, 5 },
141   - { pinmux(17), 1, 6 },
142   - { pinmux(17), 1, 7 },
143   - { pinmux(18), 1, 0 },
144   - { pinmux(18), 1, 1 },
145   - { pinmux(18), 1, 2 },
146   - { pinmux(18), 1, 3 },
147   - { pinmux(18), 1, 4 },
148   - { pinmux(18), 1, 5 },
149   - { pinmux(18), 1, 6 },
150   - { pinmux(18), 1, 7 },
151   - { pinmux(10), 1, 0 }
152   -};
153   -#endif
154   -
155   -
156   -/* USB0_DRVVBUS pin muxer settings */
157   -static const struct pinmux_config usb_pins[] = {
158   - { pinmux(9), 1, 1 }
159   -};
160   -
161   -#ifdef CONFIG_DAVINCI_MMC
162   -/* MMC0 pin muxer settings */
163   -const struct pinmux_config mmc0_pins[] = {
164   - { pinmux(15), 2, 7 }, /* MMCSD0_CLK */
165   - { pinmux(16), 2, 0 }, /* MMCSD0_CMD */
166   - { pinmux(13), 2, 6 }, /* MMCSD0_DAT_0 */
167   - { pinmux(13), 2, 7 }, /* MMCSD0_DAT_1 */
168   - { pinmux(14), 2, 0 }, /* MMCSD0_DAT_2 */
169   - { pinmux(14), 2, 1 }, /* MMCSD0_DAT_3 */
170   - { pinmux(14), 2, 2 }, /* MMCSD0_DAT_4 */
171   - { pinmux(14), 2, 3 }, /* MMCSD0_DAT_5 */
172   - { pinmux(14), 2, 4 }, /* MMCSD0_DAT_6 */
173   - { pinmux(14), 2, 5 }, /* MMCSD0_DAT_7 */
174   - /* DA830 supports 8-bit mode */
175   -};
176   -#endif
177   -
178 55 static const struct pinmux_resource pinmuxes[] = {
179 56 #ifdef CONFIG_SPI_FLASH
180   - PINMUX_ITEM(spi0_pins),
  57 + PINMUX_ITEM(spi0_pins_base),
  58 + PINMUX_ITEM(spi0_pins_scs0),
  59 + PINMUX_ITEM(spi0_pins_ena),
181 60 #endif
182   - PINMUX_ITEM(uart_pins),
183   - PINMUX_ITEM(i2c_pins),
  61 + PINMUX_ITEM(uart2_pins_txrx),
  62 + PINMUX_ITEM(i2c0_pins),
184 63 #ifdef CONFIG_USB_DA8XX
185 64 PINMUX_ITEM(usb_pins),
186 65 #endif
187 66 #ifdef CONFIG_USE_NAND
188   - PINMUX_ITEM(emifa_nand_pins),
189   - PINMUX_ITEM(aemif_pins),
  67 + PINMUX_ITEM(emifa_pins),
  68 + PINMUX_ITEM(emifa_pins_cs0),
  69 + PINMUX_ITEM(emifa_pins_cs2),
  70 + PINMUX_ITEM(emifa_pins_cs3),
190 71 #endif
191 72 #if defined(CONFIG_DRIVER_TI_EMAC)
192   - PINMUX_ITEM(emac_pins),
  73 + PINMUX_ITEM(emac_pins_rmii),
  74 + PINMUX_ITEM(emac_pins_mdio),
  75 + PINMUX_ITEM(emac_pins_rmii_clk_source),
193 76 #endif
194 77 #ifdef CONFIG_DAVINCI_MMC
195   - PINMUX_ITEM(mmc0_pins),
  78 + PINMUX_ITEM(mmc0_pins_8bit)
196 79 #endif
197 80 };
198 81  
include/configs/da830evm.h
Diff comments   View file @ 68cd4a4
... ... @@ -36,6 +36,7 @@
36 36 #define CONFIG_MACH_DAVINCI_DA830_EVM
37 37 #define CONFIG_ARM926EJS /* arm926ejs CPU core */
38 38 #define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
  39 +#define CONFIG_SOC_DA830 /* TI DA830 SoC */
39 40 #define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
40 41 #define CONFIG_SYS_OSCIN_FREQ 24000000
41 42 #define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE