Commit 68e4e76af55746a4330865f56476e58ce4140ca8
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ColdFire: Relocate vector table - mcf5445x
Newer ColdFire processors family boot from address 0 instead of 0xFFnn_nnnn. When the boot flash base chip select is set at new location instead of 0, an un-predictable error will occur if there is an vector being trigger and refer it to an invalid address or the vector table handler is not existed at address 0. Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
Showing 1 changed file with 9 additions and 0 deletions Side-by-side Diff
cpu/mcf5445x/cpu_init.c
| ... | ... | @@ -28,6 +28,7 @@ |
| 28 | 28 | #include <common.h> |
| 29 | 29 | #include <watchdog.h> |
| 30 | 30 | #include <asm/immap.h> |
| 31 | +#include <asm/processor.h> | |
| 31 | 32 | #include <asm/rtc.h> |
| 32 | 33 | |
| 33 | 34 | #if defined(CONFIG_CMD_NET) |
| ... | ... | @@ -104,6 +105,14 @@ |
| 104 | 105 | fbcs->cscr5 = CONFIG_SYS_CS5_CTRL; |
| 105 | 106 | fbcs->csmr5 = CONFIG_SYS_CS5_MASK; |
| 106 | 107 | #endif |
| 108 | + | |
| 109 | + /* | |
| 110 | + * now the flash base address is no longer at 0 (Newer ColdFire family | |
| 111 | + * boot at address 0 instead of 0xFFnn_nnnn). The vector table must | |
| 112 | + * also move to the new location. | |
| 113 | + */ | |
| 114 | + if (CONFIG_SYS_CS0_BASE != 0) | |
| 115 | + setvbr(CONFIG_SYS_CS0_BASE); | |
| 107 | 116 | |
| 108 | 117 | #ifdef CONFIG_FSL_I2C |
| 109 | 118 | gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA; |