Eric Lee / smarc-uboot

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Commit 6906df1ab8d64a4e21d38ea538d6cd383a089e1d

Authored by Siarhei Siamashka
Committed by Hans de Goede
1 parent 6c46c8e890
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

sunxi: axp221: Add ELDO[1-3] support 

And also add Kconfig option for selecting ELDO3 voltage. The reason
for having this option is that the Android kernel sets ELDO3 to
1.2V when powering up LCD in the case if 'lcd_if' configuration
variable is set to 6 (LCD_IF_EXT_DSI) in the FEX file. Most likely
to supply power for a SSD2828 chip.

However on the MSI Primo81 tablet, which is using this particular
'lcd_if = 6' setup for LCD, setting the ELDO3 voltage appears to
be unnecessary and it works regardless. Having no schematics of
this tablet, I can only guess that 1.2V is supplied to SSD2828
in some other way.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Showing 4 changed files with 51 additions and 0 deletions Side-by-side Diff

... ... @@ -189,6 +189,7 @@
189 189 power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT);
190 190 power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT);
191 191 power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT);
  192 + power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT);
192 193 #endif
193 194  
194 195 printf("DRAM:");
drivers/power/Kconfig
Diff comments   View file @ 6906df1
... ... @@ -63,4 +63,14 @@
63 63 Set the voltage (mV) to program the axp221 aldo3 at, set to 0 to
64 64 disable aldo3. This is typically connected to VCC-PLL and AVCC and
65 65 must be set to 3V.
  66 +
  67 +config AXP221_ELDO3_VOLT
  68 + int "axp221 eldo3 voltage"
  69 + depends on AXP221_POWER
  70 + default 0
  71 + ---help---
  72 + Set the voltage (mV) to program the axp221 eldo3 at, set to 0 to
  73 + disable eldo3. On some A31(s) tablets it might be used to supply
  74 + 1.2V for the SSD2828 chip (converter of parallel LCD interface
  75 + into MIPI DSI).
drivers/power/axp221.c
Diff comments   View file @ 6906df1
... ... @@ -302,6 +302,39 @@
302 302 AXP221_OUTPUT_CTRL3_ALDO3_EN);
303 303 }
304 304  
  305 +int axp221_set_eldo(int eldo_num, unsigned int mvolt)
  306 +{
  307 + int ret;
  308 + u8 cfg = axp221_mvolt_to_cfg(mvolt, 700, 3300, 100);
  309 + u8 addr, bits;
  310 +
  311 + switch (eldo_num) {
  312 + case 3:
  313 + addr = AXP221_ELDO3_CTRL;
  314 + bits = AXP221_OUTPUT_CTRL2_ELDO3_EN;
  315 + break;
  316 + case 2:
  317 + addr = AXP221_ELDO2_CTRL;
  318 + bits = AXP221_OUTPUT_CTRL2_ELDO2_EN;
  319 + break;
  320 + case 1:
  321 + addr = AXP221_ELDO1_CTRL;
  322 + bits = AXP221_OUTPUT_CTRL2_ELDO1_EN;
  323 + break;
  324 + default:
  325 + return -EINVAL;
  326 + }
  327 +
  328 + if (mvolt == 0)
  329 + return axp221_clrbits(AXP221_OUTPUT_CTRL2, bits);
  330 +
  331 + ret = pmic_bus_write(addr, cfg);
  332 + if (ret)
  333 + return ret;
  334 +
  335 + return axp221_setbits(AXP221_OUTPUT_CTRL2, bits);
  336 +}
  337 +
305 338 int axp221_init(void)
306 339 {
307 340 /* This cannot be 0 because it is used in SPL before BSS is ready */
... ... @@ -26,6 +26,9 @@
26 26 #define AXP221_OUTPUT_CTRL1_ALDO1_EN (1 << 6)
27 27 #define AXP221_OUTPUT_CTRL1_ALDO2_EN (1 << 7)
28 28 #define AXP221_OUTPUT_CTRL2 0x12
  29 +#define AXP221_OUTPUT_CTRL2_ELDO1_EN (1 << 0)
  30 +#define AXP221_OUTPUT_CTRL2_ELDO2_EN (1 << 1)
  31 +#define AXP221_OUTPUT_CTRL2_ELDO3_EN (1 << 2)
29 32 #define AXP221_OUTPUT_CTRL2_DLDO1_EN (1 << 3)
30 33 #define AXP221_OUTPUT_CTRL2_DLDO2_EN (1 << 4)
31 34 #define AXP221_OUTPUT_CTRL2_DLDO3_EN (1 << 5)
... ... @@ -37,6 +40,9 @@
37 40 #define AXP221_DLDO2_CTRL 0x16
38 41 #define AXP221_DLDO3_CTRL 0x17
39 42 #define AXP221_DLDO4_CTRL 0x18
  43 +#define AXP221_ELDO1_CTRL 0x19
  44 +#define AXP221_ELDO2_CTRL 0x1a
  45 +#define AXP221_ELDO3_CTRL 0x1b
40 46 #define AXP221_DCDC1_CTRL 0x21
41 47 #define AXP221_DCDC2_CTRL 0x22
42 48 #define AXP221_DCDC3_CTRL 0x23
... ... @@ -69,6 +75,7 @@
69 75 int axp221_set_aldo1(unsigned int mvolt);
70 76 int axp221_set_aldo2(unsigned int mvolt);
71 77 int axp221_set_aldo3(unsigned int mvolt);
  78 +int axp221_set_eldo(int eldo_num, unsigned int mvolt);
72 79 int axp221_init(void);
73 80 int axp221_get_sid(unsigned int *sid);
74 81 int axp_drivebus_enable(void);