ARM: arch-meson: add ethernet common init function

Introduce a generic common Ethernet Hardware init function common to all Amlogic GX SoCs with support for the Internal PHY enable for GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>

ARM: arch-meson: add ethernet common init function
Introduce a generic common Ethernet Hardware init function common to all Amlogic GX SoCs with support for the Internal PHY enable for GXL SoCs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Neil Armstrong · Tom Rini
1 parent 26e961c8cf
Showing 3 changed files with 79 additions and 1 deletions Side-by-side Diff
arch/arm/include/asm/arch-meson/eth.h
arch/arm/mach-meson/Makefile
arch/arm/mach-meson/eth.c
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __MESON_ETH_H__
+#define __MESON_ETH_H__
+
+#include <phy.h>
+
+enum {
+	/* Use GXL Internal RMII PHY */
+	MESON_GXL_USE_INTERNAL_RMII_PHY = 1,
+};
+
+/* Configure the Ethernet MAC with the requested interface mode
+ * with some optional flags.
+ */
+void meson_gx_eth_init(phy_interface_t mode, unsigned int flags);
+
+#endif /* __MESON_ETH_H__ */
@@ -4,5 +4,5 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
  
-obj-y += board.o sm.o
+obj-y += board.o sm.o eth.o
+/*
+ * Copyright (C) 2016 BayLibre, SAS
+ * Author: Neil Armstrong <narmstrong@baylibre.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <asm/io.h>
+#include <asm/arch/gxbb.h>
+#include <asm/arch/eth.h>
+#include <phy.h>
+
+/* Configure the Ethernet MAC with the requested interface mode
+ * with some optional flags.
+ */
+void meson_gx_eth_init(phy_interface_t mode, unsigned int flags)
+{
+	switch (mode) {
+	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_RGMII_ID:
+	case PHY_INTERFACE_MODE_RGMII_RXID:
+	case PHY_INTERFACE_MODE_RGMII_TXID:
+		/* Set RGMII mode */
+		setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
+			     GXBB_ETH_REG_0_TX_PHASE(1) |
+			     GXBB_ETH_REG_0_TX_RATIO(4) |
+			     GXBB_ETH_REG_0_PHY_CLK_EN |
+			     GXBB_ETH_REG_0_CLK_EN);
+		break;
+
+	case PHY_INTERFACE_MODE_RMII:
+		/* Set RMII mode */
+		out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK |
+					 GXBB_ETH_REG_0_CLK_EN);
+
+		/* Use GXL RMII Internal PHY */
+		if (IS_ENABLED(CONFIG_MESON_GXL) &&
+		    (flags & MESON_GXL_USE_INTERNAL_RMII_PHY)) {
+			writel(GXBB_ETH_REG_2, 0x10110181);
+			writel(GXBB_ETH_REG_3, 0xe40908ff);
+		}
+
+		break;
+
+	default:
+		printf("Invalid Ethernet interface mode\n");
+		return;
+	}
+
+	/* Enable power and clock gate */
+	setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
+	clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+}
	1	+/*
	2	+ * Copyright (C) 2016 BayLibre, SAS
	3	+ * Author: Neil Armstrong <narmstrong@baylibre.com>
	4	+ *
	5	+ * SPDX-License-Identifier: GPL-2.0+
	6	+ */
	7	+
	8	+#ifndef __MESON_ETH_H__
	9	+#define __MESON_ETH_H__
	10	+
	11	+#include <phy.h>
	12	+
	13	+enum {
	14	+ /* Use GXL Internal RMII PHY */
	15	+ MESON_GXL_USE_INTERNAL_RMII_PHY = 1,
	16	+};
	17	+
	18	+/* Configure the Ethernet MAC with the requested interface mode
	19	+ * with some optional flags.
	20	+ */
	21	+void meson_gx_eth_init(phy_interface_t mode, unsigned int flags);
	22	+
	23	+#endif /* __MESON_ETH_H__ */
...	...	@@ -4,5 +4,5 @@
4	4	# SPDX-License-Identifier: GPL-2.0+
5	5	#
6	6
7		-obj-y += board.o sm.o
	7	+obj-y += board.o sm.o eth.o