Commit 694c3bc107c61b900e3e0a09dd8f0346b1b7685f
Committed by
Stefano Babic
1 parent
0782bdf898
Exists in
v2017.01-smarct4x
and in
40 other branches
mx6slevk: Add SPI NOR flash support
mx6slevk has a m25p32 SPI NOR flash connected to ESCSPI port. Add support for it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Showing 3 changed files with 36 additions and 0 deletions Side-by-side Diff
arch/arm/include/asm/arch-mx6/mx6sl_pins.h
... | ... | @@ -10,6 +10,10 @@ |
10 | 10 | #include <asm/imx-common/iomux-v3.h> |
11 | 11 | |
12 | 12 | enum { |
13 | + MX6_PAD_ECSPI1_MISO__ECSPI_MISO = IOMUX_PAD(0x0358, 0x0068, 0, 0x0684, 0, 0), | |
14 | + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI = IOMUX_PAD(0x035C, 0x006C, 0, 0x0688, 0, 0), | |
15 | + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK = IOMUX_PAD(0x0360, 0x0070, 0, 0x067C, 0, 0), | |
16 | + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 = IOMUX_PAD(0x0364, 0x0074, 5, 0x0000, 0, 0), | |
13 | 17 | MX6_PAD_SD2_CLK__USDHC2_CLK = IOMUX_PAD(0x055C, 0x0254, 0, 0x0000, 0, 0), |
14 | 18 | MX6_PAD_SD2_CMD__USDHC2_CMD = IOMUX_PAD(0x0560, 0x0258, 0, 0x0000, 0, 0), |
15 | 19 | MX6_PAD_SD2_DAT0__USDHC2_DAT0 = IOMUX_PAD(0x0564, 0x025C, 0, 0x0000, 0, 0), |
board/freescale/mx6slevk/mx6slevk.c
... | ... | @@ -34,6 +34,9 @@ |
34 | 34 | PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | \ |
35 | 35 | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
36 | 36 | |
37 | +#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ | |
38 | + PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) | |
39 | + | |
37 | 40 | #define ETH_PHY_RESET IMX_GPIO_NR(4, 21) |
38 | 41 | |
39 | 42 | int dram_init(void) |
... | ... | @@ -71,6 +74,20 @@ |
71 | 74 | MX6_PAD_FEC_TX_CLK__GPIO_4_21 | MUX_PAD_CTRL(NO_PAD_CTRL), |
72 | 75 | }; |
73 | 76 | |
77 | +#ifdef CONFIG_MXC_SPI | |
78 | +static iomux_v3_cfg_t ecspi1_pads[] = { | |
79 | + MX6_PAD_ECSPI1_MISO__ECSPI_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), | |
80 | + MX6_PAD_ECSPI1_MOSI__ECSPI_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), | |
81 | + MX6_PAD_ECSPI1_SCLK__ECSPI_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), | |
82 | + MX6_PAD_ECSPI1_SS0__GPIO4_IO11 | MUX_PAD_CTRL(NO_PAD_CTRL), | |
83 | +}; | |
84 | + | |
85 | +static void setup_spi(void) | |
86 | +{ | |
87 | + imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); | |
88 | +} | |
89 | +#endif | |
90 | + | |
74 | 91 | static void setup_iomux_uart(void) |
75 | 92 | { |
76 | 93 | imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); |
... | ... | @@ -132,6 +149,9 @@ |
132 | 149 | int board_early_init_f(void) |
133 | 150 | { |
134 | 151 | setup_iomux_uart(); |
152 | +#ifdef CONFIG_MXC_SPI | |
153 | + setup_spi(); | |
154 | +#endif | |
135 | 155 | return 0; |
136 | 156 | } |
137 | 157 |
include/configs/mx6slevk.h
... | ... | @@ -10,6 +10,7 @@ |
10 | 10 | #define __CONFIG_H |
11 | 11 | |
12 | 12 | #include <asm/arch/imx-regs.h> |
13 | +#include <asm/imx-common/gpio.h> | |
13 | 14 | #include <linux/sizes.h> |
14 | 15 | #include "mx6_common.h" |
15 | 16 | |
... | ... | @@ -194,6 +195,17 @@ |
194 | 195 | |
195 | 196 | #ifndef CONFIG_SYS_DCACHE_OFF |
196 | 197 | #define CONFIG_CMD_CACHE |
198 | +#endif | |
199 | + | |
200 | +#define CONFIG_CMD_SF | |
201 | +#ifdef CONFIG_CMD_SF | |
202 | +#define CONFIG_SPI_FLASH | |
203 | +#define CONFIG_SPI_FLASH_STMICRO | |
204 | +#define CONFIG_MXC_SPI | |
205 | +#define CONFIG_SF_DEFAULT_BUS 0 | |
206 | +#define CONFIG_SF_DEFAULT_CS (0 | (IMX_GPIO_NR(4, 11) << 8)) | |
207 | +#define CONFIG_SF_DEFAULT_SPEED 20000000 | |
208 | +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 | |
197 | 209 | #endif |
198 | 210 | |
199 | 211 | #endif /* __CONFIG_H */ |