Commit 69a3858b9eee359b43986c8ca335881b0f3bb8c9
1 parent
e2c9ced3c1
Exists in
v2015.07-smarct4x
and in
3 other branches
ARM: k2hk: Fix reading RSTYPE register
KS2_RSTCTRL_RSTYPE is defined as KS2_PLL_CNTRL_BASE + offset. But ddr driver reads KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE for detecting reset type, which gives a wrong reset type. Fixing it by just reading KS2_RSTCTRL_RSTYPE. Reviewed-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Showing 1 changed file with 1 additions and 1 deletions Side-by-side Diff
board/ti/ks2_evm/ddr3_k2hk.c
| ... | ... | @@ -30,7 +30,7 @@ |
| 30 | 30 | printf("Detected SO-DIMM [%s]\n", spd_cb.dimm_name); |
| 31 | 31 | |
| 32 | 32 | if ((cpu_revision() > 1) || |
| 33 | - (__raw_readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1)) { | |
| 33 | + (__raw_readl(KS2_RSTCTRL_RSTYPE) & 0x1)) { | |
| 34 | 34 | printf("DDR3 speed %d\n", spd_cb.ddrspdclock); |
| 35 | 35 | if (spd_cb.ddrspdclock == 1600) |
| 36 | 36 | init_pll(&ddr3a_400); |