Eric Lee / smarc-uboot

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Commit 69dc0186475f8968da67e9eb54d03ee258402a38

Authored by Ye Li
1 parent 2a8d4cfb0e
Exists in smarc_8mq_lf_v2020.04 and in 4 other branches pitx_8mp_lf_v2020.04, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mp_lf_v2020.04

TEE-502 imx8m: Refactor the OPTEE memory removal 

Current codes assume the OPTEE address is at the end of first DRAM bank.
Adjust the process to allow OPTEE in the middle of first bank.

When OPTEE memory is removed from first bank, it may split the first bank
to two banks, so increase the CONFIG_NR_DRAM_BANKS and adjust the MMU
table for the split case.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Tested-by: Silvano di Ninno <silvano.dininno@nxp.com>
(cherry picked from commit e2a3b770ef847354ebe85c363608f27381d48adc)

Showing 13 changed files with 123 additions and 88 deletions Side-by-side Diff

arch/arm/mach-imx/imx8m/soc.c
Diff comments   View file @ 69dc018
... ... @@ -154,6 +154,11 @@
154 154 #endif
155 155 #endif
156 156 }, {
  157 + /* empty entrie to split table entry 5
  158 + * if needed when TEEs are used
  159 + */
  160 + 0,
  161 + }, {
157 162 /* List terminator */
158 163 0,
159 164 }
160 165  
161 166  
... ... @@ -163,16 +168,119 @@
163 168  
164 169 void enable_caches(void)
165 170 {
166   - /*
167   - * If OPTEE runs, remove OPTEE memory from MMU table to
168   - * avoid speculative prefetch. OPTEE runs at the top of
169   - * the first memory bank
170   - */
171   - if (rom_pointer[1])
172   - imx8m_mem_map[5].size -= rom_pointer[1];
  171 + /* If OPTEE runs, remove OPTEE memory from MMU table to avoid speculative prefetch */
  172 + if (rom_pointer[1]) {
173 173  
  174 + /* TEE are loaded, So the ddr bank structures
  175 + * have been modified update mmu table accordingly
  176 + */
  177 + int i = 0;
  178 + /* please make sure that entry initial value matches
  179 + * imx8m_mem_map for DRAM1
  180 + */
  181 + int entry = 5;
  182 + u64 attrs = imx8m_mem_map[entry].attrs;
  183 + while (i < CONFIG_NR_DRAM_BANKS && entry < 8) {
  184 + if (gd->bd->bi_dram[i].start == 0)
  185 + break;
  186 + imx8m_mem_map[entry].phys = gd->bd->bi_dram[i].start;
  187 + imx8m_mem_map[entry].virt = gd->bd->bi_dram[i].start;
  188 + imx8m_mem_map[entry].size = gd->bd->bi_dram[i].size;
  189 + imx8m_mem_map[entry].attrs = attrs;
  190 + debug("Added memory mapping (%d): %llx %llx\n", entry,
  191 + imx8m_mem_map[entry].phys, imx8m_mem_map[entry].size);
  192 + i++;entry++;
  193 + }
  194 + }
  195 +
174 196 icache_enable();
175 197 dcache_enable();
  198 +}
  199 +
  200 +__weak int board_phys_sdram_size(phys_size_t *size)
  201 +{
  202 + if (!size)
  203 + return -EINVAL;
  204 +
  205 + *size = PHYS_SDRAM_SIZE;
  206 + return 0;
  207 +}
  208 +
  209 +int dram_init(void)
  210 +{
  211 + phys_size_t sdram_size;
  212 + int ret;
  213 +
  214 + ret = board_phys_sdram_size(&sdram_size);
  215 + if (ret)
  216 + return ret;
  217 +
  218 + /* rom_pointer[1] contains the size of TEE occupies */
  219 + if (rom_pointer[1])
  220 + gd->ram_size = sdram_size - rom_pointer[1];
  221 + else
  222 + gd->ram_size = sdram_size;
  223 +
  224 +#ifdef PHYS_SDRAM_2_SIZE
  225 + gd->ram_size += PHYS_SDRAM_2_SIZE;
  226 +#endif
  227 +
  228 + return 0;
  229 +}
  230 +
  231 +int dram_init_banksize(void)
  232 +{
  233 + int bank = 0;
  234 + int ret;
  235 + phys_size_t sdram_size;
  236 +
  237 + ret = board_phys_sdram_size(&sdram_size);
  238 + if (ret)
  239 + return ret;
  240 +
  241 + gd->bd->bi_dram[bank].start = PHYS_SDRAM;
  242 + if (rom_pointer[1]) {
  243 + phys_addr_t optee_start = (phys_addr_t)rom_pointer[0];
  244 + phys_size_t optee_size = (size_t)rom_pointer[1];
  245 +
  246 + gd->bd->bi_dram[bank].size = optee_start -gd->bd->bi_dram[bank].start;
  247 + if ((optee_start + optee_size) < (PHYS_SDRAM + sdram_size)) {
  248 + if ( ++bank >= CONFIG_NR_DRAM_BANKS) {
  249 + puts("CONFIG_NR_DRAM_BANKS is not enough\n");
  250 + return -1;
  251 + }
  252 +
  253 + gd->bd->bi_dram[bank].start = optee_start + optee_size;
  254 + gd->bd->bi_dram[bank].size = PHYS_SDRAM +
  255 + sdram_size - gd->bd->bi_dram[bank].start;
  256 + }
  257 + } else {
  258 + gd->bd->bi_dram[bank].size = sdram_size;
  259 + }
  260 +
  261 +#ifdef PHYS_SDRAM_2_SIZE
  262 + if ( ++bank >= CONFIG_NR_DRAM_BANKS) {
  263 + puts("CONFIG_NR_DRAM_BANKS is not enough for SDRAM_2\n");
  264 + return -1;
  265 + }
  266 + gd->bd->bi_dram[bank].start = PHYS_SDRAM_2;
  267 + gd->bd->bi_dram[bank].size = PHYS_SDRAM_2_SIZE;
  268 +#endif
  269 +
  270 + return 0;
  271 +}
  272 +
  273 +phys_size_t get_effective_memsize(void)
  274 +{
  275 + /* return the first bank as effective memory */
  276 + if (rom_pointer[1])
  277 + return ((phys_addr_t)rom_pointer[0] - PHYS_SDRAM);
  278 +
  279 +#ifdef PHYS_SDRAM_2_SIZE
  280 + return gd->ram_size - PHYS_SDRAM_2_SIZE;
  281 +#else
  282 + return gd->ram_size;
  283 +#endif
176 284 }
177 285  
178 286 static u32 get_cpu_variant_type(u32 type)
board/freescale/imx8mm_evk/imx8mm_evk.c
Diff comments   View file @ 69dc018
... ... @@ -84,17 +84,6 @@
84 84 return 0;
85 85 }
86 86  
87   -int dram_init(void)
88   -{
89   - /* rom_pointer[1] contains the size of TEE occupies */
90   - if (rom_pointer[1])
91   - gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
92   - else
93   - gd->ram_size = PHYS_SDRAM_SIZE;
94   -
95   - return 0;
96   -}
97   -
98 87 #if IS_ENABLED(CONFIG_FEC_MXC)
99 88 static int setup_fec(void)
100 89 {
board/freescale/imx8mn_evk/imx8mn_evk.c
Diff comments   View file @ 69dc018
... ... @@ -84,17 +84,6 @@
84 84 return 0;
85 85 }
86 86  
87   -int dram_init(void)
88   -{
89   - /* rom_pointer[1] contains the size of TEE occupies */
90   - if (rom_pointer[1])
91   - gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
92   - else
93   - gd->ram_size = PHYS_SDRAM_SIZE;
94   -
95   - return 0;
96   -}
97   -
98 87 #if IS_ENABLED(CONFIG_FEC_MXC)
99 88 static int setup_fec(void)
100 89 {
board/freescale/imx8mp_evk/imx8mp_evk.c
Diff comments   View file @ 69dc018
... ... @@ -462,46 +462,6 @@
462 462 #endif
463 463 #endif
464 464  
465   -int dram_init(void)
466   -{
467   - /* rom_pointer[1] contains the size of TEE occupies */
468   - if (rom_pointer[1])
469   - gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
470   - else
471   - gd->ram_size = PHYS_SDRAM_SIZE;
472   -
473   -#if CONFIG_NR_DRAM_BANKS > 1
474   - gd->ram_size += PHYS_SDRAM_2_SIZE;
475   -#endif
476   -
477   - return 0;
478   -}
479   -
480   -int dram_init_banksize(void)
481   -{
482   - gd->bd->bi_dram[0].start = PHYS_SDRAM;
483   - if (rom_pointer[1])
484   -
485   - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE - rom_pointer[1];
486   - else
487   - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
488   -
489   -#if CONFIG_NR_DRAM_BANKS > 1
490   - gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
491   - gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
492   -#endif
493   -
494   - return 0;
495   -}
496   -
497   -phys_size_t get_effective_memsize(void)
498   -{
499   - if (rom_pointer[1])
500   - return (PHYS_SDRAM_SIZE - rom_pointer[1]);
501   - else
502   - return PHYS_SDRAM_SIZE;
503   -}
504   -
505 465 int board_init(void)
506 466 {
507 467 #ifdef CONFIG_USB_TCPC
board/freescale/imx8mq_evk/imx8mq_evk.c
Diff comments   View file @ 69dc018
... ... @@ -64,17 +64,6 @@
64 64 }
65 65 #endif
66 66  
67   -int dram_init(void)
68   -{
69   - /* rom_pointer[1] contains the size of TEE occupies */
70   - if (rom_pointer[1])
71   - gd->ram_size = PHYS_SDRAM_SIZE - rom_pointer[1];
72   - else
73   - gd->ram_size = PHYS_SDRAM_SIZE;
74   -
75   - return 0;
76   -}
77   -
78 67 #ifdef CONFIG_FEC_MXC
79 68 static int setup_fec(void)
80 69 {
configs/imx8mm_ddr4_evk_defconfig
Diff comments   View file @ 69dc018
... ... @@ -33,7 +33,7 @@
33 33 CONFIG_SPL_SEPARATE_BSS=y
34 34 CONFIG_SPL_I2C_SUPPORT=y
35 35 CONFIG_SPL_POWER_SUPPORT=y
36   -CONFIG_NR_DRAM_BANKS=1
  36 +CONFIG_NR_DRAM_BANKS=2
37 37 CONFIG_HUSH_PARSER=y
38 38 CONFIG_SYS_PROMPT="u-boot=> "
39 39 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mm_ddr4_evk_nand_defconfig
Diff comments   View file @ 69dc018
... ... @@ -32,7 +32,7 @@
32 32 CONFIG_SPL_SEPARATE_BSS=y
33 33 CONFIG_SPL_I2C_SUPPORT=y
34 34 CONFIG_SPL_POWER_SUPPORT=y
35   -CONFIG_NR_DRAM_BANKS=1
  35 +CONFIG_NR_DRAM_BANKS=2
36 36 CONFIG_HUSH_PARSER=y
37 37 CONFIG_SYS_PROMPT="u-boot=> "
38 38 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mm_evk_defconfig
Diff comments   View file @ 69dc018
... ... @@ -33,7 +33,7 @@
33 33 CONFIG_SPL_SEPARATE_BSS=y
34 34 CONFIG_SPL_I2C_SUPPORT=y
35 35 CONFIG_SPL_POWER_SUPPORT=y
36   -CONFIG_NR_DRAM_BANKS=1
  36 +CONFIG_NR_DRAM_BANKS=2
37 37 CONFIG_HUSH_PARSER=y
38 38 CONFIG_SYS_PROMPT="u-boot=> "
39 39 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mm_evk_fspi_defconfig
Diff comments   View file @ 69dc018
... ... @@ -33,7 +33,7 @@
33 33 CONFIG_SPL_SEPARATE_BSS=y
34 34 CONFIG_SPL_I2C_SUPPORT=y
35 35 CONFIG_SPL_POWER_SUPPORT=y
36   -CONFIG_NR_DRAM_BANKS=1
  36 +CONFIG_NR_DRAM_BANKS=2
37 37 CONFIG_HUSH_PARSER=y
38 38 CONFIG_SYS_PROMPT="u-boot=> "
39 39 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mn_ddr4_evk_defconfig
Diff comments   View file @ 69dc018
... ... @@ -36,7 +36,7 @@
36 36 CONFIG_SPL_SEPARATE_BSS=y
37 37 CONFIG_SPL_I2C_SUPPORT=y
38 38 CONFIG_SPL_POWER_SUPPORT=y
39   -CONFIG_NR_DRAM_BANKS=1
  39 +CONFIG_NR_DRAM_BANKS=2
40 40 CONFIG_HUSH_PARSER=y
41 41 CONFIG_SYS_PROMPT="u-boot=> "
42 42 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mn_evk_defconfig
Diff comments   View file @ 69dc018
... ... @@ -36,7 +36,7 @@
36 36 CONFIG_SPL_SEPARATE_BSS=y
37 37 CONFIG_SPL_I2C_SUPPORT=y
38 38 CONFIG_SPL_POWER_SUPPORT=y
39   -CONFIG_NR_DRAM_BANKS=1
  39 +CONFIG_NR_DRAM_BANKS=2
40 40 CONFIG_HUSH_PARSER=y
41 41 CONFIG_SYS_PROMPT="u-boot=> "
42 42 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mp_evk_defconfig
Diff comments   View file @ 69dc018
... ... @@ -36,7 +36,7 @@
36 36 CONFIG_SPL_SEPARATE_BSS=y
37 37 CONFIG_SPL_I2C_SUPPORT=y
38 38 CONFIG_SPL_POWER_SUPPORT=y
39   -CONFIG_NR_DRAM_BANKS=2
  39 +CONFIG_NR_DRAM_BANKS=3
40 40 CONFIG_HUSH_PARSER=y
41 41 CONFIG_SYS_PROMPT="u-boot=> "
42 42 # CONFIG_CMD_EXPORTENV is not set
configs/imx8mp_evk_inline_ecc_defconfig
Diff comments   View file @ 69dc018
... ... @@ -36,7 +36,7 @@
36 36 CONFIG_SPL_SEPARATE_BSS=y
37 37 CONFIG_SPL_I2C_SUPPORT=y
38 38 CONFIG_SPL_POWER_SUPPORT=y
39   -CONFIG_NR_DRAM_BANKS=2
  39 +CONFIG_NR_DRAM_BANKS=3
40 40 CONFIG_HUSH_PARSER=y
41 41 CONFIG_SYS_PROMPT="u-boot=> "
42 42 # CONFIG_CMD_EXPORTENV is not set