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Commit 6ac1c9033a15eee0706a02a649e4180634c2d4d7

Authored by Anatolij Gustschin
Committed by Albert ARIBAUD
1 parent e99be76907
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

imx: imx31_phycore.h: fix checkpatch warnings 

Cleanup board config file and fix issues reported by
checkpatch.pl script.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>

Showing 1 changed file with 84 additions and 69 deletions Side-by-side Diff

include/configs/imx31_phycore.h
Diff comments   View file @ 6ac1c90
... ... @@ -30,26 +30,19 @@
30 30  
31 31 #include <asm/arch/imx-regs.h>
32 32  
33   - /* High Level Configuration Options */
34   -#define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */
35   -#define CONFIG_MX31 1 /* in a mx31 */
  33 +/* High Level Configuration Options */
  34 +#define CONFIG_ARM1136 /* This is an arm1136 CPU core */
  35 +#define CONFIG_MX31 /* in a mx31 */
36 36 #define CONFIG_MX31_HCLK_FREQ 26000000
37 37 #define CONFIG_MX31_CLK32 32000
38 38  
39 39 #define CONFIG_DISPLAY_CPUINFO
40 40 #define CONFIG_DISPLAY_BOARDINFO
41 41  
42   -/* Temporarily disabled */
43   -#if 0
44   -#define CONFIG_OF_LIBFDT 1
45   -#define CONFIG_FIT 1
46   -#define CONFIG_FIT_VERBOSE 1
47   -#endif
  42 +#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
  43 +#define CONFIG_SETUP_MEMORY_TAGS
  44 +#define CONFIG_INITRD_TAG
48 45  
49   -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
50   -#define CONFIG_SETUP_MEMORY_TAGS 1
51   -#define CONFIG_INITRD_TAG 1
52   -
53 46 /*
54 47 * Size of malloc() pool
55 48 */
56 49  
... ... @@ -59,14 +52,14 @@
59 52 * Hardware drivers
60 53 */
61 54  
62   -#define CONFIG_HARD_I2C 1
63   -#define CONFIG_I2C_MXC 1
64   -#define CONFIG_SYS_I2C_MX31_PORT2 1
  55 +#define CONFIG_HARD_I2C
  56 +#define CONFIG_I2C_MXC
  57 +#define CONFIG_SYS_I2C_MX31_PORT2
65 58 #define CONFIG_SYS_I2C_SPEED 100000
66 59 #define CONFIG_SYS_I2C_SLAVE 0xfe
67 60  
68   -#define CONFIG_MXC_UART 1
69   -#define CONFIG_SYS_MX31_UART1 1
  61 +#define CONFIG_MXC_UART
  62 +#define CONFIG_SYS_MX31_UART1
70 63  
71 64 /* allow to overwrite serial and ethaddr */
72 65 #define CONFIG_ENV_OVERWRITE
73 66  
74 67  
75 68  
76 69  
77 70  
... ... @@ -86,42 +79,60 @@
86 79  
87 80 #define CONFIG_BOOTDELAY 3
88 81  
89   -#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro,1536k(kernel),-(root)"
  82 +#define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:128k(uboot)ro," \
  83 + "1536k(kernel),-(root)"
90 84  
91 85 #define CONFIG_NETMASK 255.255.255.0
92 86 #define CONFIG_IPADDR 192.168.23.168
93 87 #define CONFIG_SERVERIP 192.168.23.2
94 88  
95   -#define CONFIG_EXTRA_ENV_SETTINGS \
96   - "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
97   - "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
98   - "bootargs_flash=setenv bootargs $(bootargs) root=/dev/mtdblock2 rootfstype=jffs2" \
99   - "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)" \
100   - "bootcmd=run bootcmd_net\0" \
101   - "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 $(uimage); bootm\0" \
102   - "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash; bootm 0x80000000\0" \
103   - "unlock=yes\0" \
104   - "mtdparts=" MTDPARTS_DEFAULT "\0" \
105   - "prg_uboot=tftpboot 0x80000000 $(uboot); protect off 0xa0000000 +0x20000; erase 0xa0000000 +0x20000; cp.b 0x80000000 0xa0000000 $(filesize)\0" \
106   - "prg_kernel=tftpboot 0x80000000 $(uimage); erase 0xa0040000 +0x180000; cp.b 0x80000000 0xa0040000 $(filesize)\0" \
107   - "prg_jffs2=tftpboot 0x80000000 $(jffs2); erase 0xa01c0000 0xa1ffffff; cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
108   - "videomode=video=ctfb:x:240,y:320,depth:16,mode:0,pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1,sync:1241513985,vmode:0\0"
  89 +#define CONFIG_EXTRA_ENV_SETTINGS \
  90 + "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \
  91 + "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs " \
  92 + "ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \
  93 + "bootargs_flash=setenv bootargs $(bootargs) " \
  94 + "root=/dev/mtdblock2 rootfstype=jffs2\0" \
  95 + "bootargs_mtd=setenv bootargs $(bootargs) $(mtdparts)\0" \
  96 + "bootcmd=run bootcmd_net\0" \
  97 + "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs;" \
  98 + "tftpboot 0x80000000 $(uimage);bootm\0" \
  99 + "bootcmd_flash=run bootargs_base bootargs_mtd bootargs_flash;" \
  100 + "bootm 0x80000000\0" \
  101 + "unlock=yes\0" \
  102 + "mtdparts=" MTDPARTS_DEFAULT "\0" \
  103 + "prg_uboot=tftpboot 0x80000000 $(uboot);" \
  104 + "protect off 0xa0000000 +0x20000;" \
  105 + "erase 0xa0000000 +0x20000;" \
  106 + "cp.b 0x80000000 0xa0000000 $(filesize)\0" \
  107 + "prg_kernel=tftpboot 0x80000000 $(uimage);" \
  108 + "erase 0xa0040000 +0x180000;" \
  109 + "cp.b 0x80000000 0xa0040000 $(filesize)\0" \
  110 + "prg_jffs2=tftpboot 0x80000000 $(jffs2);" \
  111 + "erase 0xa01c0000 0xa1ffffff;" \
  112 + "cp.b 0x80000000 0xa01c0000 $(filesize)\0" \
  113 + "videomode=video=ctfb:x:240,y:320,depth:16,mode:0," \
  114 + "pclk:185925,le:9,ri:17,up:7,lo:10,hs:1,vs:1," \
  115 + "sync:1241513985,vmode:0\0"
109 116  
110 117  
111   -#define CONFIG_SMC911X 1
  118 +#define CONFIG_SMC911X
112 119 #define CONFIG_SMC911X_BASE 0xa8000000
113   -#define CONFIG_SMC911X_32_BIT 1
  120 +#define CONFIG_SMC911X_32_BIT
114 121  
115 122 /*
116 123 * Miscellaneous configurable options
117 124 */
118 125 #define CONFIG_SYS_LONGHELP /* undef to save memory */
119 126 #define CONFIG_SYS_PROMPT "uboot> "
120   -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  127 +/* Console I/O Buffer Size */
  128 +#define CONFIG_SYS_CBSIZE 256
121 129 /* Print Buffer Size */
122   -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
123   -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
124   -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  130 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  131 + sizeof(CONFIG_SYS_PROMPT) + 16)
  132 +/* max number of command args */
  133 +#define CONFIG_SYS_MAXARGS 16
  134 +/* Boot Argument Buffer Size */
  135 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
125 136  
126 137 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */
127 138 #define CONFIG_SYS_MEMTEST_END 0x10000
128 139  
129 140  
130 141  
... ... @@ -130,21 +141,21 @@
130 141  
131 142 #define CONFIG_SYS_HZ 1000
132 143  
133   -#define CONFIG_CMDLINE_EDITING 1
  144 +#define CONFIG_CMDLINE_EDITING
134 145  
135   -/*-----------------------------------------------------------------------
  146 +/*
136 147 * Stack sizes
137 148 *
138 149 * The stack sizes are set up in start.S using the settings below
139 150 */
140 151 #define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
141 152  
142   -/*-----------------------------------------------------------------------
  153 +/*
143 154 * Physical Memory Map
144 155 */
145   -#define CONFIG_NR_DRAM_BANKS 1
146   -#define PHYS_SDRAM_1 0x80000000
147   -#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
  156 +#define CONFIG_NR_DRAM_BANKS 1
  157 +#define PHYS_SDRAM_1 0x80000000
  158 +#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024)
148 159 #define CONFIG_BOARD_EARLY_INIT_F
149 160 #define CONFIG_SYS_TEXT_BASE 0xA0000000
150 161  
151 162  
152 163  
153 164  
154 165  
155 166  
156 167  
... ... @@ -156,33 +167,37 @@
156 167 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
157 168 CONFIG_SYS_GBL_DATA_OFFSET)
158 169  
159   -/*-----------------------------------------------------------------------
  170 +/*
160 171 * FLASH and environment organization
161 172 */
162 173 #define CONFIG_SYS_FLASH_BASE 0xa0000000
163   -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
164   -#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max number of sectors on one chip */
165   -#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
  174 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max # of memory banks */
  175 +#define CONFIG_SYS_MAX_FLASH_SECT 259 /* max # of sectors/chip */
  176 +/* Monitor at beginning of flash */
  177 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
166 178  
167   -#define CONFIG_ENV_IS_IN_EEPROM 1
168   -#define CONFIG_ENV_OFFSET 0x00 /* environment starts here */
169   -#define CONFIG_ENV_SIZE 4096
  179 +#define CONFIG_ENV_IS_IN_EEPROM
  180 +#define CONFIG_ENV_OFFSET 0x00 /* env. starts here */
  181 +#define CONFIG_ENV_SIZE 4096
170 182 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x52
171   -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
172   -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* between stop and start */
173   -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* length of byte address */
  183 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* 5 bits = 32 octets */
  184 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* 10 ms delay */
  185 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* byte addr. lenght */
174 186  
175   -/*-----------------------------------------------------------------------
  187 +/*
176 188 * CFI FLASH driver setup
177 189 */
178   -#define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */
179   -#define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */
180   -#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */
181   -#define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */
  190 +#define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */
  191 +#define CONFIG_FLASH_CFI_DRIVER /* Use drivers/mtd/cfi_flash.c */
  192 +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffered writes (~10x faster) */
  193 +#define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */
182 194  
183   -/* timeout values are in ticks */
184   -#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
185   -#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
  195 +/*
  196 + * Timeout for Flash Erase and Flash Write
  197 + * timeout values are in ticks
  198 + */
  199 +#define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ)
  200 +#define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ)
186 201  
187 202 /*
188 203 * JFFS2 partitions
189 204  
... ... @@ -196,11 +211,11 @@
196 211  
197 212 #define CONFIG_MXC_GPIO
198 213  
199   -#define CONFIG_HARD_SPI 1
200   -#define CONFIG_MXC_SPI 1
  214 +#define CONFIG_HARD_SPI
  215 +#define CONFIG_MXC_SPI
201 216 #define CONFIG_CMD_SPI
202 217  
203   -#define CONFIG_S6E63D6 1
  218 +#define CONFIG_S6E63D6
204 219  
205 220 #define CONFIG_VIDEO
206 221 #define CONFIG_CFB_CONSOLE