tegra2: Tidy UART selection

UART selection is done with a lot of #ifdefs. This cleans things up a little. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>

tegra2: Tidy UART selection
UART selection is done with a lot of #ifdefs. This cleans things up a little. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Simon Glass · Albert ARIBAUD
1 parent 8f7431400a
Showing 1 changed file with 34 additions and 23 deletions Side-by-side Diff
board/nvidia/common/board.c
@@ -35,6 +35,12 @@
  
 DECLARE_GLOBAL_DATA_PTR;
  
+enum {
+	/* UARTs which we can enable */
+	UARTA	= 1 << 0,
+	UARTD	= 1 << 3,
+};
+
 const struct tegra2_sysinfo sysinfo = {
 	CONFIG_TEGRA2_BOARD_STRING
 };
  
  
  
  
@@ -64,36 +70,32 @@
  
 /*
  * Routine: clock_init_uart
- * Description: init the PLL and clock for the UART(s)
+ * Description: init clock for the UART(s)
  */
-static void clock_init_uart(void)
+static void clock_init_uart(int uart_ids)
 {
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
-	enable_uart(PERIPH_ID_UART1);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTA */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
-	enable_uart(PERIPH_ID_UART4);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTD */
+	if (uart_ids & UARTA)
+		enable_uart(PERIPH_ID_UART1);
+	if (uart_ids & UARTD)
+		enable_uart(PERIPH_ID_UART4);
 }
  
 /*
  * Routine: pin_mux_uart
  * Description: setup the pin muxes/tristate values for the UART(s)
  */
-static void pin_mux_uart(void)
+static void pin_mux_uart(int uart_ids)
 {
-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
-	pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
-	pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
-
-	pinmux_tristate_disable(PINGRP_IRRX);
-	pinmux_tristate_disable(PINGRP_IRTX);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTA */
-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
-	pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
-
-	pinmux_tristate_disable(PINGRP_GMC);
-#endif	/* CONFIG_TEGRA2_ENABLE_UARTD */
+	if (uart_ids & UARTA) {
+		pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
+		pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
+		pinmux_tristate_disable(PINGRP_IRRX);
+		pinmux_tristate_disable(PINGRP_IRTX);
+	}
+	if (uart_ids & UARTD) {
+		pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
+		pinmux_tristate_disable(PINGRP_GMC);
+	}
 }
  
 /*
@@ -114,6 +116,15 @@
 #ifdef CONFIG_BOARD_EARLY_INIT_F
 int board_early_init_f(void)
 {
+	int uart_ids = 0;	/* bit mask of which UART ids to enable */
+
+#ifdef CONFIG_TEGRA2_ENABLE_UARTA
+	uart_ids |= UARTA;
+#endif
+#ifdef CONFIG_TEGRA2_ENABLE_UARTD
+	uart_ids |= UARTD;
+#endif
+
 	/* We didn't do this init in start.S, so do it now */
 	cpu_init_cp15();
  
  
@@ -121,10 +132,10 @@
 	clock_early_init();
  
 	/* Initialize UART clocks */
-	clock_init_uart();
+	clock_init_uart(uart_ids);
  
 	/* Initialize periph pinmuxes */
-	pin_mux_uart();
+	pin_mux_uart(uart_ids);
  
 	/* Initialize periph GPIOs */
 	gpio_config_uart();
...	...	@@ -35,6 +35,12 @@
35	35
36	36	DECLARE_GLOBAL_DATA_PTR;
37	37
	38	+enum {
	39	+ /* UARTs which we can enable */
	40	+ UARTA = 1 << 0,
	41	+ UARTD = 1 << 3,
	42	+};
	43	+
38	44	const struct tegra2_sysinfo sysinfo = {
39	45	CONFIG_TEGRA2_BOARD_STRING
40	46	};
41	47
42	48
43	49
44	50
...	...	@@ -64,36 +70,32 @@
64	70
65	71	/*
66	72	* Routine: clock_init_uart
67		- * Description: init the PLL and clock for the UART(s)
	73	+ * Description: init clock for the UART(s)
68	74	*/
69		-static void clock_init_uart(void)
	75	+static void clock_init_uart(int uart_ids)
70	76	{
71		-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
72		- enable_uart(PERIPH_ID_UART1);
73		-#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
74		-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
75		- enable_uart(PERIPH_ID_UART4);
76		-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
	77	+ if (uart_ids & UARTA)
	78	+ enable_uart(PERIPH_ID_UART1);
	79	+ if (uart_ids & UARTD)
	80	+ enable_uart(PERIPH_ID_UART4);
77	81	}
78	82
79	83	/*
80	84	* Routine: pin_mux_uart
81	85	* Description: setup the pin muxes/tristate values for the UART(s)
82	86	*/
83		-static void pin_mux_uart(void)
	87	+static void pin_mux_uart(int uart_ids)
84	88	{
85		-#if defined(CONFIG_TEGRA2_ENABLE_UARTA)
86		- pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
87		- pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
88		-
89		- pinmux_tristate_disable(PINGRP_IRRX);
90		- pinmux_tristate_disable(PINGRP_IRTX);
91		-#endif /* CONFIG_TEGRA2_ENABLE_UARTA */
92		-#if defined(CONFIG_TEGRA2_ENABLE_UARTD)
93		- pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
94		-
95		- pinmux_tristate_disable(PINGRP_GMC);
96		-#endif /* CONFIG_TEGRA2_ENABLE_UARTD */
	89	+ if (uart_ids & UARTA) {
	90	+ pinmux_set_func(PINGRP_IRRX, PMUX_FUNC_UARTA);
	91	+ pinmux_set_func(PINGRP_IRTX, PMUX_FUNC_UARTA);
	92	+ pinmux_tristate_disable(PINGRP_IRRX);
	93	+ pinmux_tristate_disable(PINGRP_IRTX);
	94	+ }
	95	+ if (uart_ids & UARTD) {
	96	+ pinmux_set_func(PINGRP_GMC, PMUX_FUNC_UARTD);
	97	+ pinmux_tristate_disable(PINGRP_GMC);
	98	+ }
97	99	}
98	100
99	101	/*
...	...	@@ -114,6 +116,15 @@
114	116	#ifdef CONFIG_BOARD_EARLY_INIT_F
115	117	int board_early_init_f(void)
116	118	{
	119	+ int uart_ids = 0; /* bit mask of which UART ids to enable */
	120	+
	121	+#ifdef CONFIG_TEGRA2_ENABLE_UARTA
	122	+ uart_ids \|= UARTA;
	123	+#endif
	124	+#ifdef CONFIG_TEGRA2_ENABLE_UARTD
	125	+ uart_ids \|= UARTD;
	126	+#endif
	127	+
117	128	/* We didn't do this init in start.S, so do it now */
118	129	cpu_init_cp15();
119	130
120	131
...	...	@@ -121,10 +132,10 @@
121	132	clock_early_init();
122	133
123	134	/* Initialize UART clocks */
124		- clock_init_uart();
	135	+ clock_init_uart(uart_ids);
125	136
126	137	/* Initialize periph pinmuxes */
127		- pin_mux_uart();
	138	+ pin_mux_uart(uart_ids);
128	139
129	140	/* Initialize periph GPIOs */
130	141	gpio_config_uart();