ahci: introduce ahci_reset()

Extract controller reset code from ahci_host_init() into separate ahci_reset(). Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>

ahci: introduce ahci_reset()
Extract controller reset code from ahci_host_init() into separate ahci_reset(). Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> Reviewed-by: Tom Rini <trini@ti.com>
Dmitry Lifshitz · Tom Rini
1 parent 2a10f8b948
Showing 2 changed files with 31 additions and 17 deletions Side-by-side Diff
drivers/block/ahci.c
include/ahci.h
@@ -137,6 +137,33 @@
 }
 #endif
  
+int ahci_reset(u32 base)
+{
+	int i = 1000;
+	u32 host_ctl_reg = base + HOST_CTL;
+	u32 tmp = readl(host_ctl_reg); /* global controller reset */
+
+	if ((tmp & HOST_RESET) == 0)
+		writel_with_flush(tmp | HOST_RESET, host_ctl_reg);
+
+	/*
+	 * reset must complete within 1 second, or
+	 * the hardware should be considered fried.
+	 */
+	do {
+		udelay(1000);
+		tmp = readl(host_ctl_reg);
+		i--;
+	} while ((i > 0) && (tmp & HOST_RESET));
+
+	if (i == 0) {
+		printf("controller reset failed (0x%x)\n", tmp);
+		return -1;
+	}
+
+	return 0;
+}
+
 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 {
 #ifndef CONFIG_SCSI_AHCI_PLAT
@@ -156,23 +183,9 @@
 	cap_save &= ((1 << 28) | (1 << 17));
 	cap_save |= (1 << 27);  /* Staggered Spin-up. Not needed. */
  
-	/* global controller reset */
-	tmp = readl(mmio + HOST_CTL);
-	if ((tmp & HOST_RESET) == 0)
-		writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
-
-	/* reset must complete within 1 second, or
-	 * the hardware should be considered fried.
-	 */
-	i = 1000;
-	do {
-		udelay(1000);
-		tmp = readl(mmio + HOST_CTL);
-		if (!i--) {
-			debug("controller reset failed (0x%x)\n", tmp);
-			return -1;
-		}
-	} while (tmp & HOST_RESET);
+	ret = ahci_reset(probe_ent->mmio_base);
+	if (ret)
+		return ret;
  
 	writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
 	writel(cap_save, mmio + HOST_CAP);
@@ -161,6 +161,7 @@
 };
  
 int ahci_init(u32 base);
+int ahci_reset(u32 base);
  
 #endif
...	...	@@ -137,6 +137,33 @@
137	137	}
138	138	#endif
139	139
	140	+int ahci_reset(u32 base)
	141	+{
	142	+ int i = 1000;
	143	+ u32 host_ctl_reg = base + HOST_CTL;
	144	+ u32 tmp = readl(host_ctl_reg); /* global controller reset */
	145	+
	146	+ if ((tmp & HOST_RESET) == 0)
	147	+ writel_with_flush(tmp \| HOST_RESET, host_ctl_reg);
	148	+
	149	+ /*
	150	+ * reset must complete within 1 second, or
	151	+ * the hardware should be considered fried.
	152	+ */
	153	+ do {
	154	+ udelay(1000);
	155	+ tmp = readl(host_ctl_reg);
	156	+ i--;
	157	+ } while ((i > 0) && (tmp & HOST_RESET));
	158	+
	159	+ if (i == 0) {
	160	+ printf("controller reset failed (0x%x)\n", tmp);
	161	+ return -1;
	162	+ }
	163	+
	164	+ return 0;
	165	+}
	166	+
140	167	static int ahci_host_init(struct ahci_probe_ent *probe_ent)
141	168	{
142	169	#ifndef CONFIG_SCSI_AHCI_PLAT
...	...	@@ -156,23 +183,9 @@
156	183	cap_save &= ((1 << 28) \| (1 << 17));
157	184	cap_save \|= (1 << 27); /* Staggered Spin-up. Not needed. */
158	185
159		- /* global controller reset */
160		- tmp = readl(mmio + HOST_CTL);
161		- if ((tmp & HOST_RESET) == 0)
162		- writel_with_flush(tmp \| HOST_RESET, mmio + HOST_CTL);
163		-
164		- /* reset must complete within 1 second, or
165		- * the hardware should be considered fried.
166		- */
167		- i = 1000;
168		- do {
169		- udelay(1000);
170		- tmp = readl(mmio + HOST_CTL);
171		- if (!i--) {
172		- debug("controller reset failed (0x%x)\n", tmp);
173		- return -1;
174		- }
175		- } while (tmp & HOST_RESET);
	186	+ ret = ahci_reset(probe_ent->mmio_base);
	187	+ if (ret)
	188	+ return ret;
176	189
177	190	writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
178	191	writel(cap_save, mmio + HOST_CAP);
...	...	@@ -161,6 +161,7 @@
161	161	};
162	162
163	163	int ahci_init(u32 base);
	164	+int ahci_reset(u32 base);
164	165
165	166	#endif