Commit 6ce9ba02b163da81f8629656019f1191654ce2cf

Authored by Nick Xie
Committed by Kever Yang
1 parent a839828fa1

arm64: dts: rockchip: Add support for Khadas Edge-V

Add devicetree support for Khadas Edge-V.
Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board.

Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU

Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)

Signed-off-by: Nick Xie <nick@khadas.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Showing 5 changed files with 100 additions and 0 deletions Side-by-side Diff

arch/arm/dts/Makefile
... ... @@ -109,6 +109,7 @@
109 109 rk3399-firefly.dtb \
110 110 rk3399-gru-bob.dtb \
111 111 rk3399-khadas-edge.dtb \
  112 + rk3399-khadas-edge-v.dtb \
112 113 rk3399-nanopc-t4.dtb \
113 114 rk3399-nanopi-m4.dtb \
114 115 rk3399-nanopi-neo4.dtb \
arch/arm/dts/rk3399-khadas-edge-v-u-boot.dtsi
  1 +// SPDX-License-Identifier: GPL-2.0+
  2 +/*
  3 + * Copyright (C) 2019 Nick Xie <nick@khadas.com>
  4 + */
  5 +
  6 +#include "rk3399-khadas-edge-u-boot.dtsi"
arch/arm/dts/rk3399-khadas-edge-v.dts
  1 +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2 +/*
  3 + * Copyright (c) 2019 Shenzhen Wesion Technology Co., Ltd.
  4 + * (https://www.khadas.com)
  5 + */
  6 +
  7 +/dts-v1/;
  8 +#include "rk3399-khadas-edge.dtsi"
  9 +
  10 +/ {
  11 + model = "Khadas Edge-V";
  12 + compatible = "khadas,edge-v", "rockchip,rk3399";
  13 +};
  14 +
  15 +&gmac {
  16 + status = "okay";
  17 +};
  18 +
  19 +&pcie_phy {
  20 + status = "okay";
  21 +};
  22 +
  23 +&pcie0 {
  24 + ep-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
  25 + num-lanes = <4>;
  26 + status = "okay";
  27 +};
board/rockchip/evb_rk3399/MAINTAINERS
... ... @@ -12,6 +12,12 @@
12 12 F: configs/khadas-edge-rk3399_defconfig
13 13 F: arch/arm/dts/rk3399-khadas-edge-u-boot.dtsi
14 14  
  15 +KHADAS-EDGE-V
  16 +M: Nick Xie <nick@khadas.com>
  17 +S: Maintained
  18 +F: configs/khadas-edge-v-rk3399_defconfig
  19 +F: arch/arm/dts/rk3399-khadas-edge-v-u-boot.dtsi
  20 +
15 21 NANOPC-T4
16 22 M: Jagan Teki <jagan@amarulasolutions.com>
17 23 S: Maintained
configs/khadas-edge-v-rk3399_defconfig
  1 +CONFIG_ARM=y
  2 +CONFIG_ARCH_ROCKCHIP=y
  3 +CONFIG_SYS_TEXT_BASE=0x00200000
  4 +CONFIG_ROCKCHIP_RK3399=y
  5 +CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x50000
  6 +CONFIG_NR_DRAM_BANKS=1
  7 +CONFIG_SPL_STACK_R_ADDR=0x80000
  8 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
  9 +CONFIG_DEBUG_UART_CLOCK=24000000
  10 +CONFIG_DEBUG_UART=y
  11 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtbi"
  12 +# CONFIG_DISPLAY_CPUINFO is not set
  13 +CONFIG_DISPLAY_BOARDINFO_LATE=y
  14 +CONFIG_SPL_STACK_R=y
  15 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
  16 +CONFIG_TPL=y
  17 +CONFIG_SYS_PROMPT="kedge# "
  18 +CONFIG_CMD_BOOTZ=y
  19 +CONFIG_CMD_GPT=y
  20 +CONFIG_CMD_MMC=y
  21 +CONFIG_CMD_SF=y
  22 +CONFIG_CMD_USB=y
  23 +# CONFIG_CMD_SETEXPR is not set
  24 +CONFIG_CMD_TIME=y
  25 +CONFIG_SPL_OF_CONTROL=y
  26 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v"
  27 +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
  28 +CONFIG_ENV_IS_IN_MMC=y
  29 +CONFIG_NET_RANDOM_ETHADDR=y
  30 +CONFIG_ROCKCHIP_GPIO=y
  31 +CONFIG_SYS_I2C_ROCKCHIP=y
  32 +CONFIG_MMC_DW=y
  33 +CONFIG_MMC_DW_ROCKCHIP=y
  34 +CONFIG_MMC_SDHCI=y
  35 +CONFIG_MMC_SDHCI_ROCKCHIP=y
  36 +CONFIG_PHY_REALTEK=y
  37 +CONFIG_DM_ETH=y
  38 +CONFIG_ETH_DESIGNWARE=y
  39 +CONFIG_GMAC_ROCKCHIP=y
  40 +CONFIG_PMIC_RK8XX=y
  41 +CONFIG_REGULATOR_PWM=y
  42 +CONFIG_REGULATOR_RK8XX=y
  43 +CONFIG_PWM_ROCKCHIP=y
  44 +CONFIG_RAM_RK3399_LPDDR4=y
  45 +CONFIG_BAUDRATE=1500000
  46 +CONFIG_DEBUG_UART_SHIFT=2
  47 +CONFIG_SYSRESET=y
  48 +CONFIG_USB=y
  49 +CONFIG_USB_XHCI_HCD=y
  50 +CONFIG_USB_XHCI_DWC3=y
  51 +CONFIG_USB_EHCI_HCD=y
  52 +CONFIG_USB_EHCI_GENERIC=y
  53 +CONFIG_USB_HOST_ETHER=y
  54 +CONFIG_USB_ETHER_ASIX=y
  55 +CONFIG_USB_ETHER_ASIX88179=y
  56 +CONFIG_USB_ETHER_MCS7830=y
  57 +CONFIG_USB_ETHER_RTL8152=y
  58 +CONFIG_USB_ETHER_SMSC95XX=y
  59 +CONFIG_SPL_TINY_MEMSET=y
  60 +CONFIG_ERRNO_STR=y