Eric Lee / smarc-uboot

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Commit 6e14232010ad7d105e40511ff5e19a3990050511

Authored by Eric Nelson
Committed by Stefano Babic
1 parent 5ae28d2db2
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

i.MX: declare iomux_v3_cfg_t arrays as const 

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>

Showing 5 changed files with 27 additions and 27 deletions Side-by-side Diff

board/freescale/mx6qarm2/mx6qarm2.c
Diff comments   View file @ 6e14232
... ... @@ -54,12 +54,12 @@
54 54 return 0;
55 55 }
56 56  
57   -iomux_v3_cfg_t uart4_pads[] = {
  57 +iomux_v3_cfg_t const uart4_pads[] = {
58 58 MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
59 59 MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
60 60 };
61 61  
62   -iomux_v3_cfg_t usdhc3_pads[] = {
  62 +iomux_v3_cfg_t const usdhc3_pads[] = {
63 63 MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
64 64 MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
65 65 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
... ... @@ -73,7 +73,7 @@
73 73 MX6Q_PAD_NANDF_CS0__GPIO_6_11 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
74 74 };
75 75  
76   -iomux_v3_cfg_t usdhc4_pads[] = {
  76 +iomux_v3_cfg_t const usdhc4_pads[] = {
77 77 MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
78 78 MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
79 79 MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
... ... @@ -86,7 +86,7 @@
86 86 MX6Q_PAD_SD4_DAT7__USDHC4_DAT7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
87 87 };
88 88  
89   -iomux_v3_cfg_t enet_pads[] = {
  89 +iomux_v3_cfg_t const enet_pads[] = {
90 90 MX6Q_PAD_KEY_COL1__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
91 91 MX6Q_PAD_KEY_COL2__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
92 92 MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
board/freescale/mx6qsabreauto/mx6qsabreauto.c
Diff comments   View file @ 6e14232
... ... @@ -53,12 +53,12 @@
53 53 return 0;
54 54 }
55 55  
56   -iomux_v3_cfg_t uart4_pads[] = {
  56 +iomux_v3_cfg_t const uart4_pads[] = {
57 57 MX6Q_PAD_KEY_COL0__UART4_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
58 58 MX6Q_PAD_KEY_ROW0__UART4_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
59 59 };
60 60  
61   -iomux_v3_cfg_t enet_pads[] = {
  61 +iomux_v3_cfg_t const enet_pads[] = {
62 62 MX6Q_PAD_KEY_COL1__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
63 63 MX6Q_PAD_KEY_COL2__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
64 64 MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
... ... @@ -81,7 +81,7 @@
81 81 imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads));
82 82 }
83 83  
84   -iomux_v3_cfg_t usdhc3_pads[] = {
  84 +iomux_v3_cfg_t const usdhc3_pads[] = {
85 85 MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
86 86 MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
87 87 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
board/freescale/mx6qsabrelite/mx6qsabrelite.c
Diff comments   View file @ 6e14232
... ... @@ -70,12 +70,12 @@
70 70 return 0;
71 71 }
72 72  
73   -iomux_v3_cfg_t uart1_pads[] = {
  73 +iomux_v3_cfg_t const uart1_pads[] = {
74 74 MX6Q_PAD_SD3_DAT6__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
75 75 MX6Q_PAD_SD3_DAT7__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
76 76 };
77 77  
78   -iomux_v3_cfg_t uart2_pads[] = {
  78 +iomux_v3_cfg_t const uart2_pads[] = {
79 79 MX6Q_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
80 80 MX6Q_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
81 81 };
... ... @@ -124,7 +124,7 @@
124 124 }
125 125 };
126 126  
127   -iomux_v3_cfg_t usdhc3_pads[] = {
  127 +iomux_v3_cfg_t const usdhc3_pads[] = {
128 128 MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
129 129 MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
130 130 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
... ... @@ -134,7 +134,7 @@
134 134 MX6Q_PAD_SD3_DAT5__GPIO_7_0 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
135 135 };
136 136  
137   -iomux_v3_cfg_t usdhc4_pads[] = {
  137 +iomux_v3_cfg_t const usdhc4_pads[] = {
138 138 MX6Q_PAD_SD4_CLK__USDHC4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
139 139 MX6Q_PAD_SD4_CMD__USDHC4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
140 140 MX6Q_PAD_SD4_DAT0__USDHC4_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
... ... @@ -144,7 +144,7 @@
144 144 MX6Q_PAD_NANDF_D6__GPIO_2_6 | MUX_PAD_CTRL(NO_PAD_CTRL), /* CD */
145 145 };
146 146  
147   -iomux_v3_cfg_t enet_pads1[] = {
  147 +iomux_v3_cfg_t const enet_pads1[] = {
148 148 MX6Q_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
149 149 MX6Q_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
150 150 MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
... ... @@ -170,7 +170,7 @@
170 170 MX6Q_PAD_EIM_D23__GPIO_3_23 | MUX_PAD_CTRL(NO_PAD_CTRL),
171 171 };
172 172  
173   -iomux_v3_cfg_t enet_pads2[] = {
  173 +iomux_v3_cfg_t const enet_pads2[] = {
174 174 MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
175 175 MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
176 176 MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
... ... @@ -180,7 +180,7 @@
180 180 };
181 181  
182 182 /* Button assignments for J14 */
183   -static iomux_v3_cfg_t button_pads[] = {
  183 +static iomux_v3_cfg_t const button_pads[] = {
184 184 /* Menu */
185 185 MX6Q_PAD_NANDF_D1__GPIO_2_1 | MUX_PAD_CTRL(BUTTON_PAD_CTRL),
186 186 /* Back */
... ... @@ -213,7 +213,7 @@
213 213 imx_iomux_v3_setup_multiple_pads(enet_pads2, ARRAY_SIZE(enet_pads2));
214 214 }
215 215  
216   -iomux_v3_cfg_t usb_pads[] = {
  216 +iomux_v3_cfg_t const usb_pads[] = {
217 217 MX6Q_PAD_GPIO_17__GPIO_7_12 | MUX_PAD_CTRL(NO_PAD_CTRL),
218 218 };
219 219  
... ... @@ -297,7 +297,7 @@
297 297 }
298 298  
299 299 #ifdef CONFIG_MXC_SPI
300   -iomux_v3_cfg_t ecspi1_pads[] = {
  300 +iomux_v3_cfg_t const ecspi1_pads[] = {
301 301 /* SS1 */
302 302 MX6Q_PAD_EIM_D19__GPIO_3_19 | MUX_PAD_CTRL(SPI_PAD_CTRL),
303 303 MX6Q_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
board/freescale/mx6qsabresd/mx6qsabresd.c
Diff comments   View file @ 6e14232
... ... @@ -51,12 +51,12 @@
51 51 return 0;
52 52 }
53 53  
54   -iomux_v3_cfg_t uart1_pads[] = {
  54 +iomux_v3_cfg_t const uart1_pads[] = {
55 55 MX6Q_PAD_CSI0_DAT10__UART1_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
56 56 MX6Q_PAD_CSI0_DAT11__UART1_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
57 57 };
58 58  
59   -iomux_v3_cfg_t enet_pads[] = {
  59 +iomux_v3_cfg_t const enet_pads[] = {
60 60 MX6Q_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
61 61 MX6Q_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
62 62 MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC | MUX_PAD_CTRL(ENET_PAD_CTRL),
... ... @@ -86,7 +86,7 @@
86 86 gpio_set_value(IMX_GPIO_NR(1, 25), 1);
87 87 }
88 88  
89   -iomux_v3_cfg_t usdhc3_pads[] = {
  89 +iomux_v3_cfg_t const usdhc3_pads[] = {
90 90 MX6Q_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
91 91 MX6Q_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
92 92 MX6Q_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
board/genesi/mx51_efikamx/efikamx.c
Diff comments   View file @ 6e14232
... ... @@ -94,7 +94,7 @@
94 94 return (~rev & 0x7) + 1;
95 95 }
96 96  
97   -static iomux_v3_cfg_t efikasb_revision_pads[] = {
  97 +static iomux_v3_cfg_t const efikasb_revision_pads[] = {
98 98 MX51_PAD_EIM_CS3__GPIO2_28,
99 99 MX51_PAD_EIM_CS4__GPIO2_29,
100 100 };
... ... @@ -141,7 +141,7 @@
141 141 /*
142 142 * UART configuration
143 143 */
144   -static iomux_v3_cfg_t efikamx_uart_pads[] = {
  144 +static iomux_v3_cfg_t const efikamx_uart_pads[] = {
145 145 MX51_PAD_UART1_RXD__UART1_RXD,
146 146 MX51_PAD_UART1_TXD__UART1_TXD,
147 147 MX51_PAD_UART1_RTS__UART1_RTS,
... ... @@ -151,7 +151,7 @@
151 151 /*
152 152 * SPI configuration
153 153 */
154   -static iomux_v3_cfg_t efikamx_spi_pads[] = {
  154 +static iomux_v3_cfg_t const efikamx_spi_pads[] = {
155 155 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI,
156 156 MX51_PAD_CSPI1_MISO__ECSPI1_MISO,
157 157 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK,
... ... @@ -273,7 +273,7 @@
273 273 {MMC_SDHC2_BASE_ADDR},
274 274 };
275 275  
276   -static iomux_v3_cfg_t efikamx_sdhc1_pads[] = {
  276 +static iomux_v3_cfg_t const efikamx_sdhc1_pads[] = {
277 277 MX51_PAD_SD1_CMD__SD1_CMD,
278 278 MX51_PAD_SD1_CLK__SD1_CLK,
279 279 MX51_PAD_SD1_DATA0__SD1_DATA0,
... ... @@ -285,7 +285,7 @@
285 285  
286 286 #define EFIKAMX_SDHC1_WP IMX_GPIO_NR(1, 1)
287 287  
288   -static iomux_v3_cfg_t efikamx_sdhc1_cd_pads[] = {
  288 +static iomux_v3_cfg_t const efikamx_sdhc1_cd_pads[] = {
289 289 MX51_PAD_GPIO1_0__SD1_CD,
290 290 MX51_PAD_EIM_CS2__SD1_CD,
291 291 };
... ... @@ -293,7 +293,7 @@
293 293 #define EFIKAMX_SDHC1_CD IMX_GPIO_NR(1, 0)
294 294 #define EFIKASB_SDHC1_CD IMX_GPIO_NR(2, 27)
295 295  
296   -static iomux_v3_cfg_t efikasb_sdhc2_pads[] = {
  296 +static iomux_v3_cfg_t const efikasb_sdhc2_pads[] = {
297 297 MX51_PAD_SD2_CMD__SD2_CMD,
298 298 MX51_PAD_SD2_CLK__SD2_CLK,
299 299 MX51_PAD_SD2_DATA0__SD2_DATA0,
... ... @@ -372,7 +372,7 @@
372 372 /*
373 373 * PATA
374 374 */
375   -static iomux_v3_cfg_t efikamx_pata_pads[] = {
  375 +static iomux_v3_cfg_t const efikamx_pata_pads[] = {
376 376 MX51_PAD_NANDF_WE_B__PATA_DIOW,
377 377 MX51_PAD_NANDF_RE_B__PATA_DIOR,
378 378 MX51_PAD_NANDF_ALE__PATA_BUFFER_EN,
... ... @@ -423,7 +423,7 @@
423 423 #define EFIKAMX_LED_GREEN IMX_GPIO_NR(3, 14)
424 424 #define EFIKAMX_LED_RED IMX_GPIO_NR(3, 15)
425 425  
426   -static iomux_v3_cfg_t efikasb_led_pads[] = {
  426 +static iomux_v3_cfg_t const efikasb_led_pads[] = {
427 427 MX51_PAD_GPIO1_3__GPIO1_3,
428 428 MX51_PAD_EIM_CS0__GPIO2_25,
429 429 };