Commit 6ff7aafa4b1f3a3f3808c9a9d9257f13e880689b
1 parent
38da33f3c1
Exists in
master
and in
49 other branches
ARM: IXP: Remove actux4 board
The board is unmaintained, just like the rest of the IXP. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michael Schwingen <michael@schwingen.org> Cc: Tom Rini <trini@ti.com>
Showing 6 changed files with 1 additions and 375 deletions Side-by-side Diff
board/actux4/Makefile
board/actux4/actux4.c
1 | -/* | |
2 | - * (C) Copyright 2007 | |
3 | - * Michael Schwingen, michael@schwingen.org | |
4 | - * | |
5 | - * (C) Copyright 2006 | |
6 | - * Stefan Roese, DENX Software Engineering, sr@denx.de. | |
7 | - * | |
8 | - * (C) Copyright 2002 | |
9 | - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net | |
10 | - * | |
11 | - * (C) Copyright 2002 | |
12 | - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
13 | - * Marius Groeger <mgroeger@sysgo.de> | |
14 | - * | |
15 | - * SPDX-License-Identifier: GPL-2.0+ | |
16 | - */ | |
17 | - | |
18 | -#include <common.h> | |
19 | -#include <command.h> | |
20 | -#include <malloc.h> | |
21 | -#include <asm/arch/ixp425.h> | |
22 | -#include <asm/io.h> | |
23 | -#include <miiphy.h> | |
24 | -#ifdef CONFIG_PCI | |
25 | -#include <pci.h> | |
26 | -#include <asm/arch/ixp425pci.h> | |
27 | -#endif | |
28 | - | |
29 | -#include "actux4_hw.h" | |
30 | - | |
31 | -DECLARE_GLOBAL_DATA_PTR; | |
32 | - | |
33 | -int board_early_init_f(void) | |
34 | -{ | |
35 | - writel(0xbd113c42, IXP425_EXP_CS1); | |
36 | - return 0; | |
37 | -} | |
38 | - | |
39 | -int board_init(void) | |
40 | -{ | |
41 | - /* adress of boot parameters */ | |
42 | - gd->bd->bi_boot_params = 0x00000100; | |
43 | - | |
44 | - GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_nPWRON); | |
45 | - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_nPWRON); | |
46 | - | |
47 | - GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); | |
48 | - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST); | |
49 | - | |
50 | - /* led not populated on board*/ | |
51 | - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED3); | |
52 | - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED3); | |
53 | - | |
54 | - /* middle LED */ | |
55 | - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_LED2); | |
56 | - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED2); | |
57 | - | |
58 | - /* right LED */ | |
59 | - /* weak pulldown = LED weak on */ | |
60 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_LED1); | |
61 | - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_LED1); | |
62 | - | |
63 | - /* Setup GPIO's for Interrupt inputs */ | |
64 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTA); | |
65 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTB); | |
66 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_USBINTC); | |
67 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_RTCINT); | |
68 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTA); | |
69 | - GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_PCI_INTB); | |
70 | - | |
71 | - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTA); | |
72 | - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTB); | |
73 | - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_USBINTC); | |
74 | - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_RTCINT); | |
75 | - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTA); | |
76 | - GPIO_INT_ACT_LOW_SET(CONFIG_SYS_GPIO_PCI_INTB); | |
77 | - | |
78 | - /* Setup GPIO's for 33MHz clock output */ | |
79 | - writel(0x011001FF, IXP425_GPIO_GPCLKR); | |
80 | - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK); | |
81 | - GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK); | |
82 | - | |
83 | - udelay(10000); | |
84 | - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); | |
85 | - udelay(10000); | |
86 | - GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST); | |
87 | - udelay(10000); | |
88 | - GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST); | |
89 | - | |
90 | - return 0; | |
91 | -} | |
92 | - | |
93 | -/* Check Board Identity */ | |
94 | -int checkboard(void) | |
95 | -{ | |
96 | - puts("Board: AcTux-4\n"); | |
97 | - return 0; | |
98 | -} | |
99 | - | |
100 | -int dram_init(void) | |
101 | -{ | |
102 | - gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20); | |
103 | - return 0; | |
104 | -} | |
105 | - | |
106 | -#ifdef CONFIG_PCI | |
107 | -struct pci_controller hose; | |
108 | - | |
109 | -void pci_init_board(void) | |
110 | -{ | |
111 | - pci_ixp_init(&hose); | |
112 | -} | |
113 | -#endif | |
114 | - | |
115 | -/* | |
116 | - * Hardcoded flash setup: | |
117 | - * Flash 0 is a non-CFI SST 39VF020 flash, 8 bit flash / 8 bit bus. | |
118 | - * Flash 1 is an Intel *16 flash using the CFI driver. | |
119 | - */ | |
120 | -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) | |
121 | -{ | |
122 | - if (banknum == 0) { /* non-CFI boot flash */ | |
123 | - info->portwidth = 1; | |
124 | - info->chipwidth = 1; | |
125 | - info->interface = FLASH_CFI_X8; | |
126 | - return 1; | |
127 | - } else | |
128 | - return 0; | |
129 | -} |
board/actux4/actux4_hw.h
1 | -/* | |
2 | - * (C) Copyright 2007 | |
3 | - * Michael Schwingen, michael@schwingen.org | |
4 | - * | |
5 | - * hardware register definitions for the AcTux-4 board. | |
6 | - * | |
7 | - * SPDX-License-Identifier: GPL-2.0+ | |
8 | - */ | |
9 | - | |
10 | -#ifndef _ACTUX4_HW_H | |
11 | -#define _ACTUX4_HW_H | |
12 | - | |
13 | -/* | |
14 | - * GPIO settings | |
15 | - */ | |
16 | -#define CONFIG_SYS_GPIO_USBINTA 0 | |
17 | -#define CONFIG_SYS_GPIO_USBINTB 1 | |
18 | -#define CONFIG_SYS_GPIO_USBINTC 2 | |
19 | -#define CONFIG_SYS_GPIO_nPWRON 3 /* Out */ | |
20 | -#define CONFIG_SYS_GPIO_I2C_SCL 4 | |
21 | -#define CONFIG_SYS_GPIO_I2C_SDA 5 | |
22 | -#define CONFIG_SYS_GPIO_PCI_INTB 6 | |
23 | -#define CONFIG_SYS_GPIO_BUTTON1 7 | |
24 | -#define CONFIG_SYS_GPIO_LED1 8 /* Out */ | |
25 | -#define CONFIG_SYS_GPIO_RTCINT 9 | |
26 | -#define CONFIG_SYS_GPIO_LED2 10 /* Out */ | |
27 | -#define CONFIG_SYS_GPIO_PCI_INTA 11 | |
28 | -#define CONFIG_SYS_GPIO_IORST 12 /* Out */ | |
29 | -#define CONFIG_SYS_GPIO_LED3 13 /* Out */ | |
30 | -#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */ | |
31 | -#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */ | |
32 | - | |
33 | -#endif |
boards.cfg
... | ... | @@ -377,7 +377,6 @@ |
377 | 377 | Active arm armv7:arm720t tegra30 avionic-design tec-ng tec-ng - Alban Bedel <alban.bedel@avionic-design.de> |
378 | 378 | Active arm armv7:arm720t tegra30 nvidia beaver beaver - Tom Warren <twarren@nvidia.com>:Stephen Warren <swarren@nvidia.com> |
379 | 379 | Active arm armv7:arm720t tegra30 nvidia cardhu cardhu - Tom Warren <twarren@nvidia.com> |
380 | -Active arm ixp - - - actux4 - Michael Schwingen <michael@schwingen.org> | |
381 | 380 | Active arm ixp - - - dvlhost - Michael Schwingen <michael@schwingen.org> |
382 | 381 | Active arm pxa - - - balloon3 - Marek Vasut <marek.vasut@gmail.com> |
383 | 382 | Active arm pxa - - - h2200 - Lukasz Dalek <luk0104@gmail.com> |
doc/README.scrapyard
... | ... | @@ -11,6 +11,7 @@ |
11 | 11 | |
12 | 12 | Board Arch CPU Commit Removed Last known maintainer/contact |
13 | 13 | ================================================================================================= |
14 | +actux4 arm ixp - 2014-01-28 Michael Schwingen <michael@schwingen.org> | |
14 | 15 | actux3 arm ixp - 2014-01-28 Michael Schwingen <michael@schwingen.org> |
15 | 16 | actux2 arm ixp - 2014-01-28 Michael Schwingen <michael@schwingen.org> |
16 | 17 | actux1 arm ixp - 2014-01-28 Michael Schwingen <michael@schwingen.org> |
include/configs/actux4.h
1 | -/* | |
2 | - * (C) Copyright 2007 | |
3 | - * Michael Schwingen, michael@schwingen.org | |
4 | - * | |
5 | - * Configuration settings for the AcTux-4 board. | |
6 | - * | |
7 | - * SPDX-License-Identifier: GPL-2.0+ | |
8 | - */ | |
9 | - | |
10 | -#ifndef __CONFIG_H | |
11 | -#define __CONFIG_H | |
12 | - | |
13 | -#define CONFIG_IXP425 1 | |
14 | -#define CONFIG_ACTUX4 1 | |
15 | - | |
16 | -#define CONFIG_MACH_TYPE 1532 | |
17 | - | |
18 | -#define CONFIG_DISPLAY_CPUINFO 1 | |
19 | -#define CONFIG_DISPLAY_BOARDINFO 1 | |
20 | - | |
21 | -#define CONFIG_IXP_SERIAL | |
22 | -#define CONFIG_SYS_IXP425_CONSOLE IXP425_UART1 | |
23 | -#define CONFIG_BAUDRATE 115200 | |
24 | -#define CONFIG_BOOTDELAY 3 | |
25 | -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ | |
26 | -#define CONFIG_BOARD_EARLY_INIT_F 1 | |
27 | - | |
28 | -/*************************************************************** | |
29 | - * U-boot generic defines start here. | |
30 | - ***************************************************************/ | |
31 | -/* Size of malloc() pool */ | |
32 | -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) | |
33 | - | |
34 | -/* allow to overwrite serial and ethaddr */ | |
35 | -#define CONFIG_ENV_OVERWRITE | |
36 | - | |
37 | -/* Command line configuration */ | |
38 | -#include <config_cmd_default.h> | |
39 | - | |
40 | -#define CONFIG_CMD_ELF | |
41 | - | |
42 | -#define CONFIG_PCI | |
43 | -#ifdef CONFIG_PCI | |
44 | -#define CONFIG_CMD_PCI | |
45 | -#define CONFIG_PCI_PNP | |
46 | -#define CONFIG_IXP_PCI | |
47 | -#define CONFIG_PCI_SCAN_SHOW | |
48 | -#define CONFIG_CMD_PCI_ENUM | |
49 | -#endif | |
50 | - | |
51 | -#define CONFIG_BOOTCOMMAND "run boot_flash" | |
52 | -/* enable passing of ATAGs */ | |
53 | -#define CONFIG_CMDLINE_TAG 1 | |
54 | -#define CONFIG_SETUP_MEMORY_TAGS 1 | |
55 | -#define CONFIG_INITRD_TAG 1 | |
56 | - | |
57 | -#if defined(CONFIG_CMD_KGDB) | |
58 | -# define CONFIG_KGDB_BAUDRATE 230400 | |
59 | -#endif | |
60 | - | |
61 | -/* Miscellaneous configurable options */ | |
62 | -#define CONFIG_SYS_LONGHELP | |
63 | -/* Console I/O Buffer Size */ | |
64 | -#define CONFIG_SYS_CBSIZE 256 | |
65 | -/* Print Buffer Size */ | |
66 | -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) | |
67 | -/* max number of command args */ | |
68 | -#define CONFIG_SYS_MAXARGS 16 | |
69 | -/* Boot Argument Buffer Size */ | |
70 | -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE | |
71 | - | |
72 | -#define CONFIG_SYS_MEMTEST_START 0x00400000 | |
73 | -#define CONFIG_SYS_MEMTEST_END 0x00800000 | |
74 | - | |
75 | -/* timer clock - 2* OSC_IN system clock */ | |
76 | -#define CONFIG_IXP425_TIMER_CLK 66000000 | |
77 | - | |
78 | -/* default load address */ | |
79 | -#define CONFIG_SYS_LOAD_ADDR 0x00010000 | |
80 | - | |
81 | -/* valid baudrates */ | |
82 | -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \ | |
83 | - 115200, 230400 } | |
84 | -#define CONFIG_SERIAL_RTS_ACTIVE 1 | |
85 | - | |
86 | -/* Expansion bus settings */ | |
87 | -#define CONFIG_SYS_EXP_CS0 0xbd113003 | |
88 | - | |
89 | -/* SDRAM settings */ | |
90 | -#define CONFIG_NR_DRAM_BANKS 1 | |
91 | -#define PHYS_SDRAM_1 0x00000000 | |
92 | -#define CONFIG_SYS_SDRAM_BASE 0x00000000 | |
93 | - | |
94 | -/* 32MB SDRAM */ | |
95 | -#define CONFIG_SYS_SDR_CONFIG 0x18 | |
96 | -#define PHYS_SDRAM_1_SIZE 0x02000000 | |
97 | -#define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a | |
98 | -#define CONFIG_SYS_SDR_MODE_CONFIG 0x1 | |
99 | -#define CONFIG_SYS_DRAM_SIZE 0x02000000 | |
100 | - | |
101 | -/* FLASH organization */ | |
102 | -#define CONFIG_SYS_TEXT_BASE 0x50000000 | |
103 | -#define CONFIG_SYS_MAX_FLASH_BANKS 2 | |
104 | -/* max # of sectors per chip */ | |
105 | -#define CONFIG_SYS_MAX_FLASH_SECT 70 | |
106 | -#define PHYS_FLASH_1 0x50000000 | |
107 | -#define PHYS_FLASH_2 0x51000000 | |
108 | -#define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 } | |
109 | - | |
110 | -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 | |
111 | -#define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1 | |
112 | -#define CONFIG_SYS_MONITOR_LEN (252 << 10) | |
113 | -#define CONFIG_BOARD_SIZE_LIMIT 258048 | |
114 | - | |
115 | -/* Use common CFI driver */ | |
116 | -#define CONFIG_SYS_FLASH_CFI | |
117 | -#define CONFIG_FLASH_CFI_DRIVER | |
118 | -/* board provides its own flash_init code */ | |
119 | -#define CONFIG_FLASH_CFI_LEGACY 1 | |
120 | -/* no byte writes on IXP4xx */ | |
121 | -#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT | |
122 | -/* SST 39VF020 etc. support */ | |
123 | -#define CONFIG_SYS_FLASH_LEGACY_256Kx8 1 | |
124 | - | |
125 | -/* print 'E' for empty sector on flinfo */ | |
126 | -#define CONFIG_SYS_FLASH_EMPTY_INFO | |
127 | - | |
128 | -/* Ethernet */ | |
129 | - | |
130 | -/* include IXP4xx NPE support */ | |
131 | -#define CONFIG_IXP4XX_NPE 1 | |
132 | - | |
133 | -/* NPE0 PHY address */ | |
134 | -#define CONFIG_PHY_ADDR 0x1C | |
135 | -/* MII PHY management */ | |
136 | -#define CONFIG_MII 1 | |
137 | - | |
138 | -/* Number of ethernet rx buffers & descriptors */ | |
139 | -#define CONFIG_SYS_RX_ETH_BUFFER 16 | |
140 | - | |
141 | -#define CONFIG_CMD_DHCP | |
142 | -#define CONFIG_CMD_NET | |
143 | -#define CONFIG_CMD_MII | |
144 | -#define CONFIG_CMD_PING | |
145 | -#undef CONFIG_CMD_NFS | |
146 | - | |
147 | -/* BOOTP options */ | |
148 | -#define CONFIG_BOOTP_BOOTFILESIZE | |
149 | -#define CONFIG_BOOTP_BOOTPATH | |
150 | -#define CONFIG_BOOTP_GATEWAY | |
151 | -#define CONFIG_BOOTP_HOSTNAME | |
152 | - | |
153 | -/* Cache Configuration */ | |
154 | -#define CONFIG_SYS_CACHELINE_SIZE 32 | |
155 | - | |
156 | -/* environment organization: one complete 4k flash sector */ | |
157 | -#define CONFIG_ENV_IS_IN_FLASH 1 | |
158 | -#define CONFIG_ENV_SIZE 0x1000 | |
159 | -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x3f000) | |
160 | - | |
161 | -#define CONFIG_EXTRA_ENV_SETTINGS \ | |
162 | - "npe_ucode=51000000\0" \ | |
163 | - "mtd=IXP4XX-Flash.0:252k(uboot),4k(uboot_env);" \ | |
164 | - "IXP4XX-Flash.1:128k(ucode),1280k(linux),-(root)\0" \ | |
165 | - "kerneladdr=51020000\0" \ | |
166 | - "kernelfile=actux4/uImage\0" \ | |
167 | - "rootfile=actux4/rootfs\0" \ | |
168 | - "rootaddr=51160000\0" \ | |
169 | - "loadaddr=10000\0" \ | |
170 | - "updateboot_ser=mw.b 10000 ff 40000;" \ | |
171 | - " loady ${loadaddr};" \ | |
172 | - " run eraseboot writeboot\0" \ | |
173 | - "updateboot_net=mw.b 10000 ff 40000;" \ | |
174 | - " tftp ${loadaddr} actux4/u-boot.bin;" \ | |
175 | - " run eraseboot writeboot\0" \ | |
176 | - "eraseboot=protect off 50000000 5003efff;" \ | |
177 | - " erase 50000000 +${filesize}\0" \ | |
178 | - "writeboot=cp.b 10000 50000000 ${filesize}\0" \ | |
179 | - "updateucode=loady;" \ | |
180 | - " era ${npe_ucode} +${filesize};" \ | |
181 | - " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \ | |
182 | - "updateroot=tftp ${loadaddr} ${rootfile};" \ | |
183 | - " era ${rootaddr} +${filesize};" \ | |
184 | - " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \ | |
185 | - "updatekern=tftp ${loadaddr} ${kernelfile};" \ | |
186 | - " era ${kerneladdr} +${filesize};" \ | |
187 | - " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \ | |
188 | - "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ | |
189 | - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ | |
190 | - "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock4" \ | |
191 | - " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \ | |
192 | - "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \ | |
193 | - "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ | |
194 | - "boot_flash=run flashargs addtty addeth;" \ | |
195 | - " bootm ${kerneladdr}\0" \ | |
196 | - "boot_net=run netargs addtty addeth;" \ | |
197 | - " tftpboot ${loadaddr} ${kernelfile};" \ | |
198 | - " bootm\0" | |
199 | - | |
200 | -/* additions for new relocation code, must be added to all boards */ | |
201 | -#define CONFIG_SYS_INIT_SP_ADDR \ | |
202 | - (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE) | |
203 | - | |
204 | -#endif /* __CONFIG_H */ |