Eric Lee / smarc-uboot

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Commit 6fffcdf8c869a3d8436be8eff6428d8121aa76e6

Authored by Vipin KUMAR
Committed by Tom Rix
1 parent e4c43c20b8
Exists in master and in 55 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, emb_lf_v2023.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-emmc-imx_v2014.04_3.10.53_1.1.0_ga, smarc-emmc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx-l5.0.0_1.0.0-ga, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2014.04_3.14.28_1.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, u-boot-2013.01.y, v2013.10, v2013.10-smarct33, v2013.10-smartmen, v2014.01, v2014.04, v2014.04-smarct33, v2014.04-smarct33-emmc, v2014.04-smartmen, v2014.07, v2014.07-smarct33, v2014.07-smartmen, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc, v2017.01-smarct4x

SPEAr : Adding README.spear in doc 

README.spear contains information about SPEAr architecture and
build options etc

Signed-off-by: Vipin <vipin.kumar@st.com>

Showing 1 changed file with 48 additions and 0 deletions Side-by-side Diff

  1 +
  2 +SPEAr (Structured Processor Enhanced Architecture).
  3 +
  4 +SPEAr600 is also known as SPEArPlus and SPEAr300 is also known as SPEArBasic
  5 +
  6 +The SPEAr SoC family embeds a customizable logic that can be programmed
  7 +one-time by a customer at silicon mask level (i.e. not at runtime!).
  8 +
  9 +We are now adding the support in u-boot for two SoC: SPEAr600 and SPEAr3xx.
  10 +
  11 +All 4 SoCs share common peripherals.
  12 +
  13 +1. ARM926ejs core based (sp600 has two cores, the 2nd handled only in Linux)
  14 +2. FastEthernet (sp600 has Gbit version, but same controller - GMAC)
  15 +3. USB Host
  16 +4. USB Device
  17 +5. NAND controller (FSMC)
  18 +6. Serial NOR ctrl
  19 +7. I2C
  20 +8. SPI
  21 +9. CLCD
  22 +10. others ..
  23 +
  24 +Everything is supported in Linux.
  25 +u-boot is not currently supporting all peripeharls (just a few as listed below).
  26 +1. USB Device
  27 +2. NAND controller (FSMC)
  28 +3. Serial Memory Interface
  29 +4. EMI (Parallel NOR interface)
  30 +4. I2C
  31 +5. UART
  32 +
  33 +Build options
  34 + make spear600_config
  35 + make spear300_config
  36 + make spear310_config
  37 + make spear320_config
  38 +
  39 +Further options
  40 + make ENV=NAND (supported by all 4 SoCs)
  41 + - This option generates a uboot image that saves environment inn NAND
  42 +
  43 + make CONSOLE=USB (supported by all 4 SoCs)
  44 + - This option generates a uboot image for using usbdevice as a tty i/f
  45 +
  46 + make FLASH=PNOR (supported by SPEAr310 and SPEAr320)
  47 + - This option generates a uboot image that supports emi controller for
  48 + CFI compliant parallel NOR flash