mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards

SPI Flash (M25P40) is connected to the SPI1 bus, we need a few qe_iop entries to actually enable SPI1 on these boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boards
SPI Flash (M25P40) is connected to the SPI1 bus, we need a few qe_iop entries to actually enable SPI1 on these boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Anton Vorontsov · Kumar Gala
1 parent 65dec3b459
Showing 1 changed file with 6 additions and 0 deletions Side-by-side Diff
board/freescale/mpc8569mds/mpc8569mds.c
@@ -154,6 +154,12 @@
 	{5, 10, 2, 0, 3}, /* UART1_CTS_B */
 	{5, 11, 1, 0, 2}, /* UART1_RTS_B */
  
+	/* SPI Flash, M25P40                           */
+	{4, 27, 3, 0, 1}, /* SPI_MOSI                  */
+	{4, 28, 3, 0, 1}, /* SPI_MISO                  */
+	{4, 29, 3, 0, 1}, /* SPI_CLK                   */
+	{4, 30, 1, 0, 0}, /* SPI_SEL, GPIO             */
+
 	{0,  0, 0, 0, QE_IOP_TAB_END} /* END of table */
 };
...	...	@@ -154,6 +154,12 @@
154	154	{5, 10, 2, 0, 3}, /* UART1_CTS_B */
155	155	{5, 11, 1, 0, 2}, /* UART1_RTS_B */
156	156
	157	+ /* SPI Flash, M25P40 */
	158	+ {4, 27, 3, 0, 1}, /* SPI_MOSI */
	159	+ {4, 28, 3, 0, 1}, /* SPI_MISO */
	160	+ {4, 29, 3, 0, 1}, /* SPI_CLK */
	161	+ {4, 30, 1, 0, 0}, /* SPI_SEL, GPIO */
	162	+
157	163	{0, 0, 0, 0, QE_IOP_TAB_END} /* END of table */
158	164	};
159	165