USB: EXYNOS: Set USB 2.0 HOST Link mode

This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>

USB: EXYNOS: Set USB 2.0 HOST Link mode
This patch adds a function to set usb host mode to USB 2.0 HOST Link for EXYNOS5 Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Rajeshwari Shinde · Marek Vasut
1 parent f9c4e04be7
Showing 3 changed files with 28 additions and 0 deletions Side-by-side Diff
arch/arm/cpu/armv7/exynos/system.c
arch/arm/include/asm/arch-exynos/system.h
drivers/usb/host/ehci-exynos.c
@@ -25,6 +25,28 @@
 #include <asm/io.h>
 #include <asm/arch/system.h>
  
+static void exynos5_set_usbhost_mode(unsigned int mode)
+{
+	struct exynos5_sysreg *sysreg =
+		(struct exynos5_sysreg *)samsung_get_base_sysreg();
+	unsigned int phy_cfg;
+
+	/* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */
+	if (mode == USB20_PHY_CFG_HOST_LINK_EN) {
+		setbits_le32(&sysreg->usb20phy_cfg,
+				USB20_PHY_CFG_HOST_LINK_EN);
+	} else {
+		clrbits_le32(&sysreg->usb20phy_cfg,
+				USB20_PHY_CFG_HOST_LINK_EN);
+	}
+}
+
+void set_usbhost_mode(unsigned int mode)
+{
+	if (cpu_is_exynos5())
+		exynos5_set_usbhost_mode(mode);
+}
+
 static void exynos4_set_system_display(void)
 {
 	struct exynos4_sysreg *sysreg =
@@ -49,6 +49,9 @@
 };
 #endif
  
+#define USB20_PHY_CFG_HOST_LINK_EN	(1 << 0)
+
+void set_usbhost_mode(unsigned int mode);
 void set_system_display_ctrl(void);
  
 #endif	/* _EXYNOS4_SYSTEM_H */
@@ -24,12 +24,15 @@
 #include <usb.h>
 #include <asm/arch/cpu.h>
 #include <asm/arch/ehci.h>
+#include <asm/arch/system.h>
 #include "ehci.h"
 #include "ehci-core.h"
  
 /* Setup the EHCI host controller. */
 static void setup_usb_phy(struct exynos_usb_phy *usb)
 {
+	set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
+
 	clrbits_le32(&usb->usbphyctrl0,
 			HOST_CTRL0_FSEL_MASK |
 			HOST_CTRL0_COMMONON_N |
...	...	@@ -25,6 +25,28 @@
25	25	#include <asm/io.h>
26	26	#include <asm/arch/system.h>
27	27
	28	+static void exynos5_set_usbhost_mode(unsigned int mode)
	29	+{
	30	+ struct exynos5_sysreg *sysreg =
	31	+ (struct exynos5_sysreg *)samsung_get_base_sysreg();
	32	+ unsigned int phy_cfg;
	33	+
	34	+ /* Setting USB20PHY_CONFIG register to USB 2.0 HOST link */
	35	+ if (mode == USB20_PHY_CFG_HOST_LINK_EN) {
	36	+ setbits_le32(&sysreg->usb20phy_cfg,
	37	+ USB20_PHY_CFG_HOST_LINK_EN);
	38	+ } else {
	39	+ clrbits_le32(&sysreg->usb20phy_cfg,
	40	+ USB20_PHY_CFG_HOST_LINK_EN);
	41	+ }
	42	+}
	43	+
	44	+void set_usbhost_mode(unsigned int mode)
	45	+{
	46	+ if (cpu_is_exynos5())
	47	+ exynos5_set_usbhost_mode(mode);
	48	+}
	49	+
28	50	static void exynos4_set_system_display(void)
29	51	{
30	52	struct exynos4_sysreg *sysreg =
...	...	@@ -49,6 +49,9 @@
49	49	};
50	50	#endif
51	51
	52	+#define USB20_PHY_CFG_HOST_LINK_EN (1 << 0)
	53	+
	54	+void set_usbhost_mode(unsigned int mode);
52	55	void set_system_display_ctrl(void);
53	56
54	57	#endif /* _EXYNOS4_SYSTEM_H */
...	...	@@ -24,12 +24,15 @@
24	24	#include <usb.h>
25	25	#include <asm/arch/cpu.h>
26	26	#include <asm/arch/ehci.h>
	27	+#include <asm/arch/system.h>
27	28	#include "ehci.h"
28	29	#include "ehci-core.h"
29	30
30	31	/* Setup the EHCI host controller. */
31	32	static void setup_usb_phy(struct exynos_usb_phy *usb)
32	33	{
	34	+ set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN);
	35	+
33	36	clrbits_le32(&usb->usbphyctrl0,
34	37	HOST_CTRL0_FSEL_MASK \|
35	38	HOST_CTRL0_COMMONON_N \|