Commit 716a50bffacf579a9c14d7890dfe2807093aa0e1
1 parent
e4323883ff
Exists in
v2014.04-smarct33-emmc
and in
1 other branch
Fixed RMII Clock to be Sourced From Chip Pin
Showing 1 changed file with 2 additions and 1 deletions Side-by-side Diff
board/embedian/smarct335x/board.c
| ... | ... | @@ -541,6 +541,7 @@ |
| 541 | 541 | &ddr3_smarct335x_data, |
| 542 | 542 | &ddr3_smarct335x_cmd_ctrl_data, |
| 543 | 543 | &ddr3_smarct335x_emif_reg_data, 0); |
| 544 | + puts("Set DDR3 to 800MHz.\n"); | |
| 544 | 545 | } |
| 545 | 546 | else if (board_is_evm_15_or_later(&header)) |
| 546 | 547 | config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data, |
| ... | ... | @@ -700,7 +701,7 @@ |
| 700 | 701 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 701 | 702 | PHY_INTERFACE_MODE_MII; |
| 702 | 703 | } else if (board_is_smarc_t335x(&header) || board_is_smarc_t335x_1g(&header)) { |
| 703 | - writel(RMII_MODE_ENABLE, &cdev->miisel); | |
| 704 | + writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); | |
| 704 | 705 | cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if = |
| 705 | 706 | PHY_INTERFACE_MODE_RMII; |
| 706 | 707 | } else { |