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Commit 71bdfcb21d755435a8e99f0ff66b853a3759f4b7

Authored by Marcus Comstedt
Committed by Andes
1 parent f379fa6406
Exists in smarc_8mq_lf_v2020.04 and in 9 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0

riscv: tools: Handle addend to absolute reloc in prelink-riscv 

Previously the handling of R_RISCV_32 and R_RISCV_64 would simply
insert the value of the symbol and ignore any addend.  However, there
exist relocs where the addend is non-zero:

0000000080250900 R_RISCV_64        efi_runtime_services+0x0000000000000068
0000000080250910 R_RISCV_64        efi_runtime_services+0x0000000000000038
0000000080250920 R_RISCV_64        efi_runtime_services+0x0000000000000018
0000000080250930 R_RISCV_64        efi_runtime_services+0x0000000000000020
0000000080250980 R_RISCV_64        efi_runtime_services+0x0000000000000048
0000000080250990 R_RISCV_64        efi_runtime_services+0x0000000000000050
00000000802509a0 R_RISCV_64        efi_runtime_services+0x0000000000000058
0000000080250940 R_RISCV_64        systab+0x0000000000000030
0000000080250950 R_RISCV_64        systab+0x0000000000000040
0000000080250960 R_RISCV_64        systab+0x0000000000000050
0000000080250970 R_RISCV_64        systab+0x0000000000000060

In these cases the addend needs to be added to the symbol value to get
the correct value for the reloc.

Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>

Showing 1 changed file with 6 additions and 2 deletions Inline Diff

tools/prelink-riscv.inc
Diff comments   View file @ 71bdfcb
1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /* 2 /*
3 * Copyright (C) 2017 Andes Technology 3 * Copyright (C) 2017 Andes Technology
4 * Chih-Mao Chen <cmchen@andestech.com> 4 * Chih-Mao Chen <cmchen@andestech.com>
5 * 5 *
6 * Statically process runtime relocations on RISC-V ELF images 6 * Statically process runtime relocations on RISC-V ELF images
7 * so that it can be directly executed when loaded at LMA 7 * so that it can be directly executed when loaded at LMA
8 * without fixup. Both RV32 and RV64 are supported. 8 * without fixup. Both RV32 and RV64 are supported.
9 */ 9 */
10 10
11 #define CONCAT_IMPL(x, y) x##y 11 #define CONCAT_IMPL(x, y) x##y
12 #define CONCAT(x, y) CONCAT_IMPL(x, y) 12 #define CONCAT(x, y) CONCAT_IMPL(x, y)
13 #define CONCAT3(x, y, z) CONCAT(CONCAT(x, y), z) 13 #define CONCAT3(x, y, z) CONCAT(CONCAT(x, y), z)
14 14
15 #define prelink_bonn CONCAT3(prelink_, PRELINK_BYTEORDER, PRELINK_INC_BITS) 15 #define prelink_bonn CONCAT3(prelink_, PRELINK_BYTEORDER, PRELINK_INC_BITS)
16 #define uintnn_t CONCAT3(uint, PRELINK_INC_BITS, _t) 16 #define uintnn_t CONCAT3(uint, PRELINK_INC_BITS, _t)
17 #define get_offset_bonn CONCAT3(get_offset_, PRELINK_BYTEORDER, PRELINK_INC_BITS) 17 #define get_offset_bonn CONCAT3(get_offset_, PRELINK_BYTEORDER, PRELINK_INC_BITS)
18 #define Elf_Ehdr CONCAT3(Elf, PRELINK_INC_BITS, _Ehdr) 18 #define Elf_Ehdr CONCAT3(Elf, PRELINK_INC_BITS, _Ehdr)
19 #define Elf_Phdr CONCAT3(Elf, PRELINK_INC_BITS, _Phdr) 19 #define Elf_Phdr CONCAT3(Elf, PRELINK_INC_BITS, _Phdr)
20 #define Elf_Rela CONCAT3(Elf, PRELINK_INC_BITS, _Rela) 20 #define Elf_Rela CONCAT3(Elf, PRELINK_INC_BITS, _Rela)
21 #define Elf_Sym CONCAT3(Elf, PRELINK_INC_BITS, _Sym) 21 #define Elf_Sym CONCAT3(Elf, PRELINK_INC_BITS, _Sym)
22 #define Elf_Dyn CONCAT3(Elf, PRELINK_INC_BITS, _Dyn) 22 #define Elf_Dyn CONCAT3(Elf, PRELINK_INC_BITS, _Dyn)
23 #define Elf_Addr CONCAT3(Elf, PRELINK_INC_BITS, _Addr) 23 #define Elf_Addr CONCAT3(Elf, PRELINK_INC_BITS, _Addr)
24 #define ELF_R_TYPE CONCAT3(ELF, PRELINK_INC_BITS, _R_TYPE) 24 #define ELF_R_TYPE CONCAT3(ELF, PRELINK_INC_BITS, _R_TYPE)
25 #define ELF_R_SYM CONCAT3(ELF, PRELINK_INC_BITS, _R_SYM) 25 #define ELF_R_SYM CONCAT3(ELF, PRELINK_INC_BITS, _R_SYM)
26 #define target16_to_cpu CONCAT(PRELINK_BYTEORDER, 16_to_cpu) 26 #define target16_to_cpu CONCAT(PRELINK_BYTEORDER, 16_to_cpu)
27 #define target32_to_cpu CONCAT(PRELINK_BYTEORDER, 32_to_cpu) 27 #define target32_to_cpu CONCAT(PRELINK_BYTEORDER, 32_to_cpu)
28 #define target64_to_cpu CONCAT(PRELINK_BYTEORDER, 64_to_cpu) 28 #define target64_to_cpu CONCAT(PRELINK_BYTEORDER, 64_to_cpu)
29 #define targetnn_to_cpu CONCAT3(PRELINK_BYTEORDER, PRELINK_INC_BITS, _to_cpu) 29 #define targetnn_to_cpu CONCAT3(PRELINK_BYTEORDER, PRELINK_INC_BITS, _to_cpu)
30 #define cpu_to_target32 CONCAT3(cpu_to_, PRELINK_BYTEORDER, 32)
31 #define cpu_to_target64 CONCAT3(cpu_to_, PRELINK_BYTEORDER, 64)
30 32
31 static void* get_offset_bonn (void* data, Elf_Phdr* phdrs, size_t phnum, Elf_Addr addr) 33 static void* get_offset_bonn (void* data, Elf_Phdr* phdrs, size_t phnum, Elf_Addr addr)
32 { 34 {
33 Elf_Phdr *p; 35 Elf_Phdr *p;
34 36
35 for (p = phdrs; p < phdrs + phnum; ++p) 37 for (p = phdrs; p < phdrs + phnum; ++p)
36 if (targetnn_to_cpu(p->p_vaddr) <= addr && targetnn_to_cpu(p->p_vaddr) + targetnn_to_cpu(p->p_memsz) > addr) 38 if (targetnn_to_cpu(p->p_vaddr) <= addr && targetnn_to_cpu(p->p_vaddr) + targetnn_to_cpu(p->p_memsz) > addr)
37 return data + targetnn_to_cpu(p->p_offset) + (addr - targetnn_to_cpu(p->p_vaddr)); 39 return data + targetnn_to_cpu(p->p_offset) + (addr - targetnn_to_cpu(p->p_vaddr));
38 40
39 return NULL; 41 return NULL;
40 } 42 }
41 43
42 static void prelink_bonn(void *data) 44 static void prelink_bonn(void *data)
43 { 45 {
44 Elf_Ehdr *ehdr = data; 46 Elf_Ehdr *ehdr = data;
45 Elf_Phdr *p; 47 Elf_Phdr *p;
46 Elf_Dyn *dyn; 48 Elf_Dyn *dyn;
47 Elf_Rela *r; 49 Elf_Rela *r;
48 50
49 if (target16_to_cpu(ehdr->e_machine) != EM_RISCV) 51 if (target16_to_cpu(ehdr->e_machine) != EM_RISCV)
50 die("Machine type is not RISC-V"); 52 die("Machine type is not RISC-V");
51 53
52 Elf_Phdr *phdrs = data + targetnn_to_cpu(ehdr->e_phoff); 54 Elf_Phdr *phdrs = data + targetnn_to_cpu(ehdr->e_phoff);
53 55
54 Elf_Dyn *dyns = NULL; 56 Elf_Dyn *dyns = NULL;
55 for (p = phdrs; p < phdrs + target16_to_cpu(ehdr->e_phnum); ++p) { 57 for (p = phdrs; p < phdrs + target16_to_cpu(ehdr->e_phnum); ++p) {
56 if (target32_to_cpu(p->p_type) == PT_DYNAMIC) { 58 if (target32_to_cpu(p->p_type) == PT_DYNAMIC) {
57 dyns = data + targetnn_to_cpu(p->p_offset); 59 dyns = data + targetnn_to_cpu(p->p_offset);
58 break; 60 break;
59 } 61 }
60 } 62 }
61 63
62 if (dyns == NULL) 64 if (dyns == NULL)
63 die("No dynamic section found"); 65 die("No dynamic section found");
64 66
65 Elf_Rela *rela_dyn = NULL; 67 Elf_Rela *rela_dyn = NULL;
66 size_t rela_count = 0; 68 size_t rela_count = 0;
67 Elf_Sym *dynsym = NULL; 69 Elf_Sym *dynsym = NULL;
68 for (dyn = dyns;; ++dyn) { 70 for (dyn = dyns;; ++dyn) {
69 if (targetnn_to_cpu(dyn->d_tag) == DT_NULL) 71 if (targetnn_to_cpu(dyn->d_tag) == DT_NULL)
70 break; 72 break;
71 else if (targetnn_to_cpu(dyn->d_tag) == DT_RELA) 73 else if (targetnn_to_cpu(dyn->d_tag) == DT_RELA)
72 rela_dyn = get_offset_bonn(data, phdrs, target16_to_cpu(ehdr->e_phnum), + targetnn_to_cpu(dyn->d_un.d_ptr)); 74 rela_dyn = get_offset_bonn(data, phdrs, target16_to_cpu(ehdr->e_phnum), + targetnn_to_cpu(dyn->d_un.d_ptr));
73 else if (targetnn_to_cpu(dyn->d_tag) == DT_RELASZ) 75 else if (targetnn_to_cpu(dyn->d_tag) == DT_RELASZ)
74 rela_count = targetnn_to_cpu(dyn->d_un.d_val) / sizeof(Elf_Rela); 76 rela_count = targetnn_to_cpu(dyn->d_un.d_val) / sizeof(Elf_Rela);
75 else if (targetnn_to_cpu(dyn->d_tag) == DT_SYMTAB) 77 else if (targetnn_to_cpu(dyn->d_tag) == DT_SYMTAB)
76 dynsym = get_offset_bonn(data, phdrs, target16_to_cpu(ehdr->e_phnum), + targetnn_to_cpu(dyn->d_un.d_ptr)); 78 dynsym = get_offset_bonn(data, phdrs, target16_to_cpu(ehdr->e_phnum), + targetnn_to_cpu(dyn->d_un.d_ptr));
77 79
78 } 80 }
79 81
80 if (rela_dyn == NULL) 82 if (rela_dyn == NULL)
81 die("No .rela.dyn found"); 83 die("No .rela.dyn found");
82 84
83 if (dynsym == NULL) 85 if (dynsym == NULL)
84 die("No .dynsym found"); 86 die("No .dynsym found");
85 87
86 for (r = rela_dyn; r < rela_dyn + rela_count; ++r) { 88 for (r = rela_dyn; r < rela_dyn + rela_count; ++r) {
87 void* buf = get_offset_bonn(data, phdrs, target16_to_cpu(ehdr->e_phnum), targetnn_to_cpu(r->r_offset)); 89 void* buf = get_offset_bonn(data, phdrs, target16_to_cpu(ehdr->e_phnum), targetnn_to_cpu(r->r_offset));
88 90
89 if (buf == NULL) 91 if (buf == NULL)
90 continue; 92 continue;
91 93
92 if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_RELATIVE) 94 if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_RELATIVE)
93 *((uintnn_t*) buf) = r->r_addend; 95 *((uintnn_t*) buf) = r->r_addend;
94 else if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_32) 96 else if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_32)
95 *((uint32_t*) buf) = dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value; 97 *((uint32_t*) buf) = cpu_to_target32(targetnn_to_cpu(dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value) + targetnn_to_cpu(r->r_addend));
96 else if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_64) 98 else if (ELF_R_TYPE(targetnn_to_cpu(r->r_info)) == R_RISCV_64)
97 *((uint64_t*) buf) = dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value; 99 *((uint64_t*) buf) = cpu_to_target64(targetnn_to_cpu(dynsym[ELF_R_SYM(targetnn_to_cpu(r->r_info))].st_value) + targetnn_to_cpu(r->r_addend));
98 } 100 }
99 } 101 }
100 102
101 #undef prelink_bonn 103 #undef prelink_bonn
102 #undef uintnn_t 104 #undef uintnn_t
103 #undef get_offset_bonn 105 #undef get_offset_bonn
104 #undef Elf_Ehdr 106 #undef Elf_Ehdr
105 #undef Elf_Phdr 107 #undef Elf_Phdr
106 #undef Elf_Rela 108 #undef Elf_Rela
107 #undef Elf_Sym 109 #undef Elf_Sym
108 #undef Elf_Dyn 110 #undef Elf_Dyn
109 #undef Elf_Addr 111 #undef Elf_Addr
110 #undef ELF_R_TYPE 112 #undef ELF_R_TYPE
111 #undef ELF_R_SYM 113 #undef ELF_R_SYM
112 #undef target16_to_cpu 114 #undef target16_to_cpu
113 #undef target32_to_cpu 115 #undef target32_to_cpu
114 #undef target64_to_cpu 116 #undef target64_to_cpu
115 #undef targetnn_to_cpu 117 #undef targetnn_to_cpu
118 #undef cpu_to_target32
119 #undef cpu_to_target64
116 120
117 #undef CONCAT_IMPL 121 #undef CONCAT_IMPL
118 #undef CONCAT 122 #undef CONCAT
119 #undef CONCAT3 123 #undef CONCAT3
120 124