Eric Lee / smarc-uboot

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Commit 7377647a3678c50c1913f05d8ad8d685b05e52d1

Authored by Peter Chubb
Committed by Joe Hershberger
1 parent c86ff7fdb2

rtl8169: fix cache misalignment message on transmit. 

The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb <peter.chubb@data61.csiro.au>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

Showing 1 changed file with 2 additions and 1 deletions Side-by-side Diff

drivers/net/rtl8169.c
Diff comments   View file @ 7377647
... ... @@ -629,10 +629,11 @@
629 629 /* point to the current txb incase multiple tx_rings are used */
630 630 ptxb = tpc->Tx_skbuff[entry * MAX_ETH_FRAME_SIZE];
631 631 memcpy(ptxb, (char *)packet, (int)length);
632   - rtl_flush_buffer(ptxb, length);
633 632  
634 633 while (len < ETH_ZLEN)
635 634 ptxb[len++] = '\0';
  635 +
  636 + rtl_flush_buffer(ptxb, ALIGN(len, RTL8169_ALIGN));
636 637  
637 638 tpc->TxDescArray[entry].buf_Haddr = 0;
638 639 #ifdef CONFIG_DM_ETH