Commit 746f985add5244c00a5dbb19bc67ceab52566a91

Authored by Sergey Temerkhanov
Committed by Tom Rini
1 parent 1674bd1a77

armv8: cavium: Add ThunderX 88xx board definition

This commit adds basic Cavium ThunderX 88xx board definitions and support.

Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
[trini: Drop CONFIG_SYS_GENERIC_BOARD define]
Signed-off-by: Tom Rini <trini@konsulko.com>

Showing 8 changed files with 290 additions and 2 deletions Side-by-side Diff

... ... @@ -716,6 +716,10 @@
716 716 select CPU_V7
717 717 select DM
718 718  
  719 +config TARGET_THUNDERX_88XX
  720 + bool "Support ThunderX 88xx"
  721 + select OF_CONTROL
  722 +
719 723 endchoice
720 724  
721 725 source "arch/arm/mach-at91/Kconfig"
... ... @@ -784,6 +788,7 @@
784 788 source "board/broadcom/bcm28155_ap/Kconfig"
785 789 source "board/broadcom/bcmcygnus/Kconfig"
786 790 source "board/broadcom/bcmnsp/Kconfig"
  791 +source "board/cavium/thunderx/Kconfig"
787 792 source "board/cirrus/edb93xx/Kconfig"
788 793 source "board/compulab/cm_t335/Kconfig"
789 794 source "board/compulab/cm_t43/Kconfig"
arch/arm/dts/thunderx-88xx.dtsi
... ... @@ -348,7 +348,7 @@
348 348 interrupts = <1 21 4>;
349 349 clocks = <&refclk50mhz>;
350 350 clock-names = "apb_pclk";
351   - flags = <1>;
  351 + uboot,skip-init;
352 352 };
353 353  
354 354 uaa1: serial@87e0,25000000 {
... ... @@ -357,7 +357,7 @@
357 357 interrupts = <1 22 4>;
358 358 clocks = <&refclk50mhz>;
359 359 clock-names = "apb_pclk";
360   - flags = <1>;
  360 + uboot,skip-init;
361 361 };
362 362 };
363 363 };
board/cavium/thunderx/Kconfig
  1 +if TARGET_THUNDERX_88XX
  2 +
  3 +config SYS_CPU
  4 + string
  5 + default "armv8"
  6 +
  7 +config SYS_BOARD
  8 + string
  9 + default "thunderx"
  10 +
  11 +config SYS_VENDOR
  12 + string
  13 + default "cavium"
  14 +
  15 +config SYS_CONFIG_NAME
  16 + string
  17 + default "thunderx_88xx"
  18 +
  19 +config CMD_ATF
  20 + bool "Enable ATF query commands"
  21 + default y
  22 + help
  23 + Enable vendor specific ATF query commands such as SPI and SD/MMC
  24 + devices access, low level environment query, boot device layout
  25 + and node count.
  26 +
  27 +endif
board/cavium/thunderx/MAINTAINERS
  1 +THUNDERX BOARD
  2 +M: Sergey Temerkhanov <s.temerkhanov@gmail.com>
  3 +S: Maintained
  4 +F: board/cavium/thunderx/
  5 +F: include/configs/thunderx_88xx.h
  6 +F: configs/thunderx_88xx_defconfig
board/cavium/thunderx/Makefile
  1 +#
  2 +#
  3 +# (C) Copyright 2014, Cavium Inc.
  4 +#
  5 +# SPDX-License-Identifier: GPL-2.0+
  6 +#
  7 +
  8 +obj-y := thunderx.o
board/cavium/thunderx/thunderx.c
  1 +/**
  2 + * (C) Copyright 2014, Cavium Inc.
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 +**/
  6 +
  7 +#include <common.h>
  8 +#include <malloc.h>
  9 +#include <errno.h>
  10 +#include <linux/compiler.h>
  11 +
  12 +#if !CONFIG_IS_ENABLED(OF_CONTROL)
  13 +#include <dm/platdata.h>
  14 +#include <dm/platform_data/serial_pl01x.h>
  15 +
  16 +static const struct pl01x_serial_platdata serial0 = {
  17 + .base = CONFIG_SYS_SERIAL0,
  18 + .type = TYPE_PL011,
  19 + .clock = 0,
  20 + .skip_init = true,
  21 +};
  22 +
  23 +U_BOOT_DEVICE(thunderx_serial0) = {
  24 + .name = "serial_pl01x",
  25 + .platdata = &serial0,
  26 +};
  27 +
  28 +static const struct pl01x_serial_platdata serial1 = {
  29 + .base = CONFIG_SYS_SERIAL1,
  30 + .type = TYPE_PL011,
  31 + .clock = 0,
  32 + .skip_init = true,
  33 +};
  34 +
  35 +U_BOOT_DEVICE(thunderx_serial1) = {
  36 + .name = "serial_pl01x",
  37 + .platdata = &serial1,
  38 +};
  39 +#endif
  40 +
  41 +DECLARE_GLOBAL_DATA_PTR;
  42 +
  43 +int board_init(void)
  44 +{
  45 + return 0;
  46 +}
  47 +
  48 +int timer_init(void)
  49 +{
  50 + return 0;
  51 +}
  52 +
  53 +/*
  54 + * Board specific reset that is system reset.
  55 + */
  56 +void reset_cpu(ulong addr)
  57 +{
  58 +}
  59 +
  60 +/*
  61 + * Board specific ethernet initialization routine.
  62 + */
  63 +int board_eth_init(bd_t *bis)
  64 +{
  65 + int rc = 0;
  66 +
  67 + return rc;
  68 +}
  69 +
  70 +#ifdef CONFIG_PCI
  71 +void pci_init_board(void)
  72 +{
  73 + printf("DEBUG: PCI Init TODO *****\n");
  74 +}
  75 +#endif
configs/thunderx_88xx_defconfig
  1 +CONFIG_ARM=y
  2 +CONFIG_TARGET_THUNDERX_88XX=y
  3 +CONFIG_DM_SERIAL=y
  4 +CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx"
  5 +CONFIG_SYS_EXTRA_OPTIONS="ARM64"
  6 +CONFIG_HUSH_PARSER=y
  7 +CONFIG_SYS_PROMPT="ThunderX_88XX> "
  8 +# CONFIG_CMD_IMLS is not set
  9 +# CONFIG_CMD_EXPORTENV is not set
  10 +# CONFIG_CMD_IMPORTENV is not set
  11 +# CONFIG_CMD_EDITENV is not set
  12 +# CONFIG_CMD_SAVEENV is not set
  13 +# CONFIG_CMD_ENV_EXISTS is not set
  14 +# CONFIG_CMD_FLASH is not set
  15 +# CONFIG_CMD_FPGA is not set
  16 +# CONFIG_CMD_NET is not set
  17 +# CONFIG_CMD_NFS is not set
  18 +CONFIG_DM=y
  19 +CONFIG_DEBUG_UART=y
  20 +CONFIG_DEBUG_UART_PL011=y
  21 +CONFIG_DEBUG_UART_BASE=0x87e024000000
  22 +CONFIG_DEBUG_UART_CLOCK=24000000
  23 +CONFIG_DEBUG_UART_SKIP_INIT=y
  24 +CONFIG_REGEX=y
include/configs/thunderx_88xx.h
  1 +/**
  2 + * (C) Copyright 2014, Cavium Inc.
  3 + *
  4 + * SPDX-License-Identifier: GPL-2.0+
  5 +**/
  6 +
  7 +#ifndef __THUNDERX_88XX_H__
  8 +#define __THUNDERX_88XX_H__
  9 +
  10 +#define CONFIG_REMAKE_ELF
  11 +
  12 +#define CONFIG_THUNDERX
  13 +
  14 +#define CONFIG_SYS_64BIT
  15 +
  16 +#define CONFIG_SYS_NO_FLASH
  17 +
  18 +
  19 +#define CONFIG_IDENT_STRING \
  20 + " for Cavium Thunder CN88XX ARM v8 Multi-Core"
  21 +#define CONFIG_BOOTP_VCI_STRING "Diagnostics"
  22 +
  23 +#define MEM_BASE 0x00500000
  24 +
  25 +#define CONFIG_COREID_MASK 0xffffff
  26 +
  27 +#define CONFIG_SYS_FULL_VA
  28 +
  29 +#define CONFIG_SYS_MEM_MAP {{0x000000000000UL, 0x40000000000UL, \
  30 + PTL2_MEMTYPE(MT_NORMAL) | \
  31 + PTL2_BLOCK_NON_SHARE}, \
  32 + {0x800000000000UL, 0x40000000000UL, \
  33 + PTL2_MEMTYPE(MT_DEVICE_NGNRNE) | \
  34 + PTL2_BLOCK_NON_SHARE}, \
  35 + {0x840000000000UL, 0x40000000000UL, \
  36 + PTL2_MEMTYPE(MT_DEVICE_NGNRNE) | \
  37 + PTL2_BLOCK_NON_SHARE}, \
  38 + }
  39 +
  40 +#define CONFIG_SYS_MEM_MAP_SIZE 3
  41 +
  42 +#define CONFIG_SYS_VA_BITS 48
  43 +#define CONFIG_SYS_PTL2_BITS 42
  44 +#define CONFIG_SYS_BLOCK_SHIFT 29
  45 +#define CONFIG_SYS_PTL1_ENTRIES 64
  46 +#define CONFIG_SYS_PTL2_ENTRIES 8192
  47 +
  48 +#define CONFIG_SYS_PGTABLE_SIZE \
  49 + ((CONFIG_SYS_PTL1_ENTRIES + \
  50 + CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8)
  51 +#define CONFIG_SYS_TCR_EL1_IPS_BITS (5UL << 32)
  52 +#define CONFIG_SYS_TCR_EL2_IPS_BITS (5 << 16)
  53 +#define CONFIG_SYS_TCR_EL3_IPS_BITS (5 << 16)
  54 +
  55 +/* Link Definitions */
  56 +#define CONFIG_SYS_TEXT_BASE 0x00500000
  57 +#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  58 +
  59 +/* Flat Device Tree Definitions */
  60 +#define CONFIG_OF_LIBFDT
  61 +
  62 +/* SMP Spin Table Definitions */
  63 +#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  64 +
  65 +
  66 +/* Generic Timer Definitions */
  67 +#define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
  68 +
  69 +
  70 +#define CONFIG_SYS_MEMTEST_START MEM_BASE
  71 +#define CONFIG_SYS_MEMTEST_END (MEM_BASE + PHYS_SDRAM_1_SIZE)
  72 +
  73 +/* Size of malloc() pool */
  74 +#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024)
  75 +
  76 +/* PL011 Serial Configuration */
  77 +
  78 +#define CONFIG_PL01X_SERIAL
  79 +#define CONFIG_PL011_CLOCK 24000000
  80 +#define CONFIG_CONS_INDEX 1
  81 +
  82 +/* Generic Interrupt Controller Definitions */
  83 +#define GICD_BASE (0x801000000000)
  84 +#define GICR_BASE (0x801000002000)
  85 +#define CONFIG_SYS_SERIAL0 0x87e024000000
  86 +#define CONFIG_SYS_SERIAL1 0x87e025000000
  87 +
  88 +#define CONFIG_BAUDRATE 115200
  89 +
  90 +/* Command line configuration */
  91 +#define CONFIG_MENU
  92 +
  93 +/* BOOTP options */
  94 +#define CONFIG_BOOTP_BOOTFILESIZE
  95 +#define CONFIG_BOOTP_BOOTPATH
  96 +#define CONFIG_BOOTP_GATEWAY
  97 +#define CONFIG_BOOTP_HOSTNAME
  98 +#define CONFIG_BOOTP_PXE
  99 +#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
  100 +
  101 +/* Miscellaneous configurable options */
  102 +#define CONFIG_SYS_LOAD_ADDR (MEM_BASE)
  103 +
  104 +/* Physical Memory Map */
  105 +#define CONFIG_NR_DRAM_BANKS 1
  106 +#define PHYS_SDRAM_1 (MEM_BASE) /* SDRAM Bank #1 */
  107 +#define PHYS_SDRAM_1_SIZE (0x80000000-MEM_BASE) /* 2048 MB */
  108 +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  109 +
  110 +/* Initial environment variables */
  111 +#define UBOOT_IMG_HEAD_SIZE 0x40
  112 +/* C80000 - 0x40 */
  113 +#define CONFIG_EXTRA_ENV_SETTINGS \
  114 + "kernel_addr=08007ffc0\0" \
  115 + "fdt_addr=0x94C00000\0" \
  116 + "fdt_high=0x9fffffff\0"
  117 +
  118 +#define CONFIG_BOOTARGS \
  119 + "console=ttyAMA0,115200n8 " \
  120 + "earlycon=pl011,0x87e024000000 " \
  121 + "debug maxcpus=48 rootwait rw "\
  122 + "root=/dev/sda2 coherent_pool=16M"
  123 +#define CONFIG_BOOTDELAY 5
  124 +
  125 +/* Do not preserve environment */
  126 +#define CONFIG_ENV_IS_NOWHERE 1
  127 +#define CONFIG_ENV_SIZE 0x1000
  128 +
  129 +/* Monitor Command Prompt */
  130 +#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  131 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  132 + sizeof(CONFIG_SYS_PROMPT) + 16)
  133 +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  134 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  135 +#define CONFIG_SYS_LONGHELP
  136 +#define CONFIG_CMDLINE_EDITING 1
  137 +#define CONFIG_SYS_MAXARGS 64 /* max command args */
  138 +#define CONFIG_NO_RELOCATION 1
  139 +#define CONFIG_LIB_RAND
  140 +#define PLL_REF_CLK 50000000 /* 50 MHz */
  141 +#define NS_PER_REF_CLK_TICK (1000000000/PLL_REF_CLK)
  142 +
  143 +#endif /* __THUNDERX_88XX_H__ */