Eric Lee / smarc-uboot

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Commit 7499ae1d3ce97ceecd9ad9d050953ceee055fea8

Authored by Eric Lee
1 parent cd9622e039
Exists in smarc-8m-p9.0.0_2.0.0_ga

Make changes for hardware rev. 00E0

Showing 2 changed files with 12 additions and 9 deletions Side-by-side Diff

arch/arm/dts/fsl-smarcimx8mq.dts
Diff comments   View file @ 7499ae1
... ... @@ -152,8 +152,8 @@
152 152 fsl,pins = <
153 153 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x79
154 154 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x79
155   - MX8MQ_IOMUXC_ECSPI2_MOSI_GPIO5_IO11 0x19 /* RTS */
156   - MX8MQ_IOMUXC_ECSPI2_SCLK_GPIO5_IO10 0x19 /* CTS */
  155 + MX8MQ_IOMUXC_UART4_TXD_UART2_DCE_RTS_B 0x79 /* RTS */
  156 + MX8MQ_IOMUXC_UART4_RXD_UART2_DCE_CTS_B 0x79 /* CTS */
157 157  
158 158 >;
159 159 };
... ... @@ -167,8 +167,10 @@
167 167  
168 168 pinctrl_uart4: uart4grp {
169 169 fsl,pins = <
170   - MX8MQ_IOMUXC_UART4_RXD_UART4_DCE_RX 0x79
171   - MX8MQ_IOMUXC_UART4_TXD_UART4_DCE_TX 0x79
  170 + MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x79
  171 + MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x79
  172 + MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x79 /* RTS */
  173 + MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x79 /* CTS */
172 174 >;
173 175 };
174 176  
... ... @@ -393,7 +395,6 @@
393 395 vgen6_reg: vgen6 {
394 396 regulator-min-microvolt = <1800000>;
395 397 regulator-max-microvolt = <3300000>;
396   - regulator-always-on;
397 398 };
398 399 };
399 400 };
... ... @@ -584,7 +585,7 @@
584 585 pinctrl-names = "default";
585 586 pinctrl-0 = <&pinctrl_uart3>;
586 587 assigned-clocks = <&clk IMX8MQ_CLK_UART3_SRC>;
587   - assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
  588 + assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
588 589 status = "okay";
589 590 };
590 591  
board/embedian/smarcimx8mq/smarcimx8mq.c
Diff comments   View file @ 7499ae1
... ... @@ -80,6 +80,8 @@
80 80 static iomux_v3_cfg_t const uart2_pads[] = {
81 81 IMX8MQ_PAD_UART2_RXD__UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
82 82 IMX8MQ_PAD_UART2_TXD__UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  83 + IMX8MQ_PAD_UART4_TXD__UART2_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
  84 + IMX8MQ_PAD_UART4_RXD__UART2_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
83 85 };
84 86 #endif
85 87  
86 88  
... ... @@ -92,10 +94,10 @@
92 94  
93 95 #ifdef CONFIG_CONSOLE_SER0
94 96 static iomux_v3_cfg_t const uart4_pads[] = {
95   - IMX8MQ_PAD_UART4_RXD__UART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  97 + IMX8MQ_PAD_ECSPI2_SCLK__UART4_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  98 + IMX8MQ_PAD_ECSPI2_MOSI__UART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
96 99 IMX8MQ_PAD_ECSPI2_SS0__UART4_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
97 100 IMX8MQ_PAD_ECSPI2_MISO__UART4_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
98   - IMX8MQ_PAD_UART4_TXD__UART4_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
99 101 };
100 102 #endif
101 103  
... ... @@ -116,7 +118,7 @@
116 118 IMX8MQ_PAD_NAND_CLE__GPIO3_IO5 | MUX_PAD_CTRL(WEAK_PULLUP), /*S146, PCIE_WAKE*/
117 119 IMX8MQ_PAD_GPIO1_IO09__GPIO1_IO9 | MUX_PAD_CTRL(WEAK_PULLUP), /*S148, LID#*/
118 120 IMX8MQ_PAD_GPIO1_IO12__GPIO1_IO12 | MUX_PAD_CTRL(WEAK_PULLUP), /*S149, SLEEP#*/
119   - IMX8MQ_PAD_GPIO1_IO01__GPIO1_IO1 | MUX_PAD_CTRL(WEAK_PULLUP), /*S151, CHARGING#*/
  121 + IMX8MQ_PAD_NAND_DATA05__GPIO3_IO11 | MUX_PAD_CTRL(WEAK_PULLUP), /*S151, CHARGING#*/
120 122 IMX8MQ_PAD_SAI2_RXC__GPIO4_IO22 | MUX_PAD_CTRL(WEAK_PULLUP), /*S152, CHARGER_PRSNT#*/
121 123 IMX8MQ_PAD_SAI3_MCLK__GPIO5_IO2 | MUX_PAD_CTRL(WEAK_PULLUP), /*S153, CARRIER_STBY#*/
122 124 IMX8MQ_PAD_SAI2_RXFS__GPIO4_IO21 | MUX_PAD_CTRL(WEAK_PULLUP), /*S156, BATLOW#*/