Commit 753fc2ebf98a5112fd1dea4ea0806548c741beaf
Committed by
Albert ARIBAUD
Albert ARIBAUD
1 parent
a4adedd439
Exists in
master
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54 other branches
MX5: mx51evk: make use of GPIO framework
Signed-off-by: Stefano Babic <sbabic@denx.de>
Showing 2 changed files with 6 additions and 13 deletions Side-by-side Diff
board/freescale/mx51evk/mx51evk.c
| ... | ... | @@ -22,6 +22,7 @@ |
| 22 | 22 | |
| 23 | 23 | #include <common.h> |
| 24 | 24 | #include <asm/io.h> |
| 25 | +#include <asm/gpio.h> | |
| 25 | 26 | #include <asm/arch/imx-regs.h> |
| 26 | 27 | #include <asm/arch/mx5x_pins.h> |
| 27 | 28 | #include <asm/arch/iomux.h> |
| ... | ... | @@ -180,7 +181,6 @@ |
| 180 | 181 | static void power_init(void) |
| 181 | 182 | { |
| 182 | 183 | unsigned int val; |
| 183 | - unsigned int reg; | |
| 184 | 184 | struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; |
| 185 | 185 | |
| 186 | 186 | /* Write needed to Power Gate 2 register */ |
| 187 | 187 | |
| ... | ... | @@ -249,14 +249,8 @@ |
| 249 | 249 | pmic_reg_write(REG_MODE_1, val); |
| 250 | 250 | udelay(200); |
| 251 | 251 | |
| 252 | - reg = readl(GPIO2_BASE_ADDR + 0x0); | |
| 253 | - reg &= ~0x4000; /* Lower reset line */ | |
| 254 | - writel(reg, GPIO2_BASE_ADDR + 0x0); | |
| 252 | + gpio_direction_output(46, 0); | |
| 255 | 253 | |
| 256 | - reg = readl(GPIO2_BASE_ADDR + 0x4); | |
| 257 | - reg |= 0x4000; /* configure GPIO lines as output */ | |
| 258 | - writel(reg, GPIO2_BASE_ADDR + 0x4); | |
| 259 | - | |
| 260 | 254 | /* Reset the ethernet controller over GPIO */ |
| 261 | 255 | writel(0x1, IOMUXC_BASE_ADDR + 0x0AC); |
| 262 | 256 | |
| ... | ... | @@ -267,9 +261,7 @@ |
| 267 | 261 | |
| 268 | 262 | udelay(500); |
| 269 | 263 | |
| 270 | - reg = readl(GPIO2_BASE_ADDR + 0x0); | |
| 271 | - reg |= 0x4000; | |
| 272 | - writel(reg, GPIO2_BASE_ADDR + 0x0); | |
| 264 | + gpio_set_value(46, 1); | |
| 273 | 265 | } |
| 274 | 266 | |
| 275 | 267 | #ifdef CONFIG_FSL_ESDHC |
| 276 | 268 | |
| ... | ... | @@ -278,9 +270,9 @@ |
| 278 | 270 | struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv; |
| 279 | 271 | |
| 280 | 272 | if (cfg->esdhc_base == MMC_SDHC1_BASE_ADDR) |
| 281 | - *cd = readl(GPIO1_BASE_ADDR) & 0x01; | |
| 273 | + *cd = gpio_get_value(0); | |
| 282 | 274 | else |
| 283 | - *cd = readl(GPIO1_BASE_ADDR) & 0x40; | |
| 275 | + *cd = gpio_get_value(6); | |
| 284 | 276 | |
| 285 | 277 | return 0; |
| 286 | 278 | } |