Commit 754613f740368f847a2261c5c41b034ff5c51b1c
Committed by
Nobuhiro Iwamatsu
1 parent
9a1e3e9fe3
sh: Add trigger_address_error and support cpu reset
This add support cpu reset by trigger_address_error function. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Showing 4 changed files with 27 additions and 2 deletions Side-by-side Diff
arch/sh/cpu/sh2/watchdog.c
1 | 1 | /* |
2 | - * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhoro@renesas.com> | |
3 | - * Copyright (C) 2008 Renesas Solutions Corp. | |
2 | + * Copyright (C) 2008,2010 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | |
3 | + * Copyright (C) 2008,2010 Renesas Solutions Corp. | |
4 | 4 | * |
5 | 5 | * This program is free software; you can redistribute it and/or |
6 | 6 | * modify it under the terms of the GNU General Public License as |
... | ... | @@ -20,6 +20,7 @@ |
20 | 20 | |
21 | 21 | #include <common.h> |
22 | 22 | #include <asm/processor.h> |
23 | +#include <asm/system.h> | |
23 | 24 | |
24 | 25 | int watchdog_init(void) |
25 | 26 | { |
... | ... | @@ -28,6 +29,9 @@ |
28 | 29 | |
29 | 30 | void reset_cpu(unsigned long ignored) |
30 | 31 | { |
32 | + /* Address error with SR.BL=1 first. */ | |
33 | + trigger_address_error(); | |
34 | + | |
31 | 35 | while (1) |
32 | 36 | ; |
33 | 37 | } |
arch/sh/cpu/sh3/watchdog.c
1 | 1 | /* |
2 | + * (C) Copyright 2010 | |
3 | + * Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | |
4 | + * | |
2 | 5 | * (C) Copyright 2007 |
3 | 6 | * Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
4 | 7 | * |
... | ... | @@ -20,6 +23,7 @@ |
20 | 23 | |
21 | 24 | #include <common.h> |
22 | 25 | #include <asm/processor.h> |
26 | +#include <asm/system.h> | |
23 | 27 | |
24 | 28 | int watchdog_init(void) |
25 | 29 | { |
... | ... | @@ -28,6 +32,9 @@ |
28 | 32 | |
29 | 33 | void reset_cpu(unsigned long ignored) |
30 | 34 | { |
35 | + /* Address error with SR.BL=1 first. */ | |
36 | + trigger_address_error(); | |
37 | + | |
31 | 38 | while (1) |
32 | 39 | ; |
33 | 40 | } |
arch/sh/cpu/sh4/watchdog.c
... | ... | @@ -17,6 +17,7 @@ |
17 | 17 | |
18 | 18 | #include <common.h> |
19 | 19 | #include <asm/processor.h> |
20 | +#include <asm/system.h> | |
20 | 21 | #include <asm/io.h> |
21 | 22 | |
22 | 23 | #define WDT_BASE WTCNT |
... | ... | @@ -66,6 +67,9 @@ |
66 | 67 | |
67 | 68 | void reset_cpu(unsigned long ignored) |
68 | 69 | { |
70 | + /* Address error with SR.BL=1 first. */ | |
71 | + trigger_address_error(); | |
72 | + | |
69 | 73 | while (1) |
70 | 74 | ; |
71 | 75 | } |
arch/sh/include/asm/system.h
... | ... | @@ -272,5 +272,15 @@ |
272 | 272 | |
273 | 273 | #define arch_align_stack(x) (x) |
274 | 274 | |
275 | +static inline void trigger_address_error(void) | |
276 | +{ | |
277 | + __asm__ __volatile__ ( | |
278 | + "ldc %0, sr\n\t" | |
279 | + "mov.l @%1, %0" | |
280 | + : | |
281 | + : "r" (0x10000000), "r" (0x80000001) | |
282 | + ); | |
283 | +} | |
284 | + | |
275 | 285 | #endif |