Eric Lee / smarc-uboot | Embedian Git Server

Commit 763754549fa818d74c41e9e325e76fd881b42269

Authored by Grazvydas Ignotas 2015-04-09 07:14:33 +0800

Committed by Tom Rini 2015-04-10 04:49:37 +0800

Exists in v2017.01-smarct4x and in 37 other branches

omap3: pandora: use common configuration

This allows to clean up the config a good deal and also converts
pandora to Generic Board.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>

Showing 1 changed file with 36 additions and 141 deletions Inline Diff

include/configs/omap3_pandora.h

include/configs/omap3_pandora.h

Diff comments View file @ 7637545

1	/*	1	/*
2	* (C) Copyright 2008-2010	2	* (C) Copyright 2008-2010
3	* Gražvydas Ignotas <notasas@gmail.com>	3	* Gražvydas Ignotas <notasas@gmail.com>
4	*	4	*
5	* Configuration settings for the OMAP3 Pandora.	5	* Configuration settings for the OMAP3 Pandora.
6	*	6	*
7	* SPDX-License-Identifier: GPL-2.0+	7	* SPDX-License-Identifier: GPL-2.0+
8	*/	8	*/
9		9
10	#ifndef __CONFIG_H	10	#ifndef __CONFIG_H
11	#define __CONFIG_H	11	#define __CONFIG_H
12		12
13	/*	13	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
14	* High Level Configuration Options	14	#define CONFIG_NAND
15	*/
16	#define CONFIG_OMAP 1 /* in a TI OMAP core */
17	#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
18	#define CONFIG_OMAP_GPIO
19	#define CONFIG_OMAP_COMMON
20	/* Common ARM Erratas */
21	#define CONFIG_ARM_ERRATA_454179
22	#define CONFIG_ARM_ERRATA_430973
23	#define CONFIG_ARM_ERRATA_621766
24		15
25	#define CONFIG_SDRC /* The chip has SDRC controller */	16	/* override base for compatibility with MLO the device ships with */
		17	#define CONFIG_SYS_TEXT_BASE 0x80008000
26		18
27	#include <asm/arch/cpu.h> /* get chip and board defs */	19	#include <configs/ti_omap3_common.h>
28	#include <asm/arch/omap.h>
29		20
30	/*	21	/*
31	* Display CPU and Board information	22	* Display CPU and Board information
32	*/	23	*/
33	#define CONFIG_DISPLAY_CPUINFO 1	24	#define CONFIG_DISPLAY_CPUINFO 1
34	#define CONFIG_DISPLAY_BOARDINFO 1	25	#define CONFIG_DISPLAY_BOARDINFO 1
35		26
36	/* Clock Defines */
37	#define V_OSCK 26000000 /* Clock output from T2 */
38	#define V_SCLK (V_OSCK >> 1)
39
40	#define CONFIG_MISC_INIT_R	27	#define CONFIG_MISC_INIT_R
41
42	#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43	#define CONFIG_SETUP_MEMORY_TAGS 1
44	#define CONFIG_INITRD_TAG 1
45	#define CONFIG_REVISION_TAG 1	28	#define CONFIG_REVISION_TAG 1
46		29
47	#define CONFIG_OF_LIBFDT 1
48
49	/*
50	* Size of malloc() pool
51	*/
52	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */	30	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
53	#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
54		31
		32	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
		33	#define CONFIG_SYS_DEVICE_NULLDEV 1
		34
55	/*	35	/*
56	* Hardware drivers	36	* Hardware drivers
57	*/	37	*/
58		38
59	#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1	39	/* I2C Support */
60	#define CONFIG_SYS_DEVICE_NULLDEV 1	40	#define CONFIG_SYS_I2C_OMAP34XX
61		41
62	/* USB */	42	/* TWL4030 LED */
63	#define CONFIG_MUSB_UDC 1	43	#define CONFIG_TWL4030_LED
64	#define CONFIG_USB_OMAP3 1
65	#define CONFIG_TWL4030_USB 1
66		44
67	/* USB device configuration */	45	/* Initialize GPIOs by default */
68	#define CONFIG_USB_DEVICE 1	46	#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
69	#define CONFIG_USB_TTY 1	47	#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
70		48
71	/*	49	/*
72	* NS16550 Configuration	50	* NS16550 Configuration
73	*/	51	*/
74	#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */	52	#undef CONFIG_OMAP_SERIAL
75
76	#define CONFIG_SYS_NS16550
77	#define CONFIG_SYS_NS16550_SERIAL	53	#define CONFIG_SYS_NS16550_SERIAL
78	#define CONFIG_SYS_NS16550_REG_SIZE (-4)	54	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
79	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK	55	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
80
81	/*
82	* select serial console configuration
83	*/
84	#define CONFIG_CONS_INDEX 3
85	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3	56	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
86	#define CONFIG_SERIAL3 3	57	#define CONFIG_SERIAL3 3
87		58
88	/* allow to overwrite serial and ethaddr */
89	#define CONFIG_ENV_OVERWRITE
90	#define CONFIG_BAUDRATE 115200
91	#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
92	115200}
93	#define CONFIG_GENERIC_MMC 1
94	#define CONFIG_MMC 1
95	#define CONFIG_OMAP_HSMMC 1
96	#define CONFIG_DOS_PARTITION 1
97
98	/* commands to include */	59	/* commands to include */
99	#include <config_cmd_default.h>	60	#include <config_cmd_default.h>
100		61
101	#define CONFIG_CMD_EXT2 /* EXT2 Support */
102	#define CONFIG_CMD_FAT /* FAT support */
103
104	#define CONFIG_CMD_I2C /* I2C serial bus support */
105	#define CONFIG_CMD_MMC /* MMC support */
106	#define CONFIG_CMD_NAND /* NAND support */
107	#define CONFIG_CMD_CACHE /* Cache control */	62	#define CONFIG_CMD_CACHE /* Cache control */
108
109	#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */	63	#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
110	#undef CONFIG_CMD_FPGA /* FPGA configuration Support */	64	#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
111	#undef CONFIG_CMD_IMI /* iminfo */	65	#undef CONFIG_CMD_IMI /* iminfo */
112	#undef CONFIG_CMD_IMLS /* List all found images */	66	#undef CONFIG_CMD_IMLS /* List all found images */
113	#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */	67	#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
114	#undef CONFIG_CMD_NFS /* NFS support */	68	#undef CONFIG_CMD_NFS /* NFS support */
115		69
116	#define CONFIG_SYS_NO_FLASH
117	#define CONFIG_SYS_I2C
118	#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
119	#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
120	#define CONFIG_SYS_I2C_OMAP34XX
121
122	/*	70	/*
123	* TWL4030
124	*/
125	#define CONFIG_TWL4030_POWER 1
126	#define CONFIG_TWL4030_LED 1
127
128	/*
129	* Board NAND Info.	71	* Board NAND Info.
130	*/	72	*/
131	#define CONFIG_NAND_OMAP_GPMC
132	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */	73	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
133	/* to access nand */	74	/* to access nand */
134	#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */	75	#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
135	/* to access nand */	76	#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
136	/* at CS0 */	77	#define CONFIG_SYS_NAND_PAGE_SIZE 2048
137	#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */	78	#define CONFIG_SYS_NAND_OOBSIZE 64
138	/* devices */
139		79
140	#ifdef CONFIG_CMD_NAND	80	#ifdef CONFIG_NAND
141	#define CONFIG_CMD_MTDPARTS	81	#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
142	#define CONFIG_MTD_PARTITIONS	82	#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
143	#define CONFIG_MTD_DEVICE
144	#define CONFIG_CMD_UBI
145	#define CONFIG_CMD_UBIFS
146	#define CONFIG_RBTREE
147	#define CONFIG_LZO
148		83
149	#define MTDIDS_DEFAULT "nand0=nand"	84	#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
150	#define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\	85	#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
		86
		87	#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
		88
		89	#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
		90	#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader),"\
151	"1920k(uboot),128k(uboot-env),"\	91	"1920k(uboot),128k(uboot-env),"\
152	"10m(boot),-(rootfs)"	92	"10m(boot),-(rootfs)"
153	#else	93	#else
154	#define MTDPARTS_DEFAULT	94	#define MTDPARTS_DEFAULT
155	#endif	95	#endif
156		96
157	/* Environment information */
158	#define CONFIG_BOOTDELAY 1
159
160	#define CONFIG_EXTRA_ENV_SETTINGS \	97	#define CONFIG_EXTRA_ENV_SETTINGS \
		98	DEFAULT_LINUX_BOOT_ENV \
161	"usbtty=cdc_acm\0" \	99	"usbtty=cdc_acm\0" \
162	"loadaddr=0x82000000\0" \
163	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \	100	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
164	"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \	101	"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
165	"mtdparts=" MTDPARTS_DEFAULT "\0" \	102	"mtdparts=" MTDPARTS_DEFAULT "\0" \
166		103
167	#define CONFIG_BOOTCOMMAND \	104	#define CONFIG_BOOTCOMMAND \
168	"if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr \|\| " \	105	"if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.scr \|\| " \
169	"ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \	106	"ext2load mmc1 0 ${loadaddr} autoboot.scr; then " \
170	"source ${loadaddr}; " \	107	"source ${loadaddr}; " \
171	"fi; " \	108	"fi; " \
172	"ubi part boot && ubifsmount ubi:boot && " \	109	"ubi part boot && ubifsmount ubi:boot && " \
173	"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"	110	"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
174		111
175	#define CONFIG_AUTO_COMPLETE 1
176	/*	112	/*
177	* Miscellaneous configurable options	113	* Miscellaneous configurable options
178	*/	114	*/
179	#define CONFIG_SYS_LONGHELP /* undef to save memory */	115	#undef CONFIG_SYS_PROMPT
180	#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
181	#define CONFIG_SYS_PROMPT "Pandora # "	116	#define CONFIG_SYS_PROMPT "Pandora # "
182	#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */	117
183	/* Print Buffer Size */
184	#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
185	sizeof(CONFIG_SYS_PROMPT) + 16)
186	#define CONFIG_SYS_MAXARGS 16 /* max number of command */
187	/* args */
188	/* Boot Argument Buffer Size */
189	#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
190	/* memtest works on */	118	/* memtest works on */
191	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)	119	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
192	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \	120	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
193	0x01F00000) /* 31MB */	121	0x01F00000) /* 31MB */
194		122
195	#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */	123	#if defined(CONFIG_NAND)
196	/* address */
197
198	/*
199	* OMAP3 has 12 GP timers, they can be driven by the system clock
200	* (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
201	* This rate is divided by a local divisor.
202	*/
203	#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
204	#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
205
206	/*-----------------------------------------------------------------------
207	* Physical Memory Map
208	*/
209	#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
210	#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
211	#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
212
213	#define CONFIG_SYS_TEXT_BASE 0x80008000
214	#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
215	#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
216	#define CONFIG_SYS_INIT_RAM_SIZE 0x800
217	#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
218	CONFIG_SYS_INIT_RAM_SIZE - \
219	GENERATED_GBL_DATA_SIZE)
220
221	/*-----------------------------------------------------------------------
222	* FLASH and environment organization
223	*/
224
225	/* ** PISMO SUPPORT * */
226	#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
227
228	#if defined(CONFIG_CMD_NAND)
229	#define CONFIG_SYS_FLASH_BASE NAND_BASE	124	#define CONFIG_SYS_FLASH_BASE NAND_BASE
230	#endif	125	#endif
231		126
232	/* Monitor at start of flash */	127	/* Monitor at start of flash */
233	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE	128	#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
234		129
235	#define CONFIG_ENV_IS_IN_NAND 1	130	#define CONFIG_ENV_IS_IN_NAND 1