omap3: pandora: use common configuration

This allows to clean up the config a good deal and also converts pandora to Generic Board. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>

omap3: pandora: use common configuration
This allows to clean up the config a good deal and also converts pandora to Generic Board. Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Grazvydas Ignotas · Tom Rini
1 parent 18094e322b
Showing 1 changed file with 36 additions and 141 deletions Side-by-side Diff
include/configs/omap3_pandora.h
@@ -10,22 +10,13 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
  
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP		1	/* in a TI OMAP core */
-#define CONFIG_OMAP3_PANDORA	1	/* working with pandora */
-#define CONFIG_OMAP_GPIO
-#define CONFIG_OMAP_COMMON
-/* Common ARM Erratas */
-#define CONFIG_ARM_ERRATA_454179
-#define CONFIG_ARM_ERRATA_430973
-#define CONFIG_ARM_ERRATA_621766
+#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
+#define CONFIG_NAND
  
-#define CONFIG_SDRC	/* The chip has SDRC controller */
+/* override base for compatibility with MLO the device ships with */
+#define CONFIG_SYS_TEXT_BASE		0x80008000
  
-#include <asm/arch/cpu.h>	/* get chip and board defs */
-#include <asm/arch/omap.h>
+#include <configs/ti_omap3_common.h>
  
 /*
  * Display CPU and Board information
  
  
  
  
  
  
  
  
  
  
  
  
@@ -33,79 +24,42 @@
 #define CONFIG_DISPLAY_CPUINFO		1
 #define CONFIG_DISPLAY_BOARDINFO	1
  
-/* Clock Defines */
-#define V_OSCK			26000000	/* Clock output from T2 */
-#define V_SCLK			(V_OSCK >> 1)
-
 #define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG		1	/* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS	1
-#define CONFIG_INITRD_TAG		1
 #define CONFIG_REVISION_TAG		1
  
-#define CONFIG_OF_LIBFDT		1
-
-/*
- * Size of malloc() pool
- */
 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
-#define CONFIG_SYS_MALLOC_LEN		(1024 * 1024 + CONFIG_ENV_SIZE)
  
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
+#define CONFIG_SYS_DEVICE_NULLDEV	1
+
 /*
  * Hardware drivers
  */
  
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
-#define CONFIG_SYS_DEVICE_NULLDEV	1
+/* I2C Support */
+#define CONFIG_SYS_I2C_OMAP34XX
  
-/* USB */
-#define CONFIG_MUSB_UDC			1
-#define CONFIG_USB_OMAP3		1
-#define CONFIG_TWL4030_USB		1
+/* TWL4030 LED */
+#define CONFIG_TWL4030_LED
  
-/* USB device configuration */
-#define CONFIG_USB_DEVICE		1
-#define CONFIG_USB_TTY			1
+/* Initialize GPIOs by default */
+#define CONFIG_OMAP3_GPIO_4	/* GPIO96..127 is in GPIO Bank 4 */
+#define CONFIG_OMAP3_GPIO_6	/* GPIO160..191 is in GPIO Bank 6 */
  
 /*
  * NS16550 Configuration
  */
-#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550
+#undef CONFIG_OMAP_SERIAL
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
-
-/*
- * select serial console configuration
- */
-#define CONFIG_CONS_INDEX		3
 #define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
 #define CONFIG_SERIAL3			3
  
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE			115200
-#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600, \
-					115200}
-#define CONFIG_GENERIC_MMC		1
-#define CONFIG_MMC			1
-#define CONFIG_OMAP_HSMMC		1
-#define CONFIG_DOS_PARTITION		1
-
 /* commands to include */
 #include <config_cmd_default.h>
  
-#define CONFIG_CMD_EXT2		/* EXT2 Support			*/
-#define CONFIG_CMD_FAT		/* FAT support			*/
-
-#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
-#define CONFIG_CMD_MMC		/* MMC support			*/
-#define CONFIG_CMD_NAND		/* NAND support			*/
 #define CONFIG_CMD_CACHE	/* Cache control		*/
-
 #undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
 #undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
 #undef CONFIG_CMD_IMI		/* iminfo			*/
  
  
  
  
  
  
  
  
@@ -113,53 +67,36 @@
 #undef CONFIG_CMD_NET		/* bootp, tftpboot, rarpboot	*/
 #undef CONFIG_CMD_NFS		/* NFS support			*/
  
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_I2C
-#define CONFIG_SYS_OMAP24_I2C_SPEED	100000
-#define CONFIG_SYS_OMAP24_I2C_SLAVE	1
-#define CONFIG_SYS_I2C_OMAP34XX
-
 /*
- * TWL4030
- */
-#define CONFIG_TWL4030_POWER		1
-#define CONFIG_TWL4030_LED		1
-
-/*
  * Board NAND Info.
  */
-#define CONFIG_NAND_OMAP_GPMC
 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
 							/* to access nand */
-#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
-							/* to access nand */
-							/* at CS0 */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1	/* Max number of NAND */
-						/* devices */
+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT	16
+#define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_SW
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
  
-#ifdef CONFIG_CMD_NAND
-#define CONFIG_CMD_MTDPARTS
-#define CONFIG_MTD_PARTITIONS
-#define CONFIG_MTD_DEVICE
-#define CONFIG_CMD_UBI
-#define CONFIG_CMD_UBIFS
-#define CONFIG_RBTREE
-#define CONFIG_LZO
+#ifdef CONFIG_NAND
+#define CONFIG_CMD_UBI		/* UBI-formated MTD partition support */
+#define CONFIG_CMD_UBIFS	/* Read-only UBI volume operations */
  
-#define MTDIDS_DEFAULT			"nand0=nand"
-#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(xloader),"\
+#define CONFIG_RBTREE		/* required by CONFIG_CMD_UBI */
+#define CONFIG_LZO		/* required by CONFIG_CMD_UBIFS */
+
+#define CONFIG_MTD_PARTITIONS	/* required for UBI partition support */
+
+#define MTDIDS_DEFAULT			"nand0=omap2-nand.0"
+#define MTDPARTS_DEFAULT		"mtdparts=omap2-nand.0:512k(xloader),"\
 					"1920k(uboot),128k(uboot-env),"\
 					"10m(boot),-(rootfs)"
 #else
 #define MTDPARTS_DEFAULT
 #endif
  
-/* Environment information */
-#define CONFIG_BOOTDELAY		1
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
+	DEFAULT_LINUX_BOOT_ENV \
 	"usbtty=cdc_acm\0" \
-	"loadaddr=0x82000000\0" \
 	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
 		"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
  
  
  
@@ -172,60 +109,18 @@
 	"ubi part boot && ubifsmount ubi:boot && " \
 		"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
  
-#define CONFIG_AUTO_COMPLETE	1
 /*
  * Miscellaneous configurable options
  */
-#define CONFIG_SYS_LONGHELP		/* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
+#undef CONFIG_SYS_PROMPT
 #define CONFIG_SYS_PROMPT		"Pandora # "
-#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
-					sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS		16	/* max number of command */
-						/* args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
+
 /* memtest works on */
 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)
 #define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
 					0x01F00000) /* 31MB */
  
-#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0) /* default load */
-								/* address */
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
-#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
-
-#define CONFIG_SYS_TEXT_BASE		0x80008000
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE	0x800
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
-					CONFIG_SYS_INIT_RAM_SIZE - \
-					GENERATED_GBL_DATA_SIZE)
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-
-/* **** PISMO SUPPORT *** */
-#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
-
-#if defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_NAND)
 #define CONFIG_SYS_FLASH_BASE		NAND_BASE
 #endif
...	...	@@ -10,22 +10,13 @@
10	10	#ifndef __CONFIG_H
11	11	#define __CONFIG_H
12	12
13		-/*
14		- * High Level Configuration Options
15		- */
16		-#define CONFIG_OMAP 1 /* in a TI OMAP core */
17		-#define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
18		-#define CONFIG_OMAP_GPIO
19		-#define CONFIG_OMAP_COMMON
20		-/* Common ARM Erratas */
21		-#define CONFIG_ARM_ERRATA_454179
22		-#define CONFIG_ARM_ERRATA_430973
23		-#define CONFIG_ARM_ERRATA_621766
	13	+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
	14	+#define CONFIG_NAND
24	15
25		-#define CONFIG_SDRC /* The chip has SDRC controller */
	16	+/* override base for compatibility with MLO the device ships with */
	17	+#define CONFIG_SYS_TEXT_BASE 0x80008000
26	18
27		-#include <asm/arch/cpu.h> /* get chip and board defs */
28		-#include <asm/arch/omap.h>
	19	+#include <configs/ti_omap3_common.h>
29	20
30	21	/*
31	22	* Display CPU and Board information
32	23
33	24
34	25
35	26
36	27
37	28
38	29
39	30
40	31
41	32
42	33
43	34
...	...	@@ -33,79 +24,42 @@
33	24	#define CONFIG_DISPLAY_CPUINFO 1
34	25	#define CONFIG_DISPLAY_BOARDINFO 1
35	26
36		-/* Clock Defines */
37		-#define V_OSCK 26000000 /* Clock output from T2 */
38		-#define V_SCLK (V_OSCK >> 1)
39		-
40	27	#define CONFIG_MISC_INIT_R
41		-
42		-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
43		-#define CONFIG_SETUP_MEMORY_TAGS 1
44		-#define CONFIG_INITRD_TAG 1
45	28	#define CONFIG_REVISION_TAG 1
46	29
47		-#define CONFIG_OF_LIBFDT 1
48		-
49		-/*
50		- * Size of malloc() pool
51		- */
52	30	#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
53		-#define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
54	31
	32	+#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
	33	+#define CONFIG_SYS_DEVICE_NULLDEV 1
	34	+
55	35	/*
56	36	* Hardware drivers
57	37	*/
58	38
59		-#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
60		-#define CONFIG_SYS_DEVICE_NULLDEV 1
	39	+/* I2C Support */
	40	+#define CONFIG_SYS_I2C_OMAP34XX
61	41
62		-/* USB */
63		-#define CONFIG_MUSB_UDC 1
64		-#define CONFIG_USB_OMAP3 1
65		-#define CONFIG_TWL4030_USB 1
	42	+/* TWL4030 LED */
	43	+#define CONFIG_TWL4030_LED
66	44
67		-/* USB device configuration */
68		-#define CONFIG_USB_DEVICE 1
69		-#define CONFIG_USB_TTY 1
	45	+/* Initialize GPIOs by default */
	46	+#define CONFIG_OMAP3_GPIO_4 /* GPIO96..127 is in GPIO Bank 4 */
	47	+#define CONFIG_OMAP3_GPIO_6 /* GPIO160..191 is in GPIO Bank 6 */
70	48
71	49	/*
72	50	* NS16550 Configuration
73	51	*/
74		-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
75		-
76		-#define CONFIG_SYS_NS16550
	52	+#undef CONFIG_OMAP_SERIAL
77	53	#define CONFIG_SYS_NS16550_SERIAL
78	54	#define CONFIG_SYS_NS16550_REG_SIZE (-4)
79	55	#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
80		-
81		-/*
82		- * select serial console configuration
83		- */
84		-#define CONFIG_CONS_INDEX 3
85	56	#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
86	57	#define CONFIG_SERIAL3 3
87	58
88		-/* allow to overwrite serial and ethaddr */
89		-#define CONFIG_ENV_OVERWRITE
90		-#define CONFIG_BAUDRATE 115200
91		-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
92		- 115200}
93		-#define CONFIG_GENERIC_MMC 1
94		-#define CONFIG_MMC 1
95		-#define CONFIG_OMAP_HSMMC 1
96		-#define CONFIG_DOS_PARTITION 1
97		-
98	59	/* commands to include */
99	60	#include <config_cmd_default.h>
100	61
101		-#define CONFIG_CMD_EXT2 /* EXT2 Support */
102		-#define CONFIG_CMD_FAT /* FAT support */
103		-
104		-#define CONFIG_CMD_I2C /* I2C serial bus support */
105		-#define CONFIG_CMD_MMC /* MMC support */
106		-#define CONFIG_CMD_NAND /* NAND support */
107	62	#define CONFIG_CMD_CACHE /* Cache control */
108		-
109	63	#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
110	64	#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
111	65	#undef CONFIG_CMD_IMI /* iminfo */
112	66
113	67
114	68
115	69
116	70
117	71
118	72
119	73
...	...	@@ -113,53 +67,36 @@
113	67	#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
114	68	#undef CONFIG_CMD_NFS /* NFS support */
115	69
116		-#define CONFIG_SYS_NO_FLASH
117		-#define CONFIG_SYS_I2C
118		-#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
119		-#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
120		-#define CONFIG_SYS_I2C_OMAP34XX
121		-
122	70	/*
123		- * TWL4030
124		- */
125		-#define CONFIG_TWL4030_POWER 1
126		-#define CONFIG_TWL4030_LED 1
127		-
128		-/*
129	71	* Board NAND Info.
130	72	*/
131		-#define CONFIG_NAND_OMAP_GPMC
132	73	#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
133	74	/* to access nand */
134		-#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
135		- /* to access nand */
136		- /* at CS0 */
137		-#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
138		- /* devices */
	75	+#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
	76	+#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
	77	+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
	78	+#define CONFIG_SYS_NAND_OOBSIZE 64
139	79
140		-#ifdef CONFIG_CMD_NAND
141		-#define CONFIG_CMD_MTDPARTS
142		-#define CONFIG_MTD_PARTITIONS
143		-#define CONFIG_MTD_DEVICE
144		-#define CONFIG_CMD_UBI
145		-#define CONFIG_CMD_UBIFS
146		-#define CONFIG_RBTREE
147		-#define CONFIG_LZO
	80	+#ifdef CONFIG_NAND
	81	+#define CONFIG_CMD_UBI /* UBI-formated MTD partition support */
	82	+#define CONFIG_CMD_UBIFS /* Read-only UBI volume operations */
148	83
149		-#define MTDIDS_DEFAULT "nand0=nand"
150		-#define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
	84	+#define CONFIG_RBTREE /* required by CONFIG_CMD_UBI */
	85	+#define CONFIG_LZO /* required by CONFIG_CMD_UBIFS */
	86	+
	87	+#define CONFIG_MTD_PARTITIONS /* required for UBI partition support */
	88	+
	89	+#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
	90	+#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(xloader),"\
151	91	"1920k(uboot),128k(uboot-env),"\
152	92	"10m(boot),-(rootfs)"
153	93	#else
154	94	#define MTDPARTS_DEFAULT
155	95	#endif
156	96
157		-/* Environment information */
158		-#define CONFIG_BOOTDELAY 1
159		-
160	97	#define CONFIG_EXTRA_ENV_SETTINGS \
	98	+ DEFAULT_LINUX_BOOT_ENV \
161	99	"usbtty=cdc_acm\0" \
162		- "loadaddr=0x82000000\0" \
163	100	"bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
164	101	"rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K\0" \
165	102	"mtdparts=" MTDPARTS_DEFAULT "\0" \
166	103
167	104
168	105
...	...	@@ -172,60 +109,18 @@
172	109	"ubi part boot && ubifsmount ubi:boot && " \
173	110	"ubifsload ${loadaddr} uImage && bootm ${loadaddr}"
174	111
175		-#define CONFIG_AUTO_COMPLETE 1
176	112	/*
177	113	* Miscellaneous configurable options
178	114	*/
179		-#define CONFIG_SYS_LONGHELP /* undef to save memory */
180		-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
	115	+#undef CONFIG_SYS_PROMPT
181	116	#define CONFIG_SYS_PROMPT "Pandora # "
182		-#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
183		-/* Print Buffer Size */
184		-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
185		- sizeof(CONFIG_SYS_PROMPT) + 16)
186		-#define CONFIG_SYS_MAXARGS 16 /* max number of command */
187		- /* args */
188		-/* Boot Argument Buffer Size */
189		-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
	117	+
190	118	/* memtest works on */
191	119	#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
192	120	#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
193	121	0x01F00000) /* 31MB */
194	122
195		-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
196		- /* address */
197		-
198		-/*
199		- * OMAP3 has 12 GP timers, they can be driven by the system clock
200		- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
201		- * This rate is divided by a local divisor.
202		- */
203		-#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
204		-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
205		-
206		-/*-----------------------------------------------------------------------
207		- * Physical Memory Map
208		- */
209		-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
210		-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
211		-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
212		-
213		-#define CONFIG_SYS_TEXT_BASE 0x80008000
214		-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
215		-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
216		-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
217		-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
218		- CONFIG_SYS_INIT_RAM_SIZE - \
219		- GENERATED_GBL_DATA_SIZE)
220		-
221		-/*-----------------------------------------------------------------------
222		- * FLASH and environment organization
223		- */
224		-
225		-/* ** PISMO SUPPORT * */
226		-#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
227		-
228		-#if defined(CONFIG_CMD_NAND)
	123	+#if defined(CONFIG_NAND)
229	124	#define CONFIG_SYS_FLASH_BASE NAND_BASE
230	125	#endif
231	126