crypto/fsl: add support for multiple SEC engines initialization

For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>

crypto/fsl: add support for multiple SEC engines initialization
For SoCs that contain multiple SEC engines, each of them needs to be initialized (by means of initializing among others the random number generator). Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Alex Porosanu · York Sun
1 parent 404bf4547e
Showing 4 changed files with 172 additions and 117 deletions Side-by-side Diff
arch/powerpc/cpu/mpc85xx/cpu_init.c
drivers/crypto/fsl/jr.c
drivers/crypto/fsl/jr.h
include/fsl_sec.h
@@ -958,6 +958,15 @@
  
 #ifdef CONFIG_FSL_CAAM
 	sec_init();
+
+#if defined(CONFIG_PPC_C29X)
+	if ((SVR_SOC_VER(svr) == SVR_C292) ||
+	    (SVR_SOC_VER(svr) == SVR_C293))
+		sec_init_idx(1);
+
+	if (SVR_SOC_VER(svr) == SVR_C293)
+		sec_init_idx(2);
+#endif
 #endif
  
 #if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
@@ -19,11 +19,26 @@
 #define CIRC_CNT(head, tail, size)	(((head) - (tail)) & (size - 1))
 #define CIRC_SPACE(head, tail, size)	CIRC_CNT((tail), (head) + 1, (size))
  
-struct jobring jr;
+uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = {
+	0,
+#if defined(CONFIG_PPC_C29X)
+	CONFIG_SYS_FSL_SEC_IDX_OFFSET,
+	2 * CONFIG_SYS_FSL_SEC_IDX_OFFSET
+#endif
+};
  
-static inline void start_jr0(void)
+#define SEC_ADDR(idx)	\
+	((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx]))
+
+#define SEC_JR0_ADDR(idx)	\
+	(SEC_ADDR(idx) +	\
+	 (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
+
+struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC];
+
+static inline void start_jr0(uint8_t sec_idx)
 {
-	ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+	ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
 	u32 ctpr_ms = sec_in32(&sec->ctpr_ms);
 	u32 scfgr = sec_in32(&sec->scfgr);
  
  
  
  
@@ -42,15 +57,15 @@
 	}
 }
  
-static inline void jr_reset_liodn(void)
+static inline void jr_reset_liodn(uint8_t sec_idx)
 {
-	ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+	ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
 	sec_out32(&sec->jrliodnr[0].ls, 0);
 }
  
-static inline void jr_disable_irq(void)
+static inline void jr_disable_irq(uint8_t sec_idx)
 {
-	struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
+	struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx);
 	uint32_t jrcfg = sec_in32(&regs->jrcfg1);
  
 	jrcfg = jrcfg | JR_INTMASK;
  
@@ -58,11 +73,12 @@
 	sec_out32(&regs->jrcfg1, jrcfg);
 }
  
-static void jr_initregs(void)
+static void jr_initregs(uint8_t sec_idx)
 {
-	struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
-	phys_addr_t ip_base = virt_to_phys((void *)jr.input_ring);
-	phys_addr_t op_base = virt_to_phys((void *)jr.output_ring);
+	struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx);
+	struct jobring *jr = &jr0[sec_idx];
+	phys_addr_t ip_base = virt_to_phys((void *)jr->input_ring);
+	phys_addr_t op_base = virt_to_phys((void *)jr->output_ring);
  
 #ifdef CONFIG_PHYS_64BIT
 	sec_out32(&regs->irba_h, ip_base >> 32);
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
@@ -79,59 +95,63 @@
 	sec_out32(&regs->ors, JR_SIZE);
 	sec_out32(&regs->irs, JR_SIZE);
  
-	if (!jr.irq)
-		jr_disable_irq();
+	if (!jr->irq)
+		jr_disable_irq(sec_idx);
 }
  
-static int jr_init(void)
+static int jr_init(uint8_t sec_idx)
 {
-	memset(&jr, 0, sizeof(struct jobring));
+	struct jobring *jr = &jr0[sec_idx];
  
-	jr.jq_id = DEFAULT_JR_ID;
-	jr.irq = DEFAULT_IRQ;
+	memset(jr, 0, sizeof(struct jobring));
  
+	jr->jq_id = DEFAULT_JR_ID;
+	jr->irq = DEFAULT_IRQ;
+
 #ifdef CONFIG_FSL_CORENET
-	jr.liodn = DEFAULT_JR_LIODN;
+	jr->liodn = DEFAULT_JR_LIODN;
 #endif
-	jr.size = JR_SIZE;
-	jr.input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN,
+	jr->size = JR_SIZE;
+	jr->input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN,
 				JR_SIZE * sizeof(dma_addr_t));
-	if (!jr.input_ring)
+	if (!jr->input_ring)
 		return -1;
  
-	jr.op_size = roundup(JR_SIZE * sizeof(struct op_ring),
-			     ARCH_DMA_MINALIGN);
-	jr.output_ring =
-	    (struct op_ring *)memalign(ARCH_DMA_MINALIGN, jr.op_size);
-	if (!jr.output_ring)
+	jr->op_size = roundup(JR_SIZE * sizeof(struct op_ring),
+			      ARCH_DMA_MINALIGN);
+	jr->output_ring =
+	    (struct op_ring *)memalign(ARCH_DMA_MINALIGN, jr->op_size);
+	if (!jr->output_ring)
 		return -1;
  
-	memset(jr.input_ring, 0, JR_SIZE * sizeof(dma_addr_t));
-	memset(jr.output_ring, 0, jr.op_size);
+	memset(jr->input_ring, 0, JR_SIZE * sizeof(dma_addr_t));
+	memset(jr->output_ring, 0, jr->op_size);
  
-	start_jr0();
+	start_jr0(sec_idx);
  
-	jr_initregs();
+	jr_initregs(sec_idx);
  
 	return 0;
 }
  
-static int jr_sw_cleanup(void)
+static int jr_sw_cleanup(uint8_t sec_idx)
 {
-	jr.head = 0;
-	jr.tail = 0;
-	jr.read_idx = 0;
-	jr.write_idx = 0;
-	memset(jr.info, 0, sizeof(jr.info));
-	memset(jr.input_ring, 0, jr.size * sizeof(dma_addr_t));
-	memset(jr.output_ring, 0, jr.size * sizeof(struct op_ring));
+	struct jobring *jr = &jr0[sec_idx];
  
+	jr->head = 0;
+	jr->tail = 0;
+	jr->read_idx = 0;
+	jr->write_idx = 0;
+	memset(jr->info, 0, sizeof(jr->info));
+	memset(jr->input_ring, 0, jr->size * sizeof(dma_addr_t));
+	memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring));
+
 	return 0;
 }
  
-static int jr_hw_reset(void)
+static int jr_hw_reset(uint8_t sec_idx)
 {
-	struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
+	struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx);
 	uint32_t timeout = 100000;
 	uint32_t jrint, jrcr;
  
  
@@ -161,10 +181,11 @@
 /* -1 --- error, can't enqueue -- no space available */
 static int jr_enqueue(uint32_t *desc_addr,
 	       void (*callback)(uint32_t status, void *arg),
-	       void *arg)
+	       void *arg, uint8_t sec_idx)
 {
-	struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
-	int head = jr.head;
+	struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx);
+	struct jobring *jr = &jr0[sec_idx];
+	int head = jr->head;
 	uint32_t desc_word;
 	int length = desc_len(desc_addr);
 	int i;
  
  
@@ -184,18 +205,14 @@
  
 	phys_addr_t desc_phys_addr = virt_to_phys(desc_addr);
  
-	if (sec_in32(&regs->irsa) == 0 ||
-	    CIRC_SPACE(jr.head, jr.tail, jr.size) <= 0)
-		return -1;
+	jr->info[head].desc_phys_addr = desc_phys_addr;
+	jr->info[head].callback = (void *)callback;
+	jr->info[head].arg = arg;
+	jr->info[head].op_done = 0;
  
-	jr.info[head].desc_phys_addr = desc_phys_addr;
-	jr.info[head].callback = (void *)callback;
-	jr.info[head].arg = arg;
-	jr.info[head].op_done = 0;
-
-	unsigned long start = (unsigned long)&jr.info[head] &
+	unsigned long start = (unsigned long)&jr->info[head] &
 					~(ARCH_DMA_MINALIGN - 1);
-	unsigned long end = ALIGN((unsigned long)&jr.info[head] +
+	unsigned long end = ALIGN((unsigned long)&jr->info[head] +
 				  sizeof(struct jr_info), ARCH_DMA_MINALIGN);
 	flush_dcache_range(start, end);
  
  
@@ -205,11 +222,11 @@
 	 * depend on endianness of SEC block.
 	 */
 #ifdef CONFIG_SYS_FSL_SEC_LE
-	addr_lo = (uint32_t *)(&jr.input_ring[head]);
-	addr_hi = (uint32_t *)(&jr.input_ring[head]) + 1;
+	addr_lo = (uint32_t *)(&jr->input_ring[head]);
+	addr_hi = (uint32_t *)(&jr->input_ring[head]) + 1;
 #elif defined(CONFIG_SYS_FSL_SEC_BE)
-	addr_hi = (uint32_t *)(&jr.input_ring[head]);
-	addr_lo = (uint32_t *)(&jr.input_ring[head]) + 1;
+	addr_hi = (uint32_t *)(&jr->input_ring[head]);
+	addr_lo = (uint32_t *)(&jr->input_ring[head]) + 1;
 #endif /* ifdef CONFIG_SYS_FSL_SEC_LE */
  
 	sec_out32(addr_hi, (uint32_t)(desc_phys_addr >> 32));
  
  
  
  
@@ -217,21 +234,21 @@
  
 #else
 	/* Write the 32 bit Descriptor address on Input Ring. */
-	sec_out32(&jr.input_ring[head], desc_phys_addr);
+	sec_out32(&jr->input_ring[head], desc_phys_addr);
 #endif /* ifdef CONFIG_PHYS_64BIT */
  
-	start = (unsigned long)&jr.input_ring[head] & ~(ARCH_DMA_MINALIGN - 1);
-	end = ALIGN((unsigned long)&jr.input_ring[head] +
+	start = (unsigned long)&jr->input_ring[head] & ~(ARCH_DMA_MINALIGN - 1);
+	end = ALIGN((unsigned long)&jr->input_ring[head] +
 		     sizeof(dma_addr_t), ARCH_DMA_MINALIGN);
 	flush_dcache_range(start, end);
  
-	jr.head = (head + 1) & (jr.size - 1);
+	jr->head = (head + 1) & (jr->size - 1);
  
 	/* Invalidate output ring */
-	start = (unsigned long)jr.output_ring &
+	start = (unsigned long)jr->output_ring &
 					~(ARCH_DMA_MINALIGN - 1);
-	end = ALIGN((unsigned long)jr.output_ring + jr.op_size,
-		     ARCH_DMA_MINALIGN);
+	end = ALIGN((unsigned long)jr->output_ring + jr->op_size,
+		    ARCH_DMA_MINALIGN);
 	invalidate_dcache_range(start, end);
  
 	sec_out32(&regs->irja, 1);
  
@@ -239,11 +256,12 @@
 	return 0;
 }
  
-static int jr_dequeue(void)
+static int jr_dequeue(int sec_idx)
 {
-	struct jr_regs *regs = (struct jr_regs *)CONFIG_SYS_FSL_JR0_ADDR;
-	int head = jr.head;
-	int tail = jr.tail;
+	struct jr_regs *regs = (struct jr_regs *)SEC_JR0_ADDR(sec_idx);
+	struct jobring *jr = &jr0[sec_idx];
+	int head = jr->head;
+	int tail = jr->tail;
 	int idx, i, found;
 	void (*callback)(uint32_t status, void *arg);
 	void *arg = NULL;
@@ -253,7 +271,8 @@
 	uint32_t *addr;
 #endif
  
-	while (sec_in32(&regs->orsf) && CIRC_CNT(jr.head, jr.tail, jr.size)) {
+	while (sec_in32(&regs->orsf) && CIRC_CNT(jr->head, jr->tail,
+						 jr->size)) {
  
 		found = 0;
  
  
@@ -264,11 +283,11 @@
 		 * depend on endianness of SEC block.
 		 */
 	#ifdef CONFIG_SYS_FSL_SEC_LE
-		addr_lo = (uint32_t *)(&jr.output_ring[jr.tail].desc);
-		addr_hi = (uint32_t *)(&jr.output_ring[jr.tail].desc) + 1;
+		addr_lo = (uint32_t *)(&jr->output_ring[jr->tail].desc);
+		addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc) + 1;
 	#elif defined(CONFIG_SYS_FSL_SEC_BE)
-		addr_hi = (uint32_t *)(&jr.output_ring[jr.tail].desc);
-		addr_lo = (uint32_t *)(&jr.output_ring[jr.tail].desc) + 1;
+		addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc);
+		addr_lo = (uint32_t *)(&jr->output_ring[jr->tail].desc) + 1;
 	#endif /* ifdef CONFIG_SYS_FSL_SEC_LE */
  
 		op_desc = ((u64)sec_in32(addr_hi) << 32) |
  
  
@@ -276,15 +295,15 @@
  
 	#else
 		/* Read the 32 bit Descriptor address from Output Ring. */
-		addr = (uint32_t *)&jr.output_ring[jr.tail].desc;
+		addr = (uint32_t *)&jr->output_ring[jr->tail].desc;
 		op_desc = sec_in32(addr);
 	#endif /* ifdef CONFIG_PHYS_64BIT */
  
-		uint32_t status = sec_in32(&jr.output_ring[jr.tail].status);
+		uint32_t status = sec_in32(&jr->output_ring[jr->tail].status);
  
-		for (i = 0; CIRC_CNT(head, tail + i, jr.size) >= 1; i++) {
-			idx = (tail + i) & (jr.size - 1);
-			if (op_desc == jr.info[idx].desc_phys_addr) {
+		for (i = 0; CIRC_CNT(head, tail + i, jr->size) >= 1; i++) {
+			idx = (tail + i) & (jr->size - 1);
+			if (op_desc == jr->info[idx].desc_phys_addr) {
 				found = 1;
 				break;
 			}
@@ -294,9 +313,9 @@
 		if (!found)
 			return -1;
  
-		jr.info[idx].op_done = 1;
-		callback = (void *)jr.info[idx].callback;
-		arg = jr.info[idx].arg;
+		jr->info[idx].op_done = 1;
+		callback = (void *)jr->info[idx].callback;
+		arg = jr->info[idx].arg;
  
 		/* When the job on tail idx gets done, increment
 		 * tail till the point where job completed out of oredr has
  
  
@@ -304,14 +323,14 @@
 		 */
 		if (idx == tail)
 			do {
-				tail = (tail + 1) & (jr.size - 1);
-			} while (jr.info[tail].op_done);
+				tail = (tail + 1) & (jr->size - 1);
+			} while (jr->info[tail].op_done);
  
-		jr.tail = tail;
-		jr.read_idx = (jr.read_idx + 1) & (jr.size - 1);
+		jr->tail = tail;
+		jr->read_idx = (jr->read_idx + 1) & (jr->size - 1);
  
 		sec_out32(&regs->orjr, 1);
-		jr.info[idx].op_done = 0;
+		jr->info[idx].op_done = 0;
  
 		callback(status, arg);
 	}
@@ -327,7 +346,7 @@
 	x->done = 1;
 }
  
-int run_descriptor_jr(uint32_t *desc)
+static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx)
 {
 	unsigned long long timeval = get_ticks();
 	unsigned long long timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
@@ -336,7 +355,7 @@
  
 	memset(&op, 0, sizeof(op));
  
-	ret = jr_enqueue(desc, desc_done, &op);
+	ret = jr_enqueue(desc, desc_done, &op, sec_idx);
 	if (ret) {
 		debug("Error in SEC enq\n");
 		ret = JQ_ENQ_ERR;
@@ -346,7 +365,7 @@
 	timeval = get_ticks();
 	timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
 	while (op.done != 1) {
-		ret = jr_dequeue();
+		ret = jr_dequeue(sec_idx);
 		if (ret) {
 			debug("Error in SEC deq\n");
 			ret = JQ_DEQ_ERR;
  
  
  
  
@@ -368,20 +387,30 @@
 	return ret;
 }
  
-int jr_reset(void)
+int run_descriptor_jr(uint32_t *desc)
 {
-	if (jr_hw_reset() < 0)
+	return run_descriptor_jr_idx(desc, 0);
+}
+
+static inline int jr_reset_sec(uint8_t sec_idx)
+{
+	if (jr_hw_reset(sec_idx) < 0)
 		return -1;
  
 	/* Clean up the jobring structure maintained by software */
-	jr_sw_cleanup();
+	jr_sw_cleanup(sec_idx);
  
 	return 0;
 }
  
-int sec_reset(void)
+int jr_reset(void)
 {
-	ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+	return jr_reset_sec(0);
+}
+
+static inline int sec_reset_idx(uint8_t sec_idx)
+{
+	ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
 	uint32_t mcfgr = sec_in32(&sec->mcfgr);
 	uint32_t timeout = 100000;
  
  
@@ -408,14 +437,13 @@
 	return 0;
 }
  
-static int instantiate_rng(void)
+static int instantiate_rng(uint8_t sec_idx)
 {
 	struct result op;
 	u32 *desc;
 	u32 rdsta_val;
 	int ret = 0;
-	ccsr_sec_t __iomem *sec =
-			(ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
+	ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx);
 	struct rng4tst __iomem *rng =
 			(struct rng4tst __iomem *)&sec->rng;
  
@@ -432,7 +460,7 @@
 	flush_dcache_range((unsigned long)desc,
 			   (unsigned long)desc + size);
  
-	ret = run_descriptor_jr(desc);
+	ret = run_descriptor_jr_idx(desc, sec_idx);
  
 	if (ret)
 		printf("RNG: Instantiation failed with error %x\n", ret);
  
@@ -444,9 +472,14 @@
 	return ret;
 }
  
-static u8 get_rng_vid(void)
+int sec_reset(void)
 {
-	ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+	return sec_reset_idx(0);
+}
+
+static u8 get_rng_vid(uint8_t sec_idx)
+{
+	ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
 	u32 cha_vid = sec_in32(&sec->chavid_ls);
  
 	return (cha_vid & SEC_CHAVID_RNG_LS_MASK) >> SEC_CHAVID_LS_RNG_SHIFT;
  
@@ -456,10 +489,9 @@
  * By default, the TRNG runs for 200 clocks per sample;
  * 1200 clocks per sample generates better entropy.
  */
-static void kick_trng(int ent_delay)
+static void kick_trng(int ent_delay, uint8_t sec_idx)
 {
-	ccsr_sec_t __iomem *sec =
-			(ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
+	ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx);
 	struct rng4tst __iomem *rng =
 			(struct rng4tst __iomem *)&sec->rng;
 	u32 val;
  
@@ -486,11 +518,10 @@
 	sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM);
 }
  
-static int rng_init(void)
+static int rng_init(uint8_t sec_idx)
 {
 	int ret, ent_delay = RTSDCTL_ENT_DLY_MIN;
-	ccsr_sec_t __iomem *sec =
-			(ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
+	ccsr_sec_t __iomem *sec = (ccsr_sec_t __iomem *)SEC_ADDR(sec_idx);
 	struct rng4tst __iomem *rng =
 			(struct rng4tst __iomem *)&sec->rng;
  
@@ -509,7 +540,7 @@
 		 * Also, if a handle was instantiated, do not change
 		 * the TRNG parameters.
 		 */
-		kick_trng(ent_delay);
+		kick_trng(ent_delay, sec_idx);
 		ent_delay += 400;
 		/*
 		 * if instantiate_rng(...) fails, the loop will rerun
@@ -518,7 +549,7 @@
 		 * interval, leading to a sucessful initialization of
 		 * the RNG.
 		 */
-		ret = instantiate_rng();
+		ret = instantiate_rng(sec_idx);
 	} while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
 	if (ret) {
 		printf("RNG: Failed to instantiate RNG\n");
  
@@ -531,9 +562,9 @@
 	return ret;
 }
  
-int sec_init(void)
+int sec_init_idx(uint8_t sec_idx)
 {
-	ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
+	ccsr_sec_t *sec = (void *)SEC_ADDR(sec_idx);
 	uint32_t mcr = sec_in32(&sec->mcfgr);
 	int ret = 0;
  
@@ -543,6 +574,11 @@
 	uint32_t liodn_s;
 #endif
  
+	if (!(sec_idx < CONFIG_SYS_FSL_MAX_NUM_OF_SEC)) {
+		printf("SEC initialization failed\n");
+		return -1;
+	}
+
 	/*
 	 * Modifying CAAM Read/Write Attributes
 	 * For LS2080A
@@ -568,7 +604,7 @@
 	liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT;
 #endif
  
-	ret = jr_init();
+	ret = jr_init(sec_idx);
 	if (ret < 0) {
 		printf("SEC initialization failed\n");
 		return -1;
  
  
@@ -582,14 +618,19 @@
 	pamu_enable();
 #endif
  
-	if (get_rng_vid() >= 4) {
-		if (rng_init() < 0) {
-			printf("RNG instantiation failed\n");
+	if (get_rng_vid(sec_idx) >= 4) {
+		if (rng_init(sec_idx) < 0) {
+			printf("SEC%u: RNG instantiation failed\n", sec_idx);
 			return -1;
 		}
-		printf("SEC: RNG instantiated\n");
+		printf("SEC%u: RNG instantiated\n", sec_idx);
 	}
  
 	return ret;
+}
+
+int sec_init(void)
+{
+	return sec_init_idx(0);
 }
@@ -90,6 +90,9 @@
 	/* This ring can be on the stack */
 	struct jr_info info[JR_SIZE];
 	struct op_ring *output_ring;
+	/* Offset in CCSR to the SEC engine to which this JR belongs */
+	uint32_t sec_offset;
+
 };
  
 struct result {
@@ -294,8 +294,6 @@
  
 #endif
  
-int sec_init(void);
-
 /* blob_dek:
  * Encapsulates the src in a secure blob and stores it dst
  * @src: reference to the plaintext
@@ -305,6 +303,10 @@
  */
 int blob_dek(const u8 *src, u8 *dst, u8 len);
  
+#if defined(CONFIG_PPC_C29X)
+int sec_init_idx(uint8_t);
+#endif
+int sec_init(void);
 #endif
  
 #endif /* __FSL_SEC_H */
...	...	@@ -958,6 +958,15 @@
958	958
959	959	#ifdef CONFIG_FSL_CAAM
960	960	sec_init();
	961	+
	962	+#if defined(CONFIG_PPC_C29X)
	963	+ if ((SVR_SOC_VER(svr) == SVR_C292) \|\|
	964	+ (SVR_SOC_VER(svr) == SVR_C293))
	965	+ sec_init_idx(1);
	966	+
	967	+ if (SVR_SOC_VER(svr) == SVR_C293)
	968	+ sec_init_idx(2);
	969	+#endif
961	970	#endif
962	971
963	972	#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
...	...	@@ -19,11 +19,26 @@
19	19	#define CIRC_CNT(head, tail, size) (((head) - (tail)) & (size - 1))
20	20	#define CIRC_SPACE(head, tail, size) CIRC_CNT((tail), (head) + 1, (size))
21	21
22		-struct jobring jr;
	22	+uint32_t sec_offset[CONFIG_SYS_FSL_MAX_NUM_OF_SEC] = {
	23	+ 0,
	24	+#if defined(CONFIG_PPC_C29X)
	25	+ CONFIG_SYS_FSL_SEC_IDX_OFFSET,
	26	+ 2 * CONFIG_SYS_FSL_SEC_IDX_OFFSET
	27	+#endif
	28	+};
23	29
24		-static inline void start_jr0(void)
	30	+#define SEC_ADDR(idx) \
	31	+ ((CONFIG_SYS_FSL_SEC_ADDR + sec_offset[idx]))
	32	+
	33	+#define SEC_JR0_ADDR(idx) \
	34	+ (SEC_ADDR(idx) + \
	35	+ (CONFIG_SYS_FSL_JR0_OFFSET - CONFIG_SYS_FSL_SEC_OFFSET))
	36	+
	37	+struct jobring jr0[CONFIG_SYS_FSL_MAX_NUM_OF_SEC];
	38	+
	39	+static inline void start_jr0(uint8_t sec_idx)
25	40	{
26		- ccsr_sec_t sec = (void )CONFIG_SYS_FSL_SEC_ADDR;
	41	+ ccsr_sec_t sec = (void )SEC_ADDR(sec_idx);
27	42	u32 ctpr_ms = sec_in32(&sec->ctpr_ms);
28	43	u32 scfgr = sec_in32(&sec->scfgr);
29	44
30	45
31	46
32	47
...	...	@@ -42,15 +57,15 @@
42	57	}
43	58	}
44	59
45		-static inline void jr_reset_liodn(void)
	60	+static inline void jr_reset_liodn(uint8_t sec_idx)
46	61	{
47		- ccsr_sec_t sec = (void )CONFIG_SYS_FSL_SEC_ADDR;
	62	+ ccsr_sec_t sec = (void )SEC_ADDR(sec_idx);
48	63	sec_out32(&sec->jrliodnr[0].ls, 0);
49	64	}
50	65
51		-static inline void jr_disable_irq(void)
	66	+static inline void jr_disable_irq(uint8_t sec_idx)
52	67	{
53		- struct jr_regs regs = (struct jr_regs )CONFIG_SYS_FSL_JR0_ADDR;
	68	+ struct jr_regs regs = (struct jr_regs )SEC_JR0_ADDR(sec_idx);
54	69	uint32_t jrcfg = sec_in32(&regs->jrcfg1);
55	70
56	71	jrcfg = jrcfg \| JR_INTMASK;
57	72
...	...	@@ -58,11 +73,12 @@
58	73	sec_out32(&regs->jrcfg1, jrcfg);
59	74	}
60	75
61		-static void jr_initregs(void)
	76	+static void jr_initregs(uint8_t sec_idx)
62	77	{
63		- struct jr_regs regs = (struct jr_regs )CONFIG_SYS_FSL_JR0_ADDR;
64		- phys_addr_t ip_base = virt_to_phys((void *)jr.input_ring);
65		- phys_addr_t op_base = virt_to_phys((void *)jr.output_ring);
	78	+ struct jr_regs regs = (struct jr_regs )SEC_JR0_ADDR(sec_idx);
	79	+ struct jobring *jr = &jr0[sec_idx];
	80	+ phys_addr_t ip_base = virt_to_phys((void *)jr->input_ring);
	81	+ phys_addr_t op_base = virt_to_phys((void *)jr->output_ring);
66	82
67	83	#ifdef CONFIG_PHYS_64BIT
68	84	sec_out32(&regs->irba_h, ip_base >> 32);
69	85
70	86
71	87
72	88
73	89
74	90
75	91
76	92
77	93
78	94
79	95
80	96
81	97
82	98
83	99
84	100
...	...	@@ -79,59 +95,63 @@
79	95	sec_out32(&regs->ors, JR_SIZE);
80	96	sec_out32(&regs->irs, JR_SIZE);
81	97
82		- if (!jr.irq)
83		- jr_disable_irq();
	98	+ if (!jr->irq)
	99	+ jr_disable_irq(sec_idx);
84	100	}
85	101
86		-static int jr_init(void)
	102	+static int jr_init(uint8_t sec_idx)
87	103	{
88		- memset(&jr, 0, sizeof(struct jobring));
	104	+ struct jobring *jr = &jr0[sec_idx];
89	105
90		- jr.jq_id = DEFAULT_JR_ID;
91		- jr.irq = DEFAULT_IRQ;
	106	+ memset(jr, 0, sizeof(struct jobring));
92	107
	108	+ jr->jq_id = DEFAULT_JR_ID;
	109	+ jr->irq = DEFAULT_IRQ;
	110	+
93	111	#ifdef CONFIG_FSL_CORENET
94		- jr.liodn = DEFAULT_JR_LIODN;
	112	+ jr->liodn = DEFAULT_JR_LIODN;
95	113	#endif
96		- jr.size = JR_SIZE;
97		- jr.input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN,
	114	+ jr->size = JR_SIZE;
	115	+ jr->input_ring = (dma_addr_t *)memalign(ARCH_DMA_MINALIGN,
98	116	JR_SIZE * sizeof(dma_addr_t));
99		- if (!jr.input_ring)
	117	+ if (!jr->input_ring)
100	118	return -1;
101	119
102		- jr.op_size = roundup(JR_SIZE * sizeof(struct op_ring),
103		- ARCH_DMA_MINALIGN);
104		- jr.output_ring =
105		- (struct op_ring *)memalign(ARCH_DMA_MINALIGN, jr.op_size);
106		- if (!jr.output_ring)
	120	+ jr->op_size = roundup(JR_SIZE * sizeof(struct op_ring),
	121	+ ARCH_DMA_MINALIGN);
	122	+ jr->output_ring =
	123	+ (struct op_ring *)memalign(ARCH_DMA_MINALIGN, jr->op_size);
	124	+ if (!jr->output_ring)
107	125	return -1;
108	126
109		- memset(jr.input_ring, 0, JR_SIZE * sizeof(dma_addr_t));
110		- memset(jr.output_ring, 0, jr.op_size);
	127	+ memset(jr->input_ring, 0, JR_SIZE * sizeof(dma_addr_t));
	128	+ memset(jr->output_ring, 0, jr->op_size);
111	129
112		- start_jr0();
	130	+ start_jr0(sec_idx);
113	131
114		- jr_initregs();
	132	+ jr_initregs(sec_idx);
115	133
116	134	return 0;
117	135	}
118	136
119		-static int jr_sw_cleanup(void)
	137	+static int jr_sw_cleanup(uint8_t sec_idx)
120	138	{
121		- jr.head = 0;
122		- jr.tail = 0;
123		- jr.read_idx = 0;
124		- jr.write_idx = 0;
125		- memset(jr.info, 0, sizeof(jr.info));
126		- memset(jr.input_ring, 0, jr.size * sizeof(dma_addr_t));
127		- memset(jr.output_ring, 0, jr.size * sizeof(struct op_ring));
	139	+ struct jobring *jr = &jr0[sec_idx];
128	140
	141	+ jr->head = 0;
	142	+ jr->tail = 0;
	143	+ jr->read_idx = 0;
	144	+ jr->write_idx = 0;
	145	+ memset(jr->info, 0, sizeof(jr->info));
	146	+ memset(jr->input_ring, 0, jr->size * sizeof(dma_addr_t));
	147	+ memset(jr->output_ring, 0, jr->size * sizeof(struct op_ring));
	148	+
129	149	return 0;
130	150	}
131	151
132		-static int jr_hw_reset(void)
	152	+static int jr_hw_reset(uint8_t sec_idx)
133	153	{
134		- struct jr_regs regs = (struct jr_regs )CONFIG_SYS_FSL_JR0_ADDR;
	154	+ struct jr_regs regs = (struct jr_regs )SEC_JR0_ADDR(sec_idx);
135	155	uint32_t timeout = 100000;
136	156	uint32_t jrint, jrcr;
137	157
138	158
...	...	@@ -161,10 +181,11 @@
161	181	/* -1 --- error, can't enqueue -- no space available */
162	182	static int jr_enqueue(uint32_t *desc_addr,
163	183	void (callback)(uint32_t status, void arg),
164		- void *arg)
	184	+ void *arg, uint8_t sec_idx)
165	185	{
166		- struct jr_regs regs = (struct jr_regs )CONFIG_SYS_FSL_JR0_ADDR;
167		- int head = jr.head;
	186	+ struct jr_regs regs = (struct jr_regs )SEC_JR0_ADDR(sec_idx);
	187	+ struct jobring *jr = &jr0[sec_idx];
	188	+ int head = jr->head;
168	189	uint32_t desc_word;
169	190	int length = desc_len(desc_addr);
170	191	int i;
171	192
172	193
...	...	@@ -184,18 +205,14 @@
184	205
185	206	phys_addr_t desc_phys_addr = virt_to_phys(desc_addr);
186	207
187		- if (sec_in32(&regs->irsa) == 0 \|\|
188		- CIRC_SPACE(jr.head, jr.tail, jr.size) <= 0)
189		- return -1;
	208	+ jr->info[head].desc_phys_addr = desc_phys_addr;
	209	+ jr->info[head].callback = (void *)callback;
	210	+ jr->info[head].arg = arg;
	211	+ jr->info[head].op_done = 0;
190	212
191		- jr.info[head].desc_phys_addr = desc_phys_addr;
192		- jr.info[head].callback = (void *)callback;
193		- jr.info[head].arg = arg;
194		- jr.info[head].op_done = 0;
195		-
196		- unsigned long start = (unsigned long)&jr.info[head] &
	213	+ unsigned long start = (unsigned long)&jr->info[head] &
197	214	~(ARCH_DMA_MINALIGN - 1);
198		- unsigned long end = ALIGN((unsigned long)&jr.info[head] +
	215	+ unsigned long end = ALIGN((unsigned long)&jr->info[head] +
199	216	sizeof(struct jr_info), ARCH_DMA_MINALIGN);
200	217	flush_dcache_range(start, end);
201	218
202	219
...	...	@@ -205,11 +222,11 @@
205	222	* depend on endianness of SEC block.
206	223	*/
207	224	#ifdef CONFIG_SYS_FSL_SEC_LE
208		- addr_lo = (uint32_t *)(&jr.input_ring[head]);
209		- addr_hi = (uint32_t *)(&jr.input_ring[head]) + 1;
	225	+ addr_lo = (uint32_t *)(&jr->input_ring[head]);
	226	+ addr_hi = (uint32_t *)(&jr->input_ring[head]) + 1;
210	227	#elif defined(CONFIG_SYS_FSL_SEC_BE)
211		- addr_hi = (uint32_t *)(&jr.input_ring[head]);
212		- addr_lo = (uint32_t *)(&jr.input_ring[head]) + 1;
	228	+ addr_hi = (uint32_t *)(&jr->input_ring[head]);
	229	+ addr_lo = (uint32_t *)(&jr->input_ring[head]) + 1;
213	230	#endif /* ifdef CONFIG_SYS_FSL_SEC_LE */
214	231
215	232	sec_out32(addr_hi, (uint32_t)(desc_phys_addr >> 32));
216	233
217	234
218	235
219	236
...	...	@@ -217,21 +234,21 @@
217	234
218	235	#else
219	236	/* Write the 32 bit Descriptor address on Input Ring. */
220		- sec_out32(&jr.input_ring[head], desc_phys_addr);
	237	+ sec_out32(&jr->input_ring[head], desc_phys_addr);
221	238	#endif /* ifdef CONFIG_PHYS_64BIT */
222	239
223		- start = (unsigned long)&jr.input_ring[head] & ~(ARCH_DMA_MINALIGN - 1);
224		- end = ALIGN((unsigned long)&jr.input_ring[head] +
	240	+ start = (unsigned long)&jr->input_ring[head] & ~(ARCH_DMA_MINALIGN - 1);
	241	+ end = ALIGN((unsigned long)&jr->input_ring[head] +
225	242	sizeof(dma_addr_t), ARCH_DMA_MINALIGN);
226	243	flush_dcache_range(start, end);
227	244
228		- jr.head = (head + 1) & (jr.size - 1);
	245	+ jr->head = (head + 1) & (jr->size - 1);
229	246
230	247	/* Invalidate output ring */
231		- start = (unsigned long)jr.output_ring &
	248	+ start = (unsigned long)jr->output_ring &
232	249	~(ARCH_DMA_MINALIGN - 1);
233		- end = ALIGN((unsigned long)jr.output_ring + jr.op_size,
234		- ARCH_DMA_MINALIGN);
	250	+ end = ALIGN((unsigned long)jr->output_ring + jr->op_size,
	251	+ ARCH_DMA_MINALIGN);
235	252	invalidate_dcache_range(start, end);
236	253
237	254	sec_out32(&regs->irja, 1);
238	255
...	...	@@ -239,11 +256,12 @@
239	256	return 0;
240	257	}
241	258
242		-static int jr_dequeue(void)
	259	+static int jr_dequeue(int sec_idx)
243	260	{
244		- struct jr_regs regs = (struct jr_regs )CONFIG_SYS_FSL_JR0_ADDR;
245		- int head = jr.head;
246		- int tail = jr.tail;
	261	+ struct jr_regs regs = (struct jr_regs )SEC_JR0_ADDR(sec_idx);
	262	+ struct jobring *jr = &jr0[sec_idx];
	263	+ int head = jr->head;
	264	+ int tail = jr->tail;
247	265	int idx, i, found;
248	266	void (callback)(uint32_t status, void arg);
249	267	void *arg = NULL;
...	...	@@ -253,7 +271,8 @@
253	271	uint32_t *addr;
254	272	#endif
255	273
256		- while (sec_in32(&regs->orsf) && CIRC_CNT(jr.head, jr.tail, jr.size)) {
	274	+ while (sec_in32(&regs->orsf) && CIRC_CNT(jr->head, jr->tail,
	275	+ jr->size)) {
257	276
258	277	found = 0;
259	278
260	279
...	...	@@ -264,11 +283,11 @@
264	283	* depend on endianness of SEC block.
265	284	*/
266	285	#ifdef CONFIG_SYS_FSL_SEC_LE
267		- addr_lo = (uint32_t *)(&jr.output_ring[jr.tail].desc);
268		- addr_hi = (uint32_t *)(&jr.output_ring[jr.tail].desc) + 1;
	286	+ addr_lo = (uint32_t *)(&jr->output_ring[jr->tail].desc);
	287	+ addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc) + 1;
269	288	#elif defined(CONFIG_SYS_FSL_SEC_BE)
270		- addr_hi = (uint32_t *)(&jr.output_ring[jr.tail].desc);
271		- addr_lo = (uint32_t *)(&jr.output_ring[jr.tail].desc) + 1;
	289	+ addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc);
	290	+ addr_lo = (uint32_t *)(&jr->output_ring[jr->tail].desc) + 1;
272	291	#endif /* ifdef CONFIG_SYS_FSL_SEC_LE */
273	292
274	293	op_desc = ((u64)sec_in32(addr_hi) << 32) \|
275	294
276	295
...	...	@@ -276,15 +295,15 @@
276	295
277	296	#else
278	297	/* Read the 32 bit Descriptor address from Output Ring. */
279		- addr = (uint32_t *)&jr.output_ring[jr.tail].desc;
	298	+ addr = (uint32_t *)&jr->output_ring[jr->tail].desc;
280	299	op_desc = sec_in32(addr);
281	300	#endif /* ifdef CONFIG_PHYS_64BIT */
282	301
283		- uint32_t status = sec_in32(&jr.output_ring[jr.tail].status);
	302	+ uint32_t status = sec_in32(&jr->output_ring[jr->tail].status);
284	303
285		- for (i = 0; CIRC_CNT(head, tail + i, jr.size) >= 1; i++) {
286		- idx = (tail + i) & (jr.size - 1);
287		- if (op_desc == jr.info[idx].desc_phys_addr) {
	304	+ for (i = 0; CIRC_CNT(head, tail + i, jr->size) >= 1; i++) {
	305	+ idx = (tail + i) & (jr->size - 1);
	306	+ if (op_desc == jr->info[idx].desc_phys_addr) {
288	307	found = 1;
289	308	break;
290	309	}
...	...	@@ -294,9 +313,9 @@
294	313	if (!found)
295	314	return -1;
296	315
297		- jr.info[idx].op_done = 1;
298		- callback = (void *)jr.info[idx].callback;
299		- arg = jr.info[idx].arg;
	316	+ jr->info[idx].op_done = 1;
	317	+ callback = (void *)jr->info[idx].callback;
	318	+ arg = jr->info[idx].arg;
300	319
301	320	/* When the job on tail idx gets done, increment
302	321	* tail till the point where job completed out of oredr has
303	322
304	323
...	...	@@ -304,14 +323,14 @@
304	323	*/
305	324	if (idx == tail)
306	325	do {
307		- tail = (tail + 1) & (jr.size - 1);
308		- } while (jr.info[tail].op_done);
	326	+ tail = (tail + 1) & (jr->size - 1);
	327	+ } while (jr->info[tail].op_done);
309	328
310		- jr.tail = tail;
311		- jr.read_idx = (jr.read_idx + 1) & (jr.size - 1);
	329	+ jr->tail = tail;
	330	+ jr->read_idx = (jr->read_idx + 1) & (jr->size - 1);
312	331
313	332	sec_out32(&regs->orjr, 1);
314		- jr.info[idx].op_done = 0;
	333	+ jr->info[idx].op_done = 0;
315	334
316	335	callback(status, arg);
317	336	}
...	...	@@ -327,7 +346,7 @@
327	346	x->done = 1;
328	347	}
329	348
330		-int run_descriptor_jr(uint32_t *desc)
	349	+static inline int run_descriptor_jr_idx(uint32_t *desc, uint8_t sec_idx)
331	350	{
332	351	unsigned long long timeval = get_ticks();
333	352	unsigned long long timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
...	...	@@ -336,7 +355,7 @@
336	355
337	356	memset(&op, 0, sizeof(op));
338	357
339		- ret = jr_enqueue(desc, desc_done, &op);
	358	+ ret = jr_enqueue(desc, desc_done, &op, sec_idx);
340	359	if (ret) {
341	360	debug("Error in SEC enq\n");
342	361	ret = JQ_ENQ_ERR;
...	...	@@ -346,7 +365,7 @@
346	365	timeval = get_ticks();
347	366	timeout = usec2ticks(CONFIG_SEC_DEQ_TIMEOUT);
348	367	while (op.done != 1) {
349		- ret = jr_dequeue();
	368	+ ret = jr_dequeue(sec_idx);
350	369	if (ret) {
351	370	debug("Error in SEC deq\n");
352	371	ret = JQ_DEQ_ERR;
353	372
354	373
355	374
356	375
...	...	@@ -368,20 +387,30 @@
368	387	return ret;
369	388	}
370	389
371		-int jr_reset(void)
	390	+int run_descriptor_jr(uint32_t *desc)
372	391	{
373		- if (jr_hw_reset() < 0)
	392	+ return run_descriptor_jr_idx(desc, 0);
	393	+}
	394	+
	395	+static inline int jr_reset_sec(uint8_t sec_idx)
	396	+{
	397	+ if (jr_hw_reset(sec_idx) < 0)
374	398	return -1;
375	399
376	400	/* Clean up the jobring structure maintained by software */
377		- jr_sw_cleanup();
	401	+ jr_sw_cleanup(sec_idx);
378	402
379	403	return 0;
380	404	}
381	405
382		-int sec_reset(void)
	406	+int jr_reset(void)
383	407	{
384		- ccsr_sec_t sec = (void )CONFIG_SYS_FSL_SEC_ADDR;
	408	+ return jr_reset_sec(0);
	409	+}
	410	+
	411	+static inline int sec_reset_idx(uint8_t sec_idx)
	412	+{
	413	+ ccsr_sec_t sec = (void )SEC_ADDR(sec_idx);
385	414	uint32_t mcfgr = sec_in32(&sec->mcfgr);
386	415	uint32_t timeout = 100000;
387	416
388	417
...	...	@@ -408,14 +437,13 @@
408	437	return 0;
409	438	}
410	439
411		-static int instantiate_rng(void)
	440	+static int instantiate_rng(uint8_t sec_idx)
412	441	{
413	442	struct result op;
414	443	u32 *desc;
415	444	u32 rdsta_val;
416	445	int ret = 0;
417		- ccsr_sec_t __iomem *sec =
418		- (ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
	446	+ ccsr_sec_t __iomem sec = (ccsr_sec_t __iomem )SEC_ADDR(sec_idx);
419	447	struct rng4tst __iomem *rng =
420	448	(struct rng4tst __iomem *)&sec->rng;
421	449
...	...	@@ -432,7 +460,7 @@
432	460	flush_dcache_range((unsigned long)desc,
433	461	(unsigned long)desc + size);
434	462
435		- ret = run_descriptor_jr(desc);
	463	+ ret = run_descriptor_jr_idx(desc, sec_idx);
436	464
437	465	if (ret)
438	466	printf("RNG: Instantiation failed with error %x\n", ret);
439	467
...	...	@@ -444,9 +472,14 @@
444	472	return ret;
445	473	}
446	474
447		-static u8 get_rng_vid(void)
	475	+int sec_reset(void)
448	476	{
449		- ccsr_sec_t sec = (void )CONFIG_SYS_FSL_SEC_ADDR;
	477	+ return sec_reset_idx(0);
	478	+}
	479	+
	480	+static u8 get_rng_vid(uint8_t sec_idx)
	481	+{
	482	+ ccsr_sec_t sec = (void )SEC_ADDR(sec_idx);
450	483	u32 cha_vid = sec_in32(&sec->chavid_ls);
451	484
452	485	return (cha_vid & SEC_CHAVID_RNG_LS_MASK) >> SEC_CHAVID_LS_RNG_SHIFT;
453	486
...	...	@@ -456,10 +489,9 @@
456	489	* By default, the TRNG runs for 200 clocks per sample;
457	490	* 1200 clocks per sample generates better entropy.
458	491	*/
459		-static void kick_trng(int ent_delay)
	492	+static void kick_trng(int ent_delay, uint8_t sec_idx)
460	493	{
461		- ccsr_sec_t __iomem *sec =
462		- (ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
	494	+ ccsr_sec_t __iomem sec = (ccsr_sec_t __iomem )SEC_ADDR(sec_idx);
463	495	struct rng4tst __iomem *rng =
464	496	(struct rng4tst __iomem *)&sec->rng;
465	497	u32 val;
466	498
...	...	@@ -486,11 +518,10 @@
486	518	sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM);
487	519	}
488	520
489		-static int rng_init(void)
	521	+static int rng_init(uint8_t sec_idx)
490	522	{
491	523	int ret, ent_delay = RTSDCTL_ENT_DLY_MIN;
492		- ccsr_sec_t __iomem *sec =
493		- (ccsr_sec_t __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
	524	+ ccsr_sec_t __iomem sec = (ccsr_sec_t __iomem )SEC_ADDR(sec_idx);
494	525	struct rng4tst __iomem *rng =
495	526	(struct rng4tst __iomem *)&sec->rng;
496	527
...	...	@@ -509,7 +540,7 @@
509	540	* Also, if a handle was instantiated, do not change
510	541	* the TRNG parameters.
511	542	*/
512		- kick_trng(ent_delay);
	543	+ kick_trng(ent_delay, sec_idx);
513	544	ent_delay += 400;
514	545	/*
515	546	* if instantiate_rng(...) fails, the loop will rerun
...	...	@@ -518,7 +549,7 @@
518	549	* interval, leading to a sucessful initialization of
519	550	* the RNG.
520	551	*/
521		- ret = instantiate_rng();
	552	+ ret = instantiate_rng(sec_idx);
522	553	} while ((ret == -1) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
523	554	if (ret) {
524	555	printf("RNG: Failed to instantiate RNG\n");
525	556
...	...	@@ -531,9 +562,9 @@
531	562	return ret;
532	563	}
533	564
534		-int sec_init(void)
	565	+int sec_init_idx(uint8_t sec_idx)
535	566	{
536		- ccsr_sec_t sec = (void )CONFIG_SYS_FSL_SEC_ADDR;
	567	+ ccsr_sec_t sec = (void )SEC_ADDR(sec_idx);
537	568	uint32_t mcr = sec_in32(&sec->mcfgr);
538	569	int ret = 0;
539	570
...	...	@@ -543,6 +574,11 @@
543	574	uint32_t liodn_s;
544	575	#endif
545	576
	577	+ if (!(sec_idx < CONFIG_SYS_FSL_MAX_NUM_OF_SEC)) {
	578	+ printf("SEC initialization failed\n");
	579	+ return -1;
	580	+ }
	581	+
546	582	/*
547	583	* Modifying CAAM Read/Write Attributes
548	584	* For LS2080A
...	...	@@ -568,7 +604,7 @@
568	604	liodn_s = (liodnr & JRSLIODN_MASK) >> JRSLIODN_SHIFT;
569	605	#endif
570	606
571		- ret = jr_init();
	607	+ ret = jr_init(sec_idx);
572	608	if (ret < 0) {
573	609	printf("SEC initialization failed\n");
574	610	return -1;
575	611
576	612
...	...	@@ -582,14 +618,19 @@
582	618	pamu_enable();
583	619	#endif
584	620
585		- if (get_rng_vid() >= 4) {
586		- if (rng_init() < 0) {
587		- printf("RNG instantiation failed\n");
	621	+ if (get_rng_vid(sec_idx) >= 4) {
	622	+ if (rng_init(sec_idx) < 0) {
	623	+ printf("SEC%u: RNG instantiation failed\n", sec_idx);
588	624	return -1;
589	625	}
590		- printf("SEC: RNG instantiated\n");
	626	+ printf("SEC%u: RNG instantiated\n", sec_idx);
591	627	}
592	628
593	629	return ret;
	630	+}
	631	+
	632	+int sec_init(void)
	633	+{
	634	+ return sec_init_idx(0);
594	635	}
...	...	@@ -90,6 +90,9 @@
90	90	/* This ring can be on the stack */
91	91	struct jr_info info[JR_SIZE];
92	92	struct op_ring *output_ring;
	93	+ /* Offset in CCSR to the SEC engine to which this JR belongs */
	94	+ uint32_t sec_offset;
	95	+
93	96	};
94	97
95	98	struct result {
...	...	@@ -294,8 +294,6 @@
294	294
295	295	#endif
296	296
297		-int sec_init(void);
298		-
299	297	/* blob_dek:
300	298	* Encapsulates the src in a secure blob and stores it dst
301	299	* @src: reference to the plaintext
...	...	@@ -305,6 +303,10 @@
305	303	*/
306	304	int blob_dek(const u8 src, u8 dst, u8 len);
307	305
	306	+#if defined(CONFIG_PPC_C29X)
	307	+int sec_init_idx(uint8_t);
	308	+#endif
	309	+int sec_init(void);
308	310	#endif
309	311
310	312	#endif /* __FSL_SEC_H */