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Commit 7653fc288a964ce5bb0cff9176444260731d0f90

Authored by Stefan Agner
Committed by Scott Wood
1 parent 004a1fdb45
Exists in v2017.01-smarct4x and in 37 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, imx_v2015.04_4.1.15_1.0.0_ga, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2015.04_4.1.15_1.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, ti-u-boot-2015.07, v2015.07-smarct33, v2015.07-smarct33-emmc, v2015.07-smarct4x, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

mtd: vf610_nfc: mark page as dirty on block erase 

The driver tries to re-use the page buffer by storing the page
number of the current page in the buffer. The page is only read
if the requested page number is not currently in the buffer. When
a block is erased, the page number is marked as invalid if the
erased page equals the one currently in the cache. However, since
a erase block consists of multiple pages, also other page numbers
could be affected.

The commands to reproduce this issue (on a written page):
> nand dump 0x800
> nand erase 0x0 0x20000
> nand dump 0x800

The second nand dump command returns the data from the buffer,
while in fact the page is erased (0xff).

Avoid the hassle to calculate whether the page is affected or not,
but set the page buffer unconditionally to invalid instead.

Signed-off-by: Stefan Agner <stefan@agner.ch>

Showing 1 changed file with 1 additions and 2 deletions Inline Diff

drivers/mtd/nand/vf610_nfc.c
Diff comments   View file @ 7653fc2
1 /* 1 /*
2 * Copyright 2009-2014 Freescale Semiconductor, Inc. and others 2 * Copyright 2009-2014 Freescale Semiconductor, Inc. and others
3 * 3 *
4 * Description: MPC5125, VF610, MCF54418 and Kinetis K70 Nand driver. 4 * Description: MPC5125, VF610, MCF54418 and Kinetis K70 Nand driver.
5 * Ported to U-Boot by Stefan Agner 5 * Ported to U-Boot by Stefan Agner
6 * Based on RFC driver posted on Kernel Mailing list by Bill Pringlemeir 6 * Based on RFC driver posted on Kernel Mailing list by Bill Pringlemeir
7 * Jason ported to M54418TWR and MVFA5. 7 * Jason ported to M54418TWR and MVFA5.
8 * Authors: Stefan Agner <stefan.agner@toradex.com> 8 * Authors: Stefan Agner <stefan.agner@toradex.com>
9 * Bill Pringlemeir <bpringlemeir@nbsps.com> 9 * Bill Pringlemeir <bpringlemeir@nbsps.com>
10 * Shaohui Xie <b21989@freescale.com> 10 * Shaohui Xie <b21989@freescale.com>
11 * Jason Jin <Jason.jin@freescale.com> 11 * Jason Jin <Jason.jin@freescale.com>
12 * 12 *
13 * Based on original driver mpc5121_nfc.c. 13 * Based on original driver mpc5121_nfc.c.
14 * 14 *
15 * This is free software; you can redistribute it and/or modify it 15 * This is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by 16 * under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or 17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version. 18 * (at your option) any later version.
19 * 19 *
20 * Limitations: 20 * Limitations:
21 * - Untested on MPC5125 and M54418. 21 * - Untested on MPC5125 and M54418.
22 * - DMA not used. 22 * - DMA not used.
23 * - 2K pages or less. 23 * - 2K pages or less.
24 * - Only 2K page w. 64+OOB and hardware ECC. 24 * - Only 2K page w. 64+OOB and hardware ECC.
25 */ 25 */
26 26
27 #include <common.h> 27 #include <common.h>
28 #include <malloc.h> 28 #include <malloc.h>
29 29
30 #include <linux/mtd/mtd.h> 30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/nand.h> 31 #include <linux/mtd/nand.h>
32 #include <linux/mtd/partitions.h> 32 #include <linux/mtd/partitions.h>
33 33
34 #include <nand.h> 34 #include <nand.h>
35 #include <errno.h> 35 #include <errno.h>
36 #include <asm/io.h> 36 #include <asm/io.h>
37 37
38 /* Register Offsets */ 38 /* Register Offsets */
39 #define NFC_FLASH_CMD1 0x3F00 39 #define NFC_FLASH_CMD1 0x3F00
40 #define NFC_FLASH_CMD2 0x3F04 40 #define NFC_FLASH_CMD2 0x3F04
41 #define NFC_COL_ADDR 0x3F08 41 #define NFC_COL_ADDR 0x3F08
42 #define NFC_ROW_ADDR 0x3F0c 42 #define NFC_ROW_ADDR 0x3F0c
43 #define NFC_ROW_ADDR_INC 0x3F14 43 #define NFC_ROW_ADDR_INC 0x3F14
44 #define NFC_FLASH_STATUS1 0x3F18 44 #define NFC_FLASH_STATUS1 0x3F18
45 #define NFC_FLASH_STATUS2 0x3F1c 45 #define NFC_FLASH_STATUS2 0x3F1c
46 #define NFC_CACHE_SWAP 0x3F28 46 #define NFC_CACHE_SWAP 0x3F28
47 #define NFC_SECTOR_SIZE 0x3F2c 47 #define NFC_SECTOR_SIZE 0x3F2c
48 #define NFC_FLASH_CONFIG 0x3F30 48 #define NFC_FLASH_CONFIG 0x3F30
49 #define NFC_IRQ_STATUS 0x3F38 49 #define NFC_IRQ_STATUS 0x3F38
50 50
51 /* Addresses for NFC MAIN RAM BUFFER areas */ 51 /* Addresses for NFC MAIN RAM BUFFER areas */
52 #define NFC_MAIN_AREA(n) ((n) * 0x1000) 52 #define NFC_MAIN_AREA(n) ((n) * 0x1000)
53 53
54 #define PAGE_2K 0x0800 54 #define PAGE_2K 0x0800
55 #define OOB_64 0x0040 55 #define OOB_64 0x0040
56 56
57 /* 57 /*
58 * NFC_CMD2[CODE] values. See section: 58 * NFC_CMD2[CODE] values. See section:
59 * - 31.4.7 Flash Command Code Description, Vybrid manual 59 * - 31.4.7 Flash Command Code Description, Vybrid manual
60 * - 23.8.6 Flash Command Sequencer, MPC5125 manual 60 * - 23.8.6 Flash Command Sequencer, MPC5125 manual
61 * 61 *
62 * Briefly these are bitmasks of controller cycles. 62 * Briefly these are bitmasks of controller cycles.
63 */ 63 */
64 #define READ_PAGE_CMD_CODE 0x7EE0 64 #define READ_PAGE_CMD_CODE 0x7EE0
65 #define PROGRAM_PAGE_CMD_CODE 0x7FC0 65 #define PROGRAM_PAGE_CMD_CODE 0x7FC0
66 #define ERASE_CMD_CODE 0x4EC0 66 #define ERASE_CMD_CODE 0x4EC0
67 #define READ_ID_CMD_CODE 0x4804 67 #define READ_ID_CMD_CODE 0x4804
68 #define RESET_CMD_CODE 0x4040 68 #define RESET_CMD_CODE 0x4040
69 #define STATUS_READ_CMD_CODE 0x4068 69 #define STATUS_READ_CMD_CODE 0x4068
70 70
71 /* NFC ECC mode define */ 71 /* NFC ECC mode define */
72 #define ECC_BYPASS 0 72 #define ECC_BYPASS 0
73 #define ECC_45_BYTE 6 73 #define ECC_45_BYTE 6
74 74
75 /*** Register Mask and bit definitions */ 75 /*** Register Mask and bit definitions */
76 76
77 /* NFC_FLASH_CMD1 Field */ 77 /* NFC_FLASH_CMD1 Field */
78 #define CMD_BYTE2_MASK 0xFF000000 78 #define CMD_BYTE2_MASK 0xFF000000
79 #define CMD_BYTE2_SHIFT 24 79 #define CMD_BYTE2_SHIFT 24
80 80
81 /* NFC_FLASH_CM2 Field */ 81 /* NFC_FLASH_CM2 Field */
82 #define CMD_BYTE1_MASK 0xFF000000 82 #define CMD_BYTE1_MASK 0xFF000000
83 #define CMD_BYTE1_SHIFT 24 83 #define CMD_BYTE1_SHIFT 24
84 #define CMD_CODE_MASK 0x00FFFF00 84 #define CMD_CODE_MASK 0x00FFFF00
85 #define CMD_CODE_SHIFT 8 85 #define CMD_CODE_SHIFT 8
86 #define BUFNO_MASK 0x00000006 86 #define BUFNO_MASK 0x00000006
87 #define BUFNO_SHIFT 1 87 #define BUFNO_SHIFT 1
88 #define START_BIT (1<<0) 88 #define START_BIT (1<<0)
89 89
90 /* NFC_COL_ADDR Field */ 90 /* NFC_COL_ADDR Field */
91 #define COL_ADDR_MASK 0x0000FFFF 91 #define COL_ADDR_MASK 0x0000FFFF
92 #define COL_ADDR_SHIFT 0 92 #define COL_ADDR_SHIFT 0
93 93
94 /* NFC_ROW_ADDR Field */ 94 /* NFC_ROW_ADDR Field */
95 #define ROW_ADDR_MASK 0x00FFFFFF 95 #define ROW_ADDR_MASK 0x00FFFFFF
96 #define ROW_ADDR_SHIFT 0 96 #define ROW_ADDR_SHIFT 0
97 #define ROW_ADDR_CHIP_SEL_RB_MASK 0xF0000000 97 #define ROW_ADDR_CHIP_SEL_RB_MASK 0xF0000000
98 #define ROW_ADDR_CHIP_SEL_RB_SHIFT 28 98 #define ROW_ADDR_CHIP_SEL_RB_SHIFT 28
99 #define ROW_ADDR_CHIP_SEL_MASK 0x0F000000 99 #define ROW_ADDR_CHIP_SEL_MASK 0x0F000000
100 #define ROW_ADDR_CHIP_SEL_SHIFT 24 100 #define ROW_ADDR_CHIP_SEL_SHIFT 24
101 101
102 /* NFC_FLASH_STATUS2 Field */ 102 /* NFC_FLASH_STATUS2 Field */
103 #define STATUS_BYTE1_MASK 0x000000FF 103 #define STATUS_BYTE1_MASK 0x000000FF
104 104
105 /* NFC_FLASH_CONFIG Field */ 105 /* NFC_FLASH_CONFIG Field */
106 #define CONFIG_ECC_SRAM_ADDR_MASK 0x7FC00000 106 #define CONFIG_ECC_SRAM_ADDR_MASK 0x7FC00000
107 #define CONFIG_ECC_SRAM_ADDR_SHIFT 22 107 #define CONFIG_ECC_SRAM_ADDR_SHIFT 22
108 #define CONFIG_ECC_SRAM_REQ_BIT (1<<21) 108 #define CONFIG_ECC_SRAM_REQ_BIT (1<<21)
109 #define CONFIG_DMA_REQ_BIT (1<<20) 109 #define CONFIG_DMA_REQ_BIT (1<<20)
110 #define CONFIG_ECC_MODE_MASK 0x000E0000 110 #define CONFIG_ECC_MODE_MASK 0x000E0000
111 #define CONFIG_ECC_MODE_SHIFT 17 111 #define CONFIG_ECC_MODE_SHIFT 17
112 #define CONFIG_FAST_FLASH_BIT (1<<16) 112 #define CONFIG_FAST_FLASH_BIT (1<<16)
113 #define CONFIG_16BIT (1<<7) 113 #define CONFIG_16BIT (1<<7)
114 #define CONFIG_BOOT_MODE_BIT (1<<6) 114 #define CONFIG_BOOT_MODE_BIT (1<<6)
115 #define CONFIG_ADDR_AUTO_INCR_BIT (1<<5) 115 #define CONFIG_ADDR_AUTO_INCR_BIT (1<<5)
116 #define CONFIG_BUFNO_AUTO_INCR_BIT (1<<4) 116 #define CONFIG_BUFNO_AUTO_INCR_BIT (1<<4)
117 #define CONFIG_PAGE_CNT_MASK 0xF 117 #define CONFIG_PAGE_CNT_MASK 0xF
118 #define CONFIG_PAGE_CNT_SHIFT 0 118 #define CONFIG_PAGE_CNT_SHIFT 0
119 119
120 /* NFC_IRQ_STATUS Field */ 120 /* NFC_IRQ_STATUS Field */
121 #define IDLE_IRQ_BIT (1<<29) 121 #define IDLE_IRQ_BIT (1<<29)
122 #define IDLE_EN_BIT (1<<20) 122 #define IDLE_EN_BIT (1<<20)
123 #define CMD_DONE_CLEAR_BIT (1<<18) 123 #define CMD_DONE_CLEAR_BIT (1<<18)
124 #define IDLE_CLEAR_BIT (1<<17) 124 #define IDLE_CLEAR_BIT (1<<17)
125 125
126 #define NFC_TIMEOUT (1000) 126 #define NFC_TIMEOUT (1000)
127 127
128 /* ECC status placed at end of buffers. */ 128 /* ECC status placed at end of buffers. */
129 #define ECC_SRAM_ADDR ((PAGE_2K+256-8) >> 3) 129 #define ECC_SRAM_ADDR ((PAGE_2K+256-8) >> 3)
130 #define ECC_STATUS_MASK 0x80 130 #define ECC_STATUS_MASK 0x80
131 #define ECC_ERR_COUNT 0x3F 131 #define ECC_ERR_COUNT 0x3F
132 132
133 /* 133 /*
134 * ECC status is stored at NFC_CFG[ECCADD] +4 for little-endian 134 * ECC status is stored at NFC_CFG[ECCADD] +4 for little-endian
135 * and +7 for big-endian SOC. 135 * and +7 for big-endian SOC.
136 */ 136 */
137 #ifdef CONFIG_VF610 137 #ifdef CONFIG_VF610
138 #define ECC_OFFSET 4 138 #define ECC_OFFSET 4
139 #else 139 #else
140 #define ECC_OFFSET 7 140 #define ECC_OFFSET 7
141 #endif 141 #endif
142 142
143 struct vf610_nfc { 143 struct vf610_nfc {
144 struct mtd_info *mtd; 144 struct mtd_info *mtd;
145 struct nand_chip chip; 145 struct nand_chip chip;
146 void __iomem *regs; 146 void __iomem *regs;
147 uint column; 147 uint column;
148 int spareonly; 148 int spareonly;
149 int page; 149 int page;
150 /* Status and ID are in alternate locations. */ 150 /* Status and ID are in alternate locations. */
151 int alt_buf; 151 int alt_buf;
152 #define ALT_BUF_ID 1 152 #define ALT_BUF_ID 1
153 #define ALT_BUF_STAT 2 153 #define ALT_BUF_STAT 2
154 struct clk *clk; 154 struct clk *clk;
155 }; 155 };
156 156
157 #define mtd_to_nfc(_mtd) \ 157 #define mtd_to_nfc(_mtd) \
158 (struct vf610_nfc *)((struct nand_chip *)_mtd->priv)->priv 158 (struct vf610_nfc *)((struct nand_chip *)_mtd->priv)->priv
159 159
160 static u8 bbt_pattern[] = {'B', 'b', 't', '0' }; 160 static u8 bbt_pattern[] = {'B', 'b', 't', '0' };
161 static u8 mirror_pattern[] = {'1', 't', 'b', 'B' }; 161 static u8 mirror_pattern[] = {'1', 't', 'b', 'B' };
162 162
163 static struct nand_bbt_descr bbt_main_descr = { 163 static struct nand_bbt_descr bbt_main_descr = {
164 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | 164 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
165 NAND_BBT_2BIT | NAND_BBT_VERSION, 165 NAND_BBT_2BIT | NAND_BBT_VERSION,
166 .offs = 11, 166 .offs = 11,
167 .len = 4, 167 .len = 4,
168 .veroffs = 15, 168 .veroffs = 15,
169 .maxblocks = 4, 169 .maxblocks = 4,
170 .pattern = bbt_pattern, 170 .pattern = bbt_pattern,
171 }; 171 };
172 172
173 static struct nand_bbt_descr bbt_mirror_descr = { 173 static struct nand_bbt_descr bbt_mirror_descr = {
174 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE | 174 .options = NAND_BBT_LASTBLOCK | NAND_BBT_CREATE | NAND_BBT_WRITE |
175 NAND_BBT_2BIT | NAND_BBT_VERSION, 175 NAND_BBT_2BIT | NAND_BBT_VERSION,
176 .offs = 11, 176 .offs = 11,
177 .len = 4, 177 .len = 4,
178 .veroffs = 15, 178 .veroffs = 15,
179 .maxblocks = 4, 179 .maxblocks = 4,
180 .pattern = mirror_pattern, 180 .pattern = mirror_pattern,
181 }; 181 };
182 182
183 static struct nand_ecclayout vf610_nfc_ecc45 = { 183 static struct nand_ecclayout vf610_nfc_ecc45 = {
184 .eccbytes = 45, 184 .eccbytes = 45,
185 .eccpos = {19, 20, 21, 22, 23, 185 .eccpos = {19, 20, 21, 22, 23,
186 24, 25, 26, 27, 28, 29, 30, 31, 186 24, 25, 26, 27, 28, 29, 30, 31,
187 32, 33, 34, 35, 36, 37, 38, 39, 187 32, 33, 34, 35, 36, 37, 38, 39,
188 40, 41, 42, 43, 44, 45, 46, 47, 188 40, 41, 42, 43, 44, 45, 46, 47,
189 48, 49, 50, 51, 52, 53, 54, 55, 189 48, 49, 50, 51, 52, 53, 54, 55,
190 56, 57, 58, 59, 60, 61, 62, 63}, 190 56, 57, 58, 59, 60, 61, 62, 63},
191 .oobfree = { 191 .oobfree = {
192 {.offset = 8, 192 {.offset = 8,
193 .length = 11} } 193 .length = 11} }
194 }; 194 };
195 195
196 static inline u32 vf610_nfc_read(struct mtd_info *mtd, uint reg) 196 static inline u32 vf610_nfc_read(struct mtd_info *mtd, uint reg)
197 { 197 {
198 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 198 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
199 199
200 return readl(nfc->regs + reg); 200 return readl(nfc->regs + reg);
201 } 201 }
202 202
203 static inline void vf610_nfc_write(struct mtd_info *mtd, uint reg, u32 val) 203 static inline void vf610_nfc_write(struct mtd_info *mtd, uint reg, u32 val)
204 { 204 {
205 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 205 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
206 206
207 writel(val, nfc->regs + reg); 207 writel(val, nfc->regs + reg);
208 } 208 }
209 209
210 static inline void vf610_nfc_set(struct mtd_info *mtd, uint reg, u32 bits) 210 static inline void vf610_nfc_set(struct mtd_info *mtd, uint reg, u32 bits)
211 { 211 {
212 vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) | bits); 212 vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) | bits);
213 } 213 }
214 214
215 static inline void vf610_nfc_clear(struct mtd_info *mtd, uint reg, u32 bits) 215 static inline void vf610_nfc_clear(struct mtd_info *mtd, uint reg, u32 bits)
216 { 216 {
217 vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) & ~bits); 217 vf610_nfc_write(mtd, reg, vf610_nfc_read(mtd, reg) & ~bits);
218 } 218 }
219 219
220 static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg, 220 static inline void vf610_nfc_set_field(struct mtd_info *mtd, u32 reg,
221 u32 mask, u32 shift, u32 val) 221 u32 mask, u32 shift, u32 val)
222 { 222 {
223 vf610_nfc_write(mtd, reg, 223 vf610_nfc_write(mtd, reg,
224 (vf610_nfc_read(mtd, reg) & (~mask)) | val << shift); 224 (vf610_nfc_read(mtd, reg) & (~mask)) | val << shift);
225 } 225 }
226 226
227 static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n) 227 static inline void vf610_nfc_memcpy(void *dst, const void *src, size_t n)
228 { 228 {
229 /* 229 /*
230 * Use this accessor for the interal SRAM buffers. On ARM we can 230 * Use this accessor for the interal SRAM buffers. On ARM we can
231 * treat the SRAM buffer as if its memory, hence use memcpy 231 * treat the SRAM buffer as if its memory, hence use memcpy
232 */ 232 */
233 memcpy(dst, src, n); 233 memcpy(dst, src, n);
234 } 234 }
235 235
236 /* Clear flags for upcoming command */ 236 /* Clear flags for upcoming command */
237 static inline void vf610_nfc_clear_status(void __iomem *regbase) 237 static inline void vf610_nfc_clear_status(void __iomem *regbase)
238 { 238 {
239 void __iomem *reg = regbase + NFC_IRQ_STATUS; 239 void __iomem *reg = regbase + NFC_IRQ_STATUS;
240 u32 tmp = __raw_readl(reg); 240 u32 tmp = __raw_readl(reg);
241 tmp |= CMD_DONE_CLEAR_BIT | IDLE_CLEAR_BIT; 241 tmp |= CMD_DONE_CLEAR_BIT | IDLE_CLEAR_BIT;
242 __raw_writel(tmp, reg); 242 __raw_writel(tmp, reg);
243 } 243 }
244 244
245 /* Wait for complete operation */ 245 /* Wait for complete operation */
246 static inline void vf610_nfc_done(struct mtd_info *mtd) 246 static inline void vf610_nfc_done(struct mtd_info *mtd)
247 { 247 {
248 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 248 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
249 uint start; 249 uint start;
250 250
251 /* 251 /*
252 * Barrier is needed after this write. This write need 252 * Barrier is needed after this write. This write need
253 * to be done before reading the next register the first 253 * to be done before reading the next register the first
254 * time. 254 * time.
255 * vf610_nfc_set implicates such a barrier by using writel 255 * vf610_nfc_set implicates such a barrier by using writel
256 * to write to the register. 256 * to write to the register.
257 */ 257 */
258 vf610_nfc_set(mtd, NFC_FLASH_CMD2, START_BIT); 258 vf610_nfc_set(mtd, NFC_FLASH_CMD2, START_BIT);
259 259
260 start = get_timer(0); 260 start = get_timer(0);
261 261
262 while (!(vf610_nfc_read(mtd, NFC_IRQ_STATUS) & IDLE_IRQ_BIT)) { 262 while (!(vf610_nfc_read(mtd, NFC_IRQ_STATUS) & IDLE_IRQ_BIT)) {
263 if (get_timer(start) > NFC_TIMEOUT) { 263 if (get_timer(start) > NFC_TIMEOUT) {
264 printf("Timeout while waiting for !BUSY.\n"); 264 printf("Timeout while waiting for !BUSY.\n");
265 return; 265 return;
266 } 266 }
267 } 267 }
268 vf610_nfc_clear_status(nfc->regs); 268 vf610_nfc_clear_status(nfc->regs);
269 } 269 }
270 270
271 static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col) 271 static u8 vf610_nfc_get_id(struct mtd_info *mtd, int col)
272 { 272 {
273 u32 flash_id; 273 u32 flash_id;
274 274
275 if (col < 4) { 275 if (col < 4) {
276 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS1); 276 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS1);
277 return (flash_id >> (3-col)*8) & 0xff; 277 return (flash_id >> (3-col)*8) & 0xff;
278 } else { 278 } else {
279 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS2); 279 flash_id = vf610_nfc_read(mtd, NFC_FLASH_STATUS2);
280 return flash_id >> 24; 280 return flash_id >> 24;
281 } 281 }
282 } 282 }
283 283
284 static u8 vf610_nfc_get_status(struct mtd_info *mtd) 284 static u8 vf610_nfc_get_status(struct mtd_info *mtd)
285 { 285 {
286 return vf610_nfc_read(mtd, NFC_FLASH_STATUS2) & STATUS_BYTE1_MASK; 286 return vf610_nfc_read(mtd, NFC_FLASH_STATUS2) & STATUS_BYTE1_MASK;
287 } 287 }
288 288
289 /* Single command */ 289 /* Single command */
290 static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1, 290 static void vf610_nfc_send_command(void __iomem *regbase, u32 cmd_byte1,
291 u32 cmd_code) 291 u32 cmd_code)
292 { 292 {
293 void __iomem *reg = regbase + NFC_FLASH_CMD2; 293 void __iomem *reg = regbase + NFC_FLASH_CMD2;
294 u32 tmp; 294 u32 tmp;
295 vf610_nfc_clear_status(regbase); 295 vf610_nfc_clear_status(regbase);
296 296
297 tmp = __raw_readl(reg); 297 tmp = __raw_readl(reg);
298 tmp &= ~(CMD_BYTE1_MASK | CMD_CODE_MASK | BUFNO_MASK); 298 tmp &= ~(CMD_BYTE1_MASK | CMD_CODE_MASK | BUFNO_MASK);
299 tmp |= cmd_byte1 << CMD_BYTE1_SHIFT; 299 tmp |= cmd_byte1 << CMD_BYTE1_SHIFT;
300 tmp |= cmd_code << CMD_CODE_SHIFT; 300 tmp |= cmd_code << CMD_CODE_SHIFT;
301 __raw_writel(tmp, reg); 301 __raw_writel(tmp, reg);
302 } 302 }
303 303
304 /* Two commands */ 304 /* Two commands */
305 static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1, 305 static void vf610_nfc_send_commands(void __iomem *regbase, u32 cmd_byte1,
306 u32 cmd_byte2, u32 cmd_code) 306 u32 cmd_byte2, u32 cmd_code)
307 { 307 {
308 void __iomem *reg = regbase + NFC_FLASH_CMD1; 308 void __iomem *reg = regbase + NFC_FLASH_CMD1;
309 u32 tmp; 309 u32 tmp;
310 vf610_nfc_send_command(regbase, cmd_byte1, cmd_code); 310 vf610_nfc_send_command(regbase, cmd_byte1, cmd_code);
311 311
312 tmp = __raw_readl(reg); 312 tmp = __raw_readl(reg);
313 tmp &= ~CMD_BYTE2_MASK; 313 tmp &= ~CMD_BYTE2_MASK;
314 tmp |= cmd_byte2 << CMD_BYTE2_SHIFT; 314 tmp |= cmd_byte2 << CMD_BYTE2_SHIFT;
315 __raw_writel(tmp, reg); 315 __raw_writel(tmp, reg);
316 } 316 }
317 317
318 static void vf610_nfc_addr_cycle(struct mtd_info *mtd, int column, int page) 318 static void vf610_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
319 { 319 {
320 if (column != -1) { 320 if (column != -1) {
321 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 321 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
322 if (nfc->chip.options | NAND_BUSWIDTH_16) 322 if (nfc->chip.options | NAND_BUSWIDTH_16)
323 column = column/2; 323 column = column/2;
324 vf610_nfc_set_field(mtd, NFC_COL_ADDR, COL_ADDR_MASK, 324 vf610_nfc_set_field(mtd, NFC_COL_ADDR, COL_ADDR_MASK,
325 COL_ADDR_SHIFT, column); 325 COL_ADDR_SHIFT, column);
326 } 326 }
327 if (page != -1) 327 if (page != -1)
328 vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK, 328 vf610_nfc_set_field(mtd, NFC_ROW_ADDR, ROW_ADDR_MASK,
329 ROW_ADDR_SHIFT, page); 329 ROW_ADDR_SHIFT, page);
330 } 330 }
331 331
332 /* Send command to NAND chip */ 332 /* Send command to NAND chip */
333 static void vf610_nfc_command(struct mtd_info *mtd, unsigned command, 333 static void vf610_nfc_command(struct mtd_info *mtd, unsigned command,
334 int column, int page) 334 int column, int page)
335 { 335 {
336 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 336 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
337 337
338 nfc->column = max(column, 0); 338 nfc->column = max(column, 0);
339 nfc->spareonly = 0; 339 nfc->spareonly = 0;
340 nfc->alt_buf = 0; 340 nfc->alt_buf = 0;
341 341
342 switch (command) { 342 switch (command) {
343 case NAND_CMD_PAGEPROG: 343 case NAND_CMD_PAGEPROG:
344 nfc->page = -1; 344 nfc->page = -1;
345 vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN, 345 vf610_nfc_send_commands(nfc->regs, NAND_CMD_SEQIN,
346 command, PROGRAM_PAGE_CMD_CODE); 346 command, PROGRAM_PAGE_CMD_CODE);
347 vf610_nfc_addr_cycle(mtd, column, page); 347 vf610_nfc_addr_cycle(mtd, column, page);
348 break; 348 break;
349 349
350 case NAND_CMD_RESET: 350 case NAND_CMD_RESET:
351 vf610_nfc_send_command(nfc->regs, command, RESET_CMD_CODE); 351 vf610_nfc_send_command(nfc->regs, command, RESET_CMD_CODE);
352 break; 352 break;
353 /* 353 /*
354 * NFC does not support sub-page reads and writes, 354 * NFC does not support sub-page reads and writes,
355 * so emulate them using full page transfers. 355 * so emulate them using full page transfers.
356 */ 356 */
357 case NAND_CMD_READOOB: 357 case NAND_CMD_READOOB:
358 nfc->spareonly = 1; 358 nfc->spareonly = 1;
359 case NAND_CMD_SEQIN: /* Pre-read for partial writes. */ 359 case NAND_CMD_SEQIN: /* Pre-read for partial writes. */
360 case NAND_CMD_READ0: 360 case NAND_CMD_READ0:
361 column = 0; 361 column = 0;
362 /* Already read? */ 362 /* Already read? */
363 if (nfc->page == page) 363 if (nfc->page == page)
364 return; 364 return;
365 nfc->page = page; 365 nfc->page = page;
366 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0, 366 vf610_nfc_send_commands(nfc->regs, NAND_CMD_READ0,
367 NAND_CMD_READSTART, READ_PAGE_CMD_CODE); 367 NAND_CMD_READSTART, READ_PAGE_CMD_CODE);
368 vf610_nfc_addr_cycle(mtd, column, page); 368 vf610_nfc_addr_cycle(mtd, column, page);
369 break; 369 break;
370 370
371 case NAND_CMD_ERASE1: 371 case NAND_CMD_ERASE1:
372 if (nfc->page == page) 372 nfc->page = -1;
373 nfc->page = -1;
374 vf610_nfc_send_commands(nfc->regs, command, 373 vf610_nfc_send_commands(nfc->regs, command,
375 NAND_CMD_ERASE2, ERASE_CMD_CODE); 374 NAND_CMD_ERASE2, ERASE_CMD_CODE);
376 vf610_nfc_addr_cycle(mtd, column, page); 375 vf610_nfc_addr_cycle(mtd, column, page);
377 break; 376 break;
378 377
379 case NAND_CMD_READID: 378 case NAND_CMD_READID:
380 nfc->alt_buf = ALT_BUF_ID; 379 nfc->alt_buf = ALT_BUF_ID;
381 vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE); 380 vf610_nfc_send_command(nfc->regs, command, READ_ID_CMD_CODE);
382 break; 381 break;
383 382
384 case NAND_CMD_STATUS: 383 case NAND_CMD_STATUS:
385 nfc->alt_buf = ALT_BUF_STAT; 384 nfc->alt_buf = ALT_BUF_STAT;
386 vf610_nfc_send_command(nfc->regs, command, 385 vf610_nfc_send_command(nfc->regs, command,
387 STATUS_READ_CMD_CODE); 386 STATUS_READ_CMD_CODE);
388 break; 387 break;
389 default: 388 default:
390 return; 389 return;
391 } 390 }
392 391
393 vf610_nfc_done(mtd); 392 vf610_nfc_done(mtd);
394 } 393 }
395 394
396 static inline void vf610_nfc_read_spare(struct mtd_info *mtd, void *buf, 395 static inline void vf610_nfc_read_spare(struct mtd_info *mtd, void *buf,
397 int len) 396 int len)
398 { 397 {
399 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 398 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
400 399
401 len = min(mtd->oobsize, (uint)len); 400 len = min(mtd->oobsize, (uint)len);
402 if (len > 0) 401 if (len > 0)
403 vf610_nfc_memcpy(buf, nfc->regs + mtd->writesize, len); 402 vf610_nfc_memcpy(buf, nfc->regs + mtd->writesize, len);
404 } 403 }
405 404
406 /* Read data from NFC buffers */ 405 /* Read data from NFC buffers */
407 static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len) 406 static void vf610_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)
408 { 407 {
409 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 408 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
410 uint c = nfc->column; 409 uint c = nfc->column;
411 uint l; 410 uint l;
412 411
413 /* Handle main area */ 412 /* Handle main area */
414 if (!nfc->spareonly) { 413 if (!nfc->spareonly) {
415 l = min((uint)len, mtd->writesize - c); 414 l = min((uint)len, mtd->writesize - c);
416 nfc->column += l; 415 nfc->column += l;
417 416
418 if (!nfc->alt_buf) 417 if (!nfc->alt_buf)
419 vf610_nfc_memcpy(buf, nfc->regs + NFC_MAIN_AREA(0) + c, 418 vf610_nfc_memcpy(buf, nfc->regs + NFC_MAIN_AREA(0) + c,
420 l); 419 l);
421 else 420 else
422 if (nfc->alt_buf & ALT_BUF_ID) 421 if (nfc->alt_buf & ALT_BUF_ID)
423 *buf = vf610_nfc_get_id(mtd, c); 422 *buf = vf610_nfc_get_id(mtd, c);
424 else 423 else
425 *buf = vf610_nfc_get_status(mtd); 424 *buf = vf610_nfc_get_status(mtd);
426 425
427 buf += l; 426 buf += l;
428 len -= l; 427 len -= l;
429 } 428 }
430 429
431 /* Handle spare area access */ 430 /* Handle spare area access */
432 if (len) { 431 if (len) {
433 nfc->column += len; 432 nfc->column += len;
434 vf610_nfc_read_spare(mtd, buf, len); 433 vf610_nfc_read_spare(mtd, buf, len);
435 } 434 }
436 } 435 }
437 436
438 /* Write data to NFC buffers */ 437 /* Write data to NFC buffers */
439 static void vf610_nfc_write_buf(struct mtd_info *mtd, const u_char *buf, 438 static void vf610_nfc_write_buf(struct mtd_info *mtd, const u_char *buf,
440 int len) 439 int len)
441 { 440 {
442 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 441 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
443 uint c = nfc->column; 442 uint c = nfc->column;
444 uint l; 443 uint l;
445 444
446 l = min((uint)len, mtd->writesize + mtd->oobsize - c); 445 l = min((uint)len, mtd->writesize + mtd->oobsize - c);
447 nfc->column += l; 446 nfc->column += l;
448 vf610_nfc_memcpy(nfc->regs + NFC_MAIN_AREA(0) + c, buf, l); 447 vf610_nfc_memcpy(nfc->regs + NFC_MAIN_AREA(0) + c, buf, l);
449 } 448 }
450 449
451 /* Read byte from NFC buffers */ 450 /* Read byte from NFC buffers */
452 static u8 vf610_nfc_read_byte(struct mtd_info *mtd) 451 static u8 vf610_nfc_read_byte(struct mtd_info *mtd)
453 { 452 {
454 u8 tmp; 453 u8 tmp;
455 vf610_nfc_read_buf(mtd, &tmp, sizeof(tmp)); 454 vf610_nfc_read_buf(mtd, &tmp, sizeof(tmp));
456 return tmp; 455 return tmp;
457 } 456 }
458 457
459 /* Read word from NFC buffers */ 458 /* Read word from NFC buffers */
460 static u16 vf610_nfc_read_word(struct mtd_info *mtd) 459 static u16 vf610_nfc_read_word(struct mtd_info *mtd)
461 { 460 {
462 u16 tmp; 461 u16 tmp;
463 vf610_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp)); 462 vf610_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp));
464 return tmp; 463 return tmp;
465 } 464 }
466 465
467 /* If not provided, upper layers apply a fixed delay. */ 466 /* If not provided, upper layers apply a fixed delay. */
468 static int vf610_nfc_dev_ready(struct mtd_info *mtd) 467 static int vf610_nfc_dev_ready(struct mtd_info *mtd)
469 { 468 {
470 /* NFC handles R/B internally; always ready. */ 469 /* NFC handles R/B internally; always ready. */
471 return 1; 470 return 1;
472 } 471 }
473 472
474 /* 473 /*
475 * This function supports Vybrid only (MPC5125 would have full RB and four CS) 474 * This function supports Vybrid only (MPC5125 would have full RB and four CS)
476 */ 475 */
477 static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip) 476 static void vf610_nfc_select_chip(struct mtd_info *mtd, int chip)
478 { 477 {
479 #ifdef CONFIG_VF610 478 #ifdef CONFIG_VF610
480 u32 tmp = vf610_nfc_read(mtd, NFC_ROW_ADDR); 479 u32 tmp = vf610_nfc_read(mtd, NFC_ROW_ADDR);
481 tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK); 480 tmp &= ~(ROW_ADDR_CHIP_SEL_RB_MASK | ROW_ADDR_CHIP_SEL_MASK);
482 tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT; 481 tmp |= 1 << ROW_ADDR_CHIP_SEL_RB_SHIFT;
483 482
484 if (chip == 0) 483 if (chip == 0)
485 tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT; 484 tmp |= 1 << ROW_ADDR_CHIP_SEL_SHIFT;
486 else if (chip == 1) 485 else if (chip == 1)
487 tmp |= 2 << ROW_ADDR_CHIP_SEL_SHIFT; 486 tmp |= 2 << ROW_ADDR_CHIP_SEL_SHIFT;
488 487
489 vf610_nfc_write(mtd, NFC_ROW_ADDR, tmp); 488 vf610_nfc_write(mtd, NFC_ROW_ADDR, tmp);
490 #endif 489 #endif
491 } 490 }
492 491
493 /* Count the number of 0's in buff upto max_bits */ 492 /* Count the number of 0's in buff upto max_bits */
494 static inline int count_written_bits(uint8_t *buff, int size, int max_bits) 493 static inline int count_written_bits(uint8_t *buff, int size, int max_bits)
495 { 494 {
496 uint32_t *buff32 = (uint32_t *)buff; 495 uint32_t *buff32 = (uint32_t *)buff;
497 int k, written_bits = 0; 496 int k, written_bits = 0;
498 497
499 for (k = 0; k < (size / 4); k++) { 498 for (k = 0; k < (size / 4); k++) {
500 written_bits += hweight32(~buff32[k]); 499 written_bits += hweight32(~buff32[k]);
501 if (written_bits > max_bits) 500 if (written_bits > max_bits)
502 break; 501 break;
503 } 502 }
504 503
505 return written_bits; 504 return written_bits;
506 } 505 }
507 506
508 static inline int vf610_nfc_correct_data(struct mtd_info *mtd, u_char *dat) 507 static inline int vf610_nfc_correct_data(struct mtd_info *mtd, u_char *dat)
509 { 508 {
510 struct vf610_nfc *nfc = mtd_to_nfc(mtd); 509 struct vf610_nfc *nfc = mtd_to_nfc(mtd);
511 u8 ecc_status; 510 u8 ecc_status;
512 u8 ecc_count; 511 u8 ecc_count;
513 int flip; 512 int flip;
514 513
515 ecc_status = __raw_readb(nfc->regs + ECC_SRAM_ADDR * 8 + ECC_OFFSET); 514 ecc_status = __raw_readb(nfc->regs + ECC_SRAM_ADDR * 8 + ECC_OFFSET);
516 ecc_count = ecc_status & ECC_ERR_COUNT; 515 ecc_count = ecc_status & ECC_ERR_COUNT;
517 if (!(ecc_status & ECC_STATUS_MASK)) 516 if (!(ecc_status & ECC_STATUS_MASK))
518 return ecc_count; 517 return ecc_count;
519 518
520 /* If 'ecc_count' zero or less then buffer is all 0xff or erased. */ 519 /* If 'ecc_count' zero or less then buffer is all 0xff or erased. */
521 flip = count_written_bits(dat, nfc->chip.ecc.size, ecc_count); 520 flip = count_written_bits(dat, nfc->chip.ecc.size, ecc_count);
522 521
523 /* ECC failed. */ 522 /* ECC failed. */
524 if (flip > ecc_count) { 523 if (flip > ecc_count) {
525 nfc->page = -1; 524 nfc->page = -1;
526 return -1; 525 return -1;
527 } 526 }
528 527
529 /* Erased page. */ 528 /* Erased page. */
530 memset(dat, 0xff, nfc->chip.ecc.size); 529 memset(dat, 0xff, nfc->chip.ecc.size);
531 return 0; 530 return 0;
532 } 531 }
533 532
534 533
535 static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip, 534 static int vf610_nfc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
536 uint8_t *buf, int oob_required, int page) 535 uint8_t *buf, int oob_required, int page)
537 { 536 {
538 int eccsize = chip->ecc.size; 537 int eccsize = chip->ecc.size;
539 int stat; 538 int stat;
540 uint8_t *p = buf; 539 uint8_t *p = buf;
541 540
542 541
543 vf610_nfc_read_buf(mtd, p, eccsize); 542 vf610_nfc_read_buf(mtd, p, eccsize);
544 543
545 if (oob_required) 544 if (oob_required)
546 vf610_nfc_read_buf(mtd, chip->oob_poi, mtd->oobsize); 545 vf610_nfc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
547 546
548 stat = vf610_nfc_correct_data(mtd, p); 547 stat = vf610_nfc_correct_data(mtd, p);
549 548
550 if (stat < 0) 549 if (stat < 0)
551 mtd->ecc_stats.failed++; 550 mtd->ecc_stats.failed++;
552 else 551 else
553 mtd->ecc_stats.corrected += stat; 552 mtd->ecc_stats.corrected += stat;
554 553
555 return 0; 554 return 0;
556 } 555 }
557 556
558 /* 557 /*
559 * ECC will be calculated automatically 558 * ECC will be calculated automatically
560 */ 559 */
561 static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip, 560 static int vf610_nfc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
562 const uint8_t *buf, int oob_required) 561 const uint8_t *buf, int oob_required)
563 { 562 {
564 vf610_nfc_write_buf(mtd, buf, mtd->writesize); 563 vf610_nfc_write_buf(mtd, buf, mtd->writesize);
565 if (oob_required) 564 if (oob_required)
566 vf610_nfc_write_buf(mtd, chip->oob_poi, mtd->oobsize); 565 vf610_nfc_write_buf(mtd, chip->oob_poi, mtd->oobsize);
567 566
568 return 0; 567 return 0;
569 } 568 }
570 569
571 struct vf610_nfc_config { 570 struct vf610_nfc_config {
572 int hardware_ecc; 571 int hardware_ecc;
573 int width; 572 int width;
574 int flash_bbt; 573 int flash_bbt;
575 }; 574 };
576 575
577 static int vf610_nfc_nand_init(int devnum, void __iomem *addr) 576 static int vf610_nfc_nand_init(int devnum, void __iomem *addr)
578 { 577 {
579 struct mtd_info *mtd = &nand_info[devnum]; 578 struct mtd_info *mtd = &nand_info[devnum];
580 struct nand_chip *chip; 579 struct nand_chip *chip;
581 struct vf610_nfc *nfc; 580 struct vf610_nfc *nfc;
582 int err = 0; 581 int err = 0;
583 int page_sz; 582 int page_sz;
584 struct vf610_nfc_config cfg = { 583 struct vf610_nfc_config cfg = {
585 .hardware_ecc = 1, 584 .hardware_ecc = 1,
586 #ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT 585 #ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
587 .width = 16, 586 .width = 16,
588 #else 587 #else
589 .width = 8, 588 .width = 8,
590 #endif 589 #endif
591 .flash_bbt = 1, 590 .flash_bbt = 1,
592 }; 591 };
593 592
594 nfc = malloc(sizeof(*nfc)); 593 nfc = malloc(sizeof(*nfc));
595 if (!nfc) { 594 if (!nfc) {
596 printf(KERN_ERR "%s: Memory exhausted!\n", __func__); 595 printf(KERN_ERR "%s: Memory exhausted!\n", __func__);
597 return -ENOMEM; 596 return -ENOMEM;
598 } 597 }
599 598
600 chip = &nfc->chip; 599 chip = &nfc->chip;
601 nfc->regs = addr; 600 nfc->regs = addr;
602 601
603 mtd->priv = chip; 602 mtd->priv = chip;
604 chip->priv = nfc; 603 chip->priv = nfc;
605 604
606 if (cfg.width == 16) { 605 if (cfg.width == 16) {
607 chip->options |= NAND_BUSWIDTH_16; 606 chip->options |= NAND_BUSWIDTH_16;
608 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT); 607 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
609 } else { 608 } else {
610 chip->options &= ~NAND_BUSWIDTH_16; 609 chip->options &= ~NAND_BUSWIDTH_16;
611 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT); 610 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_16BIT);
612 } 611 }
613 612
614 /* Disable subpage writes as we do not provide ecc->hwctl */ 613 /* Disable subpage writes as we do not provide ecc->hwctl */
615 chip->options |= NAND_NO_SUBPAGE_WRITE; 614 chip->options |= NAND_NO_SUBPAGE_WRITE;
616 615
617 chip->dev_ready = vf610_nfc_dev_ready; 616 chip->dev_ready = vf610_nfc_dev_ready;
618 chip->cmdfunc = vf610_nfc_command; 617 chip->cmdfunc = vf610_nfc_command;
619 chip->read_byte = vf610_nfc_read_byte; 618 chip->read_byte = vf610_nfc_read_byte;
620 chip->read_word = vf610_nfc_read_word; 619 chip->read_word = vf610_nfc_read_word;
621 chip->read_buf = vf610_nfc_read_buf; 620 chip->read_buf = vf610_nfc_read_buf;
622 chip->write_buf = vf610_nfc_write_buf; 621 chip->write_buf = vf610_nfc_write_buf;
623 chip->select_chip = vf610_nfc_select_chip; 622 chip->select_chip = vf610_nfc_select_chip;
624 623
625 /* Bad block options. */ 624 /* Bad block options. */
626 if (cfg.flash_bbt) 625 if (cfg.flash_bbt)
627 chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_CREATE; 626 chip->bbt_options = NAND_BBT_USE_FLASH | NAND_BBT_CREATE;
628 627
629 /* Default to software ECC until flash ID. */ 628 /* Default to software ECC until flash ID. */
630 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, 629 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
631 CONFIG_ECC_MODE_MASK, 630 CONFIG_ECC_MODE_MASK,
632 CONFIG_ECC_MODE_SHIFT, ECC_BYPASS); 631 CONFIG_ECC_MODE_SHIFT, ECC_BYPASS);
633 632
634 chip->bbt_td = &bbt_main_descr; 633 chip->bbt_td = &bbt_main_descr;
635 chip->bbt_md = &bbt_mirror_descr; 634 chip->bbt_md = &bbt_mirror_descr;
636 635
637 page_sz = PAGE_2K + OOB_64; 636 page_sz = PAGE_2K + OOB_64;
638 page_sz += cfg.width == 16 ? 1 : 0; 637 page_sz += cfg.width == 16 ? 1 : 0;
639 vf610_nfc_write(mtd, NFC_SECTOR_SIZE, page_sz); 638 vf610_nfc_write(mtd, NFC_SECTOR_SIZE, page_sz);
640 639
641 /* Set configuration register. */ 640 /* Set configuration register. */
642 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT); 641 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_ADDR_AUTO_INCR_BIT);
643 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT); 642 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BUFNO_AUTO_INCR_BIT);
644 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT); 643 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_BOOT_MODE_BIT);
645 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT); 644 vf610_nfc_clear(mtd, NFC_FLASH_CONFIG, CONFIG_DMA_REQ_BIT);
646 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT); 645 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_FAST_FLASH_BIT);
647 646
648 /* Enable Idle IRQ */ 647 /* Enable Idle IRQ */
649 vf610_nfc_set(mtd, NFC_IRQ_STATUS, IDLE_EN_BIT); 648 vf610_nfc_set(mtd, NFC_IRQ_STATUS, IDLE_EN_BIT);
650 649
651 /* PAGE_CNT = 1 */ 650 /* PAGE_CNT = 1 */
652 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK, 651 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, CONFIG_PAGE_CNT_MASK,
653 CONFIG_PAGE_CNT_SHIFT, 1); 652 CONFIG_PAGE_CNT_SHIFT, 1);
654 653
655 /* Set ECC_STATUS offset */ 654 /* Set ECC_STATUS offset */
656 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, 655 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
657 CONFIG_ECC_SRAM_ADDR_MASK, 656 CONFIG_ECC_SRAM_ADDR_MASK,
658 CONFIG_ECC_SRAM_ADDR_SHIFT, ECC_SRAM_ADDR); 657 CONFIG_ECC_SRAM_ADDR_SHIFT, ECC_SRAM_ADDR);
659 658
660 /* first scan to find the device and get the page size */ 659 /* first scan to find the device and get the page size */
661 if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) { 660 if (nand_scan_ident(mtd, CONFIG_SYS_MAX_NAND_DEVICE, NULL)) {
662 err = -ENXIO; 661 err = -ENXIO;
663 goto error; 662 goto error;
664 } 663 }
665 664
666 chip->ecc.mode = NAND_ECC_SOFT; /* default */ 665 chip->ecc.mode = NAND_ECC_SOFT; /* default */
667 666
668 page_sz = mtd->writesize + mtd->oobsize; 667 page_sz = mtd->writesize + mtd->oobsize;
669 668
670 /* Single buffer only, max 256 OOB minus ECC status */ 669 /* Single buffer only, max 256 OOB minus ECC status */
671 if (page_sz > PAGE_2K + 256 - 8) { 670 if (page_sz > PAGE_2K + 256 - 8) {
672 dev_err(nfc->dev, "Unsupported flash size\n"); 671 dev_err(nfc->dev, "Unsupported flash size\n");
673 err = -ENXIO; 672 err = -ENXIO;
674 goto error; 673 goto error;
675 } 674 }
676 page_sz += cfg.width == 16 ? 1 : 0; 675 page_sz += cfg.width == 16 ? 1 : 0;
677 vf610_nfc_write(mtd, NFC_SECTOR_SIZE, page_sz); 676 vf610_nfc_write(mtd, NFC_SECTOR_SIZE, page_sz);
678 677
679 if (cfg.hardware_ecc) { 678 if (cfg.hardware_ecc) {
680 if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) { 679 if (mtd->writesize != PAGE_2K && mtd->oobsize < 64) {
681 dev_err(nfc->dev, "Unsupported flash with hwecc\n"); 680 dev_err(nfc->dev, "Unsupported flash with hwecc\n");
682 err = -ENXIO; 681 err = -ENXIO;
683 goto error; 682 goto error;
684 } 683 }
685 684
686 chip->ecc.layout = &vf610_nfc_ecc45; 685 chip->ecc.layout = &vf610_nfc_ecc45;
687 686
688 /* propagate ecc.layout to mtd_info */ 687 /* propagate ecc.layout to mtd_info */
689 mtd->ecclayout = chip->ecc.layout; 688 mtd->ecclayout = chip->ecc.layout;
690 chip->ecc.read_page = vf610_nfc_read_page; 689 chip->ecc.read_page = vf610_nfc_read_page;
691 chip->ecc.write_page = vf610_nfc_write_page; 690 chip->ecc.write_page = vf610_nfc_write_page;
692 chip->ecc.mode = NAND_ECC_HW; 691 chip->ecc.mode = NAND_ECC_HW;
693 692
694 chip->ecc.bytes = 45; 693 chip->ecc.bytes = 45;
695 chip->ecc.size = PAGE_2K; 694 chip->ecc.size = PAGE_2K;
696 chip->ecc.strength = 24; 695 chip->ecc.strength = 24;
697 696
698 /* set ECC mode to 45 bytes OOB with 24 bits correction */ 697 /* set ECC mode to 45 bytes OOB with 24 bits correction */
699 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG, 698 vf610_nfc_set_field(mtd, NFC_FLASH_CONFIG,
700 CONFIG_ECC_MODE_MASK, 699 CONFIG_ECC_MODE_MASK,
701 CONFIG_ECC_MODE_SHIFT, ECC_45_BYTE); 700 CONFIG_ECC_MODE_SHIFT, ECC_45_BYTE);
702 701
703 /* Enable ECC_STATUS */ 702 /* Enable ECC_STATUS */
704 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT); 703 vf610_nfc_set(mtd, NFC_FLASH_CONFIG, CONFIG_ECC_SRAM_REQ_BIT);
705 } 704 }
706 705
707 /* second phase scan */ 706 /* second phase scan */
708 err = nand_scan_tail(mtd); 707 err = nand_scan_tail(mtd);
709 if (err) 708 if (err)
710 return err; 709 return err;
711 710
712 err = nand_register(devnum); 711 err = nand_register(devnum);
713 if (err) 712 if (err)
714 return err; 713 return err;
715 714
716 return 0; 715 return 0;
717 716
718 error: 717 error:
719 return err; 718 return err;
720 } 719 }
721 720
722 void board_nand_init(void) 721 void board_nand_init(void)
723 { 722 {
724 int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE); 723 int err = vf610_nfc_nand_init(0, (void __iomem *)CONFIG_SYS_NAND_BASE);
725 if (err) 724 if (err)
726 printf("VF610 NAND init failed (err %d)\n", err); 725 printf("VF610 NAND init failed (err %d)\n", err);
727 } 726 }
728 727