Commit 76e077cbbc495e4b3110cbb8e8a8e95422a450fb
1 parent
066d1f527d
Exists in
v2016.05-smarct4x
Make console outputs from defconfig file
Showing 13 changed files with 3087 additions and 120 deletions Side-by-side Diff
- arch/arm/dts/Makefile
- arch/arm/dts/am437x-smarct437x-uart1.dts
- arch/arm/dts/am437x-smarct437x-uart2.dts
- arch/arm/dts/am437x-smarct437x-uart3.dts
- configs/smarct437x_evm_defconfig
- configs/smarct437x_evm_spi_defconfig
- configs/smarct437x_evm_spi_uart0_defconfig
- configs/smarct437x_evm_spi_uart1_defconfig
- configs/smarct437x_evm_spi_uart2_defconfig
- configs/smarct437x_evm_uart0_defconfig
- configs/smarct437x_evm_uart1_defconfig
- configs/smarct437x_evm_uart2_defconfig
- configs/smarct437x_evm_uart3_defconfig
arch/arm/dts/Makefile
| ... | ... | @@ -95,6 +95,9 @@ |
| 95 | 95 | am335x-icev2.dtb |
| 96 | 96 | dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \ |
| 97 | 97 | am437x-smarct437x.dtb \ |
| 98 | + am437x-smarct437x-uart2.dtb \ | |
| 99 | + am437x-smarct437x-uart1.dtb \ | |
| 100 | + am437x-smarct437x-uart3.dtb \ | |
| 98 | 101 | am43x-epos-evm.dtb \ |
| 99 | 102 | am437x-idk-evm.dtb |
| 100 | 103 | dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb |
arch/arm/dts/am437x-smarct437x-uart1.dts
| 1 | +/* | |
| 2 | + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/* AM437x SK EVM */ | |
| 10 | + | |
| 11 | +/dts-v1/; | |
| 12 | + | |
| 13 | +#include "am4372.dtsi" | |
| 14 | +#include <dt-bindings/pinctrl/am43xx.h> | |
| 15 | +#include <dt-bindings/pwm/pwm.h> | |
| 16 | +#include <dt-bindings/gpio/gpio.h> | |
| 17 | +#include <dt-bindings/input/input.h> | |
| 18 | + | |
| 19 | +/ { | |
| 20 | + model = "TI AM437x SMARCT437X"; | |
| 21 | + compatible = "ti,am437x-smarct437x","ti,am4372","ti,am43"; | |
| 22 | + | |
| 23 | + aliases { | |
| 24 | + display0 = &lcd0; | |
| 25 | + }; | |
| 26 | + | |
| 27 | + chosen { | |
| 28 | + stdout-path = &uart2; | |
| 29 | + tick-timer = &timer2; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + vmmcwl_fixed: fixedregulator-mmcwl { | |
| 33 | + compatible = "regulator-fixed"; | |
| 34 | + regulator-name = "vmmcwl_fixed"; | |
| 35 | + regulator-min-microvolt = <1800000>; | |
| 36 | + regulator-max-microvolt = <1800000>; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + backlight { | |
| 40 | + compatible = "pwm-backlight"; | |
| 41 | + enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; /* Backlight Enable Pin*/ | |
| 42 | + pwms = <&ehrpwm0 1 250000 PWM_POLARITY_INVERTED>; | |
| 43 | + brightness-levels = <0 51 53 56 62 75 128 212 255>; | |
| 44 | + default-brightness-level = <7>; /* 7 is the brightest */ | |
| 45 | + }; | |
| 46 | + | |
| 47 | + sound: sound@0 { | |
| 48 | + compatible = "simple-audio-card"; | |
| 49 | + simple-audio-card,name = "SMARCT437X SOUND CARD"; | |
| 50 | + simple-audio-card,widgets = | |
| 51 | + "Headphone", "Headphone Jack", | |
| 52 | + "Line", "Line In"; | |
| 53 | + simple-audio-card,routing = | |
| 54 | + "Headphone Jack", "HPLOUT", | |
| 55 | + "Headphone Jack", "HPROUT", | |
| 56 | + "LINE1L", "Line In", | |
| 57 | + "LINE1R", "Line In"; | |
| 58 | + simple-audio-card,format = "dsp_b"; | |
| 59 | + simple-audio-card,bitclock-master = <&sound_master>; | |
| 60 | + simple-audio-card,frame-master = <&sound_master>; | |
| 61 | + simple-audio-card,bitclock-inversion; | |
| 62 | + | |
| 63 | + simple-audio-card,cpu { | |
| 64 | + sound-dai = <&mcasp1>; | |
| 65 | + system-clock-frequency = <12000000>; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + /* For TI TLV320AIC3106 Audio Codec */ | |
| 69 | + /*sound_master: simple-audio-card,codec { | |
| 70 | + sound-dai = <&tlv320aic3106>; | |
| 71 | + system-clock-frequency = <24576000>;*/ | |
| 72 | + | |
| 73 | + /* For Freescale SGTL5000 Audio Codec */ | |
| 74 | + sound_master: simple-audio-card,codec { | |
| 75 | + sound-dai = <&sgtl5000>; | |
| 76 | + system-clock-frequency = <24000000>; | |
| 77 | + }; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + audio_mstrclk: mclk_osc { | |
| 81 | + compatible = "fixed-clock"; | |
| 82 | + #clock-cells = <0>; | |
| 83 | + clock-frequency = <24000000>; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + lcd0: display { | |
| 87 | + compatible = "primeview,pm070wl4", "panel-dpi"; | |
| 88 | + label = "lcd"; | |
| 89 | + | |
| 90 | + pinctrl-names = "default"; | |
| 91 | + pinctrl-0 = <&lcd_pins>; | |
| 92 | + | |
| 93 | + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; | |
| 94 | + | |
| 95 | + panel-timing { | |
| 96 | + clock-frequency = <32000000>; | |
| 97 | + hactive = <800>; | |
| 98 | + vactive = <480>; | |
| 99 | + hfront-porch = <42>; | |
| 100 | + hback-porch = <84>; | |
| 101 | + hsync-len = <128>; | |
| 102 | + vback-porch = <33>; | |
| 103 | + vfront-porch = <10>; | |
| 104 | + vsync-len = <2>; | |
| 105 | + hsync-active = <0>; | |
| 106 | + vsync-active = <0>; | |
| 107 | + de-active = <1>; | |
| 108 | + pixelclk-active = <1>; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + port { | |
| 112 | + lcd_in: endpoint { | |
| 113 | + remote-endpoint = <&dpi_out>; | |
| 114 | + }; | |
| 115 | + }; | |
| 116 | + }; | |
| 117 | +}; | |
| 118 | + | |
| 119 | +&am43xx_pinmux { | |
| 120 | + pinctrl-names = "default"; | |
| 121 | + pinctrl-0 = <&clkout1_pin &clkout2_pin &gpio_pins_default &wdt_time_out_pins_default &debugss_pins>; | |
| 122 | + | |
| 123 | + i2c0_pins: i2c0_pins { | |
| 124 | + pinctrl-single,pins = < | |
| 125 | + 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
| 126 | + 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
| 127 | + >; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + i2c1_pins: i2c1_pins { | |
| 131 | + pinctrl-single,pins = < | |
| 132 | + 0x110 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_rxerr.i2c1_scl */ | |
| 133 | + 0x10c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_crs.i2c1_sda */ | |
| 134 | + >; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + i2c2_pins: i2c2_pins { | |
| 138 | + pinctrl-single,pins = < | |
| 139 | + 0x1ec (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ | |
| 140 | + 0x1e8 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ | |
| 141 | + >; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + mmc1_pins: pinmux_mmc1_pins { | |
| 145 | + pinctrl-single,pins = < | |
| 146 | + 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ | |
| 147 | + 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ | |
| 148 | + 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ | |
| 149 | + 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ | |
| 150 | + 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ | |
| 151 | + 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ | |
| 152 | + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
| 153 | + >; | |
| 154 | + }; | |
| 155 | + | |
| 156 | + emmc_pins: pinmux_emmc_pins { | |
| 157 | + pinctrl-single,pins = < | |
| 158 | + 0x80 (PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
| 159 | + 0x84 (PIN_INPUT | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
| 160 | + 0x00 (PIN_INPUT | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ | |
| 161 | + 0x04 (PIN_INPUT | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ | |
| 162 | + 0x08 (PIN_INPUT | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ | |
| 163 | + 0x0c (PIN_INPUT | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ | |
| 164 | + 0x10 (PIN_INPUT | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ | |
| 165 | + 0x14 (PIN_INPUT | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ | |
| 166 | + 0x18 (PIN_INPUT | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ | |
| 167 | + 0x1c (PIN_INPUT | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ | |
| 168 | + >; | |
| 169 | + }; | |
| 170 | + | |
| 171 | + sdmmc_pins: pinmux_sdmmc_pins { | |
| 172 | + pinctrl-single,pins = < | |
| 173 | + 0x8c (PIN_INPUT | MUX_MODE3) /* gpmc_clk.mmc2_clk */ | |
| 174 | + 0x88 (PIN_INPUT | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ | |
| 175 | + 0x30 (PIN_INPUT | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ | |
| 176 | + 0x34 (PIN_INPUT | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ | |
| 177 | + 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ | |
| 178 | + 0x3c (PIN_INPUT | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ | |
| 179 | + 0x20 (PIN_INPUT | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */ | |
| 180 | + 0x24 (PIN_INPUT | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */ | |
| 181 | + 0x28 (PIN_INPUT | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */ | |
| 182 | + 0x2c (PIN_INPUT | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */ | |
| 183 | + >; | |
| 184 | + }; | |
| 185 | + | |
| 186 | + ehrpwm0b_pins: backlight_pins { | |
| 187 | + pinctrl-single,pins = < | |
| 188 | + 0x1d8 (PIN_OUTPUT | MUX_MODE6) /* cam1_vd.ehrpwm0B */ | |
| 189 | + >; | |
| 190 | + }; | |
| 191 | + | |
| 192 | + clkout1_pin: pinmux_clkout1_pin { | |
| 193 | + pinctrl-single,pins = < | |
| 194 | + 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */ | |
| 195 | + >; | |
| 196 | + }; | |
| 197 | + | |
| 198 | + clkout2_pin: pinmux_clkout2_pin { | |
| 199 | + pinctrl-single,pins = < | |
| 200 | + 0x274 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR1/CLKOUT2 */ | |
| 201 | + >; | |
| 202 | + }; | |
| 203 | + | |
| 204 | + dcan0_default: dcan0_default_pins { | |
| 205 | + pinctrl-single,pins = < | |
| 206 | + 0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.dcan0_rx */ | |
| 207 | + 0x178 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_ctsn.dcan0_tx */ | |
| 208 | + >; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + dcan1_default: dcan1_default_pins { | |
| 212 | + pinctrl-single,pins = < | |
| 213 | + 0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.dcan1_rx */ | |
| 214 | + 0x180 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.dcan1_tx */ | |
| 215 | + >; | |
| 216 | + }; | |
| 217 | + | |
| 218 | + uart0_pins: pinmux_uart0_pins { | |
| 219 | + pinctrl-single,pins = < | |
| 220 | + 0x168 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */ | |
| 221 | + 0x16c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */ | |
| 222 | + 0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
| 223 | + 0x174 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
| 224 | + >; | |
| 225 | + }; | |
| 226 | + | |
| 227 | + uart0_pins_sleep: pinmux_uart0_pins_sleep { | |
| 228 | + pinctrl-single,pins = < | |
| 229 | + 0x168 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 230 | + 0x16c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 231 | + 0x170 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 232 | + 0x174 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 233 | + >; | |
| 234 | + }; | |
| 235 | + | |
| 236 | + uart3_pins: pinmux_uart3_pins { | |
| 237 | + pinctrl-single,pins = < | |
| 238 | + 0x228 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart3_rxd.uart3_rxd */ | |
| 239 | + 0x22c (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart3_txd.uart3_txd */ | |
| 240 | + >; | |
| 241 | + }; | |
| 242 | + | |
| 243 | + uart3_pins_sleep: pinmux_uart3_pins_sleep { | |
| 244 | + pinctrl-single,pins = < | |
| 245 | + 0x228 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 246 | + 0x22c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 247 | + >; | |
| 248 | + }; | |
| 249 | + | |
| 250 | + uart2_pins: pinmux_uart2_pins { | |
| 251 | + pinctrl-single,pins = < | |
| 252 | + 0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE2) /* cam1_data6.uart2_ctsn */ | |
| 253 | + 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE2) /* cam1_data7_rtsn.uart2_rtsn */ | |
| 254 | + 0x1f8 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE2) /* cam1_data4_uart2rxd */ | |
| 255 | + 0x1fc (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE2) /* cam1_data5.uart2_txd */ | |
| 256 | + >; | |
| 257 | + }; | |
| 258 | + | |
| 259 | + uart2_pins_sleep: pinmux_uart2_pins_sleep { | |
| 260 | + pinctrl-single,pins = < | |
| 261 | + 0x200 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 262 | + 0x204 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 263 | + 0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 264 | + 0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 265 | + >; | |
| 266 | + }; | |
| 267 | + | |
| 268 | + uart4_pins: pinmux_uart4_pins { | |
| 269 | + pinctrl-single,pins = < | |
| 270 | + 0x070 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6) /* gpmc_wait0.uart4_rxd */ | |
| 271 | + 0x074 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6) /* gpmc_wpn.uart4_txd */ | |
| 272 | + >; | |
| 273 | + }; | |
| 274 | + | |
| 275 | + uart4_pins_sleep: pinmux_uart4_pins_sleep { | |
| 276 | + pinctrl-single,pins = < | |
| 277 | + 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 278 | + 0x174 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 279 | + >; | |
| 280 | + }; | |
| 281 | + | |
| 282 | + /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/ | |
| 283 | + gpio_pins_default: pinmux_gpio_pin { | |
| 284 | + pinctrl-single,pins = < | |
| 285 | + 0x26c (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_cs0.gpio0_23 */ | |
| 286 | + 0x264 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d0.gpio0_20 */ | |
| 287 | + 0x268 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d1.gpio0_21 */ | |
| 288 | + 0x260 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_sclk.gpio0_22 */ | |
| 289 | + 0x21c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data5.gpio4_27 */ | |
| 290 | + 0x224 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data7.gpio4_29 */ | |
| 291 | + 0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */ | |
| 292 | + 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_16 */ | |
| 293 | + 0x210 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data2.gpio4_24 */ | |
| 294 | + 0x214 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data3.gpio4_25 */ | |
| 295 | + 0x218 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data4.gpio4_26 */ | |
| 296 | + 0x220 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data6.gpio4_28 */ | |
| 297 | + >; | |
| 298 | + }; | |
| 299 | + | |
| 300 | + wdt_time_out_pins_default: pinmux_wdt_time_out_pin { | |
| 301 | + pinctrl-single,pins = < | |
| 302 | + 0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* uart3_rtsn.ehrpwm5B */ | |
| 303 | + >; | |
| 304 | + }; | |
| 305 | + | |
| 306 | + cpsw_default: cpsw_default { | |
| 307 | + pinctrl-single,pins = < | |
| 308 | + /* Slave 1 */ | |
| 309 | + 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ | |
| 310 | + 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
| 311 | + 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
| 312 | + 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
| 313 | + 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ | |
| 314 | + 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ | |
| 315 | + 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ | |
| 316 | + 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
| 317 | + 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
| 318 | + 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
| 319 | + 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ | |
| 320 | + 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ | |
| 321 | + | |
| 322 | + /* Slave 2 */ | |
| 323 | + 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ | |
| 324 | + 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
| 325 | + 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
| 326 | + 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
| 327 | + 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
| 328 | + 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
| 329 | + 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
| 330 | + 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ | |
| 331 | + 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
| 332 | + 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
| 333 | + 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
| 334 | + 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
| 335 | + >; | |
| 336 | + }; | |
| 337 | + | |
| 338 | + cpsw_sleep: cpsw_sleep { | |
| 339 | + pinctrl-single,pins = < | |
| 340 | + /* Slave 1 reset value */ | |
| 341 | + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 342 | + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 343 | + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 344 | + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 345 | + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 346 | + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 347 | + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 348 | + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 349 | + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 350 | + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 351 | + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 352 | + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 353 | + | |
| 354 | + /* Slave 2 reset value */ | |
| 355 | + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 356 | + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 357 | + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 358 | + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 359 | + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 360 | + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 361 | + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 362 | + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 363 | + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 364 | + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 365 | + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 366 | + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 367 | + >; | |
| 368 | + }; | |
| 369 | + | |
| 370 | + davinci_mdio_default: davinci_mdio_default { | |
| 371 | + pinctrl-single,pins = < | |
| 372 | + /* MDIO */ | |
| 373 | + 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
| 374 | + 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
| 375 | + >; | |
| 376 | + }; | |
| 377 | + | |
| 378 | + davinci_mdio_sleep: davinci_mdio_sleep { | |
| 379 | + pinctrl-single,pins = < | |
| 380 | + /* MDIO reset value */ | |
| 381 | + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 382 | + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 383 | + >; | |
| 384 | + }; | |
| 385 | + | |
| 386 | + dss_pins: dss_pins { | |
| 387 | + pinctrl-single,pins = < | |
| 388 | + 0x1b0 (PIN_OUTPUT | MUX_MODE2) /* cam0_hd.dss_data23 */ | |
| 389 | + 0x1b4 (PIN_OUTPUT | MUX_MODE2) /* cam0_vd.dss_data22 */ | |
| 390 | + 0x1b8 (PIN_OUTPUT | MUX_MODE2) /* cam0_field.dss_data21 */ | |
| 391 | + 0x1bc (PIN_OUTPUT | MUX_MODE2) /* cam0_wen.dss_data20 */ | |
| 392 | + 0x1c0 (PIN_OUTPUT | MUX_MODE2) /* cam0_pclk.dss_data19 */ | |
| 393 | + 0x1c4 (PIN_OUTPUT | MUX_MODE2) /* cam0_data8.dss_data18 */ | |
| 394 | + 0x1c8 (PIN_OUTPUT | MUX_MODE2) /* cam0_data9.dss_data17 */ | |
| 395 | + 0x1cc (PIN_OUTPUT | MUX_MODE2) /* cam1_data9.dss_data16 */ | |
| 396 | + 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ | |
| 397 | + 0x0a4 (PIN_OUTPUT | MUX_MODE0) | |
| 398 | + 0x0a8 (PIN_OUTPUT | MUX_MODE0) | |
| 399 | + 0x0ac (PIN_OUTPUT | MUX_MODE0) | |
| 400 | + 0x0b0 (PIN_OUTPUT | MUX_MODE0) | |
| 401 | + 0x0b4 (PIN_OUTPUT | MUX_MODE0) | |
| 402 | + 0x0b8 (PIN_OUTPUT | MUX_MODE0) | |
| 403 | + 0x0bc (PIN_OUTPUT | MUX_MODE0) | |
| 404 | + 0x0c0 (PIN_OUTPUT | MUX_MODE0) | |
| 405 | + 0x0c4 (PIN_OUTPUT | MUX_MODE0) | |
| 406 | + 0x0c8 (PIN_OUTPUT | MUX_MODE0) | |
| 407 | + 0x0cc (PIN_OUTPUT | MUX_MODE0) | |
| 408 | + 0x0d0 (PIN_OUTPUT | MUX_MODE0) | |
| 409 | + 0x0d4 (PIN_OUTPUT | MUX_MODE0) | |
| 410 | + 0x0d8 (PIN_OUTPUT | MUX_MODE0) | |
| 411 | + 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ | |
| 412 | + 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ | |
| 413 | + 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ | |
| 414 | + 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ | |
| 415 | + 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ | |
| 416 | + | |
| 417 | + >; | |
| 418 | + }; | |
| 419 | + | |
| 420 | + /* SPI_NOR Pins */ | |
| 421 | + spi0_pins: spi0_pins { | |
| 422 | + pinctrl-single,pins = < | |
| 423 | + 0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ | |
| 424 | + 0x150 (PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */ | |
| 425 | + 0x154 (PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */ | |
| 426 | + 0x158 (PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */ | |
| 427 | + >; | |
| 428 | + }; | |
| 429 | + | |
| 430 | + /* SPI0 Pins */ | |
| 431 | + spi2_pins: spi2_pins { | |
| 432 | + pinctrl-single,pins = < | |
| 433 | + 0x1d4 (PIN_OUTPUT | MUX_MODE4) /* cam1_hd.spi2_cs0 */ | |
| 434 | + 0x1e0 (PIN_OUTPUT | MUX_MODE4) /* cam1_field.spi2_cs0 */ | |
| 435 | + 0x1dc (PIN_INPUT | MUX_MODE4) /* cam1_pclk.spi2_sclk */ | |
| 436 | + 0x1d0 (PIN_INPUT | MUX_MODE4) /* cam1_data8.spi2_d0 */ | |
| 437 | + 0x1e4 (PIN_OUTPUT | MUX_MODE4) /* cam1_wen.spi2_d1 */ | |
| 438 | + >; | |
| 439 | + }; | |
| 440 | + | |
| 441 | + /* SPI1 Pins */ | |
| 442 | + spi4_pins: spi4_pins { | |
| 443 | + pinctrl-single,pins = < | |
| 444 | + 0x25c (PIN_OUTPUT | MUX_MODE0) /* spi4_cs0.spi4_cs0 */ | |
| 445 | + 0x230 (PIN_OUTPUT | MUX_MODE2) /* uart3_cstn.spi4_cs1 */ | |
| 446 | + 0x250 (PIN_INPUT | MUX_MODE0) /* spi4_sclk.spi4_sclk */ | |
| 447 | + 0x254 (PIN_INPUT | MUX_MODE0) /* spi4_d0.spi4_d0 */ | |
| 448 | + 0x258 (PIN_OUTPUT | MUX_MODE0) /* spi4_d1.spi4_d1 */ | |
| 449 | + >; | |
| 450 | + }; | |
| 451 | + | |
| 452 | + mcasp1_pins: mcasp1_pins { | |
| 453 | + pinctrl-single,pins = < | |
| 454 | + 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */ | |
| 455 | + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */ | |
| 456 | + 0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */ | |
| 457 | + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */ | |
| 458 | + >; | |
| 459 | + }; | |
| 460 | + | |
| 461 | + mcasp1_sleep_pins: mcasp1_sleep_pins { | |
| 462 | + pinctrl-single,pins = < | |
| 463 | + 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 464 | + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 465 | + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 466 | + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 467 | + >; | |
| 468 | + }; | |
| 469 | + | |
| 470 | + lcd_pins: lcd_pins { | |
| 471 | + pinctrl-single,pins = < | |
| 472 | + 0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_be0n_cle.gpio2_5 */ | |
| 473 | + >; | |
| 474 | + }; | |
| 475 | + | |
| 476 | + debugss_pins: pinmux_debugss_pins { | |
| 477 | + pinctrl-single,pins = < | |
| 478 | + 0x290 (PIN_INPUT_PULLDOWN) | |
| 479 | + 0x294 (PIN_INPUT_PULLDOWN) | |
| 480 | + 0x298 (PIN_INPUT_PULLDOWN) | |
| 481 | + 0x29C (PIN_INPUT_PULLDOWN) | |
| 482 | + 0x2A0 (PIN_INPUT_PULLDOWN) | |
| 483 | + 0x2A4 (PIN_INPUT_PULLDOWN) | |
| 484 | + 0x2A8 (PIN_INPUT_PULLDOWN) | |
| 485 | + >; | |
| 486 | + }; | |
| 487 | + | |
| 488 | + usb1_pins: usb1_pins { | |
| 489 | + pinctrl-single,pins = < | |
| 490 | + 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ | |
| 491 | + /* USB0 Over Current */ | |
| 492 | + 0x108 (PIN_INPUT | MUX_MODE9) /* mii1_col.gpio0_0 */ | |
| 493 | + >; | |
| 494 | + }; | |
| 495 | + | |
| 496 | + usb2_pins: usb2_pins { | |
| 497 | + pinctrl-single,pins = < | |
| 498 | + 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ | |
| 499 | + /* USB1 Over Current */ | |
| 500 | + 0x078 (PIN_INPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ | |
| 501 | + >; | |
| 502 | + }; | |
| 503 | +}; | |
| 504 | + | |
| 505 | +&i2c0 { | |
| 506 | + status = "okay"; | |
| 507 | + pinctrl-names = "default"; | |
| 508 | + pinctrl-0 = <&i2c0_pins>; | |
| 509 | + clock-frequency = <100000>; | |
| 510 | +}; | |
| 511 | + | |
| 512 | +&i2c1 { | |
| 513 | + status = "okay"; | |
| 514 | + pinctrl-names = "default"; | |
| 515 | + pinctrl-0 = <&i2c1_pins>; | |
| 516 | + clock-frequency = <100000>; | |
| 517 | + | |
| 518 | + tps@24 { | |
| 519 | + compatible = "ti,tps65218"; | |
| 520 | + reg = <0x24>; | |
| 521 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 522 | + interrupt-controller; | |
| 523 | + #interrupt-cells = <2>; | |
| 524 | + | |
| 525 | + dcdc1: regulator-dcdc1 { | |
| 526 | + compatible = "ti,tps65218-dcdc1"; | |
| 527 | + /* VDD_CORE limits min of OPP50 and max of OPP100 */ | |
| 528 | + regulator-name = "vdd_core"; | |
| 529 | + regulator-min-microvolt = <912000>; | |
| 530 | + regulator-max-microvolt = <1144000>; | |
| 531 | + regulator-boot-on; | |
| 532 | + regulator-always-on; | |
| 533 | + }; | |
| 534 | + | |
| 535 | + dcdc2: regulator-dcdc2 { | |
| 536 | + compatible = "ti,tps65218-dcdc2"; | |
| 537 | + /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ | |
| 538 | + regulator-name = "vdd_mpu"; | |
| 539 | + regulator-min-microvolt = <912000>; | |
| 540 | + regulator-max-microvolt = <1378000>; | |
| 541 | + regulator-boot-on; | |
| 542 | + regulator-always-on; | |
| 543 | + }; | |
| 544 | + | |
| 545 | + dcdc3: regulator-dcdc3 { | |
| 546 | + compatible = "ti,tps65218-dcdc3"; | |
| 547 | + regulator-name = "vdds_ddr"; | |
| 548 | + regulator-min-microvolt = <1500000>; | |
| 549 | + regulator-max-microvolt = <1500000>; | |
| 550 | + regulator-boot-on; | |
| 551 | + regulator-always-on; | |
| 552 | + regulator-state-mem { | |
| 553 | + regulator-on-in-suspend; | |
| 554 | + }; | |
| 555 | + regulator-state-disk { | |
| 556 | + regulator-off-in-suspend; | |
| 557 | + }; | |
| 558 | + }; | |
| 559 | + | |
| 560 | + dcdc4: regulator-dcdc4 { | |
| 561 | + compatible = "ti,tps65218-dcdc4"; | |
| 562 | + regulator-name = "v3_3d"; | |
| 563 | + regulator-min-microvolt = <3300000>; | |
| 564 | + regulator-max-microvolt = <3300000>; | |
| 565 | + regulator-boot-on; | |
| 566 | + regulator-always-on; | |
| 567 | + }; | |
| 568 | + | |
| 569 | + dcdc5: regulator-dcdc5 { | |
| 570 | + compatible = "ti,tps65218-dcdc5"; | |
| 571 | + regulator-name = "v1_0bat"; | |
| 572 | + regulator-min-microvolt = <1000000>; | |
| 573 | + regulator-max-microvolt = <1000000>; | |
| 574 | + regulator-boot-on; | |
| 575 | + regulator-always-on; | |
| 576 | + regulator-state-mem { | |
| 577 | + regulator-on-in-suspend; | |
| 578 | + }; | |
| 579 | + }; | |
| 580 | + | |
| 581 | + dcdc6: regulator-dcdc6 { | |
| 582 | + compatible = "ti,tps65218-dcdc6"; | |
| 583 | + regulator-name = "v1_8bat"; | |
| 584 | + regulator-min-microvolt = <1800000>; | |
| 585 | + regulator-max-microvolt = <1800000>; | |
| 586 | + regulator-boot-on; | |
| 587 | + regulator-always-on; | |
| 588 | + regulator-state-mem { | |
| 589 | + regulator-on-in-suspend; | |
| 590 | + }; | |
| 591 | + }; | |
| 592 | + | |
| 593 | + ldo1: regulator-ldo1 { | |
| 594 | + compatible = "ti,tps65218-ldo1"; | |
| 595 | + regulator-name = "v1_8d"; | |
| 596 | + regulator-min-microvolt = <1800000>; | |
| 597 | + regulator-max-microvolt = <1800000>; | |
| 598 | + regulator-boot-on; | |
| 599 | + regulator-always-on; | |
| 600 | + }; | |
| 601 | + | |
| 602 | + power-button { | |
| 603 | + compatible = "ti,tps65218-pwrbutton"; | |
| 604 | + status = "okay"; | |
| 605 | + interrupts = <3 IRQ_TYPE_EDGE_BOTH>; | |
| 606 | + }; | |
| 607 | + }; | |
| 608 | + | |
| 609 | + s35390a: s35390a@30 { | |
| 610 | + compatible = "s35390a"; | |
| 611 | + reg = <0x30>; | |
| 612 | + }; | |
| 613 | + | |
| 614 | + at24@50 { | |
| 615 | + compatible = "at24,24c256"; | |
| 616 | + reg = <0x50>; | |
| 617 | + }; | |
| 618 | + | |
| 619 | + at24@57 { | |
| 620 | + compatible = "at24,24c256"; | |
| 621 | + reg = <0x57>; | |
| 622 | + }; | |
| 623 | + | |
| 624 | + /* For TI TLV320AIC3106 Audio Codec */ | |
| 625 | + /*tlv320aic3106: tlv320aic3106@1b { | |
| 626 | + #sound-dai-cells = <0>; | |
| 627 | + compatible = "ti,tlv320aic3106"; | |
| 628 | + reg = <0x1b>; | |
| 629 | + status = "okay"; | |
| 630 | + | |
| 631 | + AVDD-supply = <&dcdc4>; | |
| 632 | + IOVDD-supply = <&dcdc6>; | |
| 633 | + DRVDD-supply = <&dcdc4>; | |
| 634 | + DVDD-supply = <&ldo1>; | |
| 635 | + };*/ | |
| 636 | + | |
| 637 | + /* For Freescale SGTL5000 Audio Codec */ | |
| 638 | + sgtl5000: sgtl5000@0a { | |
| 639 | + #sound-dai-cells = <0>; | |
| 640 | + compatible = "fsl,sgtl5000"; | |
| 641 | + reg = <0x0a>; | |
| 642 | + clocks = <&audio_mstrclk>; | |
| 643 | + VDDA-supply = <&dcdc4>; | |
| 644 | + VDDIO-supply = <&dcdc6>; | |
| 645 | + VDDD-supply = <&ldo1>; | |
| 646 | + }; | |
| 647 | +}; | |
| 648 | + | |
| 649 | +&i2c2 { | |
| 650 | + status = "okay"; | |
| 651 | + pinctrl-names = "default"; | |
| 652 | + pinctrl-0 = <&i2c2_pins>; | |
| 653 | + clock-frequency = <100000>; | |
| 654 | + | |
| 655 | + /* CH7055A Parallel LCD to VGA D-SUB 15 way */ | |
| 656 | + eeprom@76 { | |
| 657 | + compatible = "at,24c256"; | |
| 658 | + reg = <0x76>; | |
| 659 | + }; | |
| 660 | +}; | |
| 661 | + | |
| 662 | + | |
| 663 | +&epwmss0 { | |
| 664 | + status = "okay"; | |
| 665 | + | |
| 666 | + ehrpwm0: ehrpwm@48300200 { | |
| 667 | + status = "okay"; | |
| 668 | + pinctrl-names = "default"; | |
| 669 | + pinctrl-0 = <&ehrpwm0b_pins>; | |
| 670 | + }; | |
| 671 | +}; | |
| 672 | + | |
| 673 | +&gpio0 { | |
| 674 | + status = "okay"; | |
| 675 | +}; | |
| 676 | + | |
| 677 | +&gpio1 { | |
| 678 | + status = "okay"; | |
| 679 | +}; | |
| 680 | + | |
| 681 | +&gpio2 { | |
| 682 | + status = "okay"; | |
| 683 | +}; | |
| 684 | + | |
| 685 | +&gpio3 { | |
| 686 | + status = "okay"; | |
| 687 | +}; | |
| 688 | + | |
| 689 | +&gpio4 { | |
| 690 | + status = "okay"; | |
| 691 | +}; | |
| 692 | + | |
| 693 | +&gpio5 { | |
| 694 | + status = "okay"; | |
| 695 | +}; | |
| 696 | + | |
| 697 | +&mmc1 { | |
| 698 | + status = "okay"; | |
| 699 | + pinctrl-names = "default"; | |
| 700 | + pinctrl-0 = <&mmc1_pins>; | |
| 701 | + | |
| 702 | + vmmc-supply = <&dcdc4>; | |
| 703 | + bus-width = <4>; | |
| 704 | + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; | |
| 705 | +}; | |
| 706 | + | |
| 707 | +&mmc2 { | |
| 708 | + pinctrl-names = "default"; | |
| 709 | + pinctrl-0 = <&emmc_pins>; | |
| 710 | + bus-width = <8>; | |
| 711 | + vmmc-supply = <&vmmcwl_fixed>; | |
| 712 | + status = "okay"; | |
| 713 | + ti,non-removable; | |
| 714 | +}; | |
| 715 | + | |
| 716 | +/*If carrier board eMMC (or 2nd SD slot) is present and used, un-comment out the following nodes. SD card will be emulated /dev/mmcblk2 instead of /dev/mmcblk1*/ | |
| 717 | + | |
| 718 | +&mmc3 { | |
| 719 | + status = "okay"; | |
| 720 | + dmas = <&edma 30 | |
| 721 | + &edma 31>; | |
| 722 | + dma-names = "tx", "rx"; | |
| 723 | + vmmc-supply = <&vmmcwl_fixed>; | |
| 724 | + bus-width = <8>; | |
| 725 | + pinctrl-names = "default"; | |
| 726 | + pinctrl-0 = <&sdmmc_pins>; | |
| 727 | + keep-power-in-suspend; | |
| 728 | + ti,non-removable; | |
| 729 | +}; | |
| 730 | + | |
| 731 | +&edma { | |
| 732 | + ti,edma-xbar-event-map = /bits/ 16 <1 30 | |
| 733 | + 2 31>; | |
| 734 | +}; | |
| 735 | + | |
| 736 | +/* Four-Wire Resistive Touch */ | |
| 737 | +&tscadc { | |
| 738 | + status = "disabled"; | |
| 739 | + tsc { | |
| 740 | + ti,wires = <4>; | |
| 741 | + ti,x-plate-resistance = <200>; | |
| 742 | + ti,coordinate-readouts = <5>; | |
| 743 | + ti,wire-config = <0x00 0x11 0x22 0x33>; | |
| 744 | + ti,charge-delay = <0xB000>; | |
| 745 | + }; | |
| 746 | + | |
| 747 | + adc { | |
| 748 | + ti,adc-channels = <0 1 2 3>; | |
| 749 | + }; | |
| 750 | +}; | |
| 751 | + | |
| 752 | +&usb2_phy1 { | |
| 753 | + status = "okay"; | |
| 754 | +}; | |
| 755 | + | |
| 756 | +&usb1 { | |
| 757 | + dr_mode = "host"; | |
| 758 | + status = "okay"; | |
| 759 | + pinctrl-names = "default"; | |
| 760 | + pinctrl-0 = <&usb1_pins>; | |
| 761 | +}; | |
| 762 | + | |
| 763 | +&usb2_phy2 { | |
| 764 | + status = "okay"; | |
| 765 | +}; | |
| 766 | + | |
| 767 | +&usb2 { | |
| 768 | + dr_mode = "host"; | |
| 769 | + status = "okay"; | |
| 770 | + pinctrl-names = "default"; | |
| 771 | + pinctrl-0 = <&usb2_pins>; | |
| 772 | +}; | |
| 773 | + | |
| 774 | +&spi0 { | |
| 775 | + ti,spi-num-cs = <1>; | |
| 776 | + status = "okay"; | |
| 777 | + pinctrl-names = "default"; | |
| 778 | + pinctrl-0 = <&spi0_pins>; | |
| 779 | + dmas = <&edma 16 | |
| 780 | + &edma 17>; | |
| 781 | + dma-names = "tx0", "rx0"; | |
| 782 | + | |
| 783 | + flash: mx25u3235f@0 { | |
| 784 | + #address-cells = <1>; | |
| 785 | + #size-cells = <1>; | |
| 786 | + compatible = "jedec,spi-nor"; | |
| 787 | + spi-max-frequency = <24000000>; | |
| 788 | + reg = <0>; | |
| 789 | + | |
| 790 | + /* MTD partition table. | |
| 791 | + * The ROM checks the first 512KiB | |
| 792 | + * for a valid file to boot(XIP). | |
| 793 | + */ | |
| 794 | + partition@0 { | |
| 795 | + label = "U-Boot"; | |
| 796 | + reg = <0x0 0x100000>; | |
| 797 | + }; | |
| 798 | + | |
| 799 | + partition@100000 { | |
| 800 | + label = "U-Boot Environment"; | |
| 801 | + reg = <0x100000 0x080000>; | |
| 802 | + }; | |
| 803 | + | |
| 804 | + partition@180000 { | |
| 805 | + label = "Flattened Device Tree"; | |
| 806 | + reg = <0x180000 0x200000>; | |
| 807 | + }; | |
| 808 | + | |
| 809 | + }; | |
| 810 | +}; | |
| 811 | + | |
| 812 | +&spi2 { | |
| 813 | + ti,spi-num-cs = <2>; | |
| 814 | + status = "okay"; | |
| 815 | + pinctrl-names = "default"; | |
| 816 | + pinctrl-0 = <&spi2_pins>; | |
| 817 | + dmas = <&edma 18 | |
| 818 | + &edma 19 | |
| 819 | + &edma 20 | |
| 820 | + &edma 21>; | |
| 821 | + dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| 822 | + | |
| 823 | + spidev1: spidev@0 { | |
| 824 | + #address-cells = <1>; | |
| 825 | + #size-cells = <0>; | |
| 826 | + compatible = "spidev"; | |
| 827 | + reg = <0>; | |
| 828 | + spi-max-frequency = <24000000>; | |
| 829 | + }; | |
| 830 | + | |
| 831 | + spidev2: spidev@1 { | |
| 832 | + #address-cells = <1>; | |
| 833 | + #size-cells = <0>; | |
| 834 | + compatible = "spidev"; | |
| 835 | + reg = <1>; | |
| 836 | + spi-max-frequency = <24000000>; | |
| 837 | + }; | |
| 838 | + }; | |
| 839 | + | |
| 840 | +&spi4 { | |
| 841 | + ti,spi-num-cs = <2>; | |
| 842 | + status = "okay"; | |
| 843 | + pinctrl-names = "default"; | |
| 844 | + pinctrl-0 = <&spi4_pins>; | |
| 845 | + dmas = <&edma 26 | |
| 846 | + &edma 27 | |
| 847 | + &edma 28 | |
| 848 | + &edma 29>; | |
| 849 | + dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| 850 | + | |
| 851 | + spidev3: spidev@0 { | |
| 852 | + #address-cells = <1>; | |
| 853 | + #size-cells = <0>; | |
| 854 | + compatible = "spidev"; | |
| 855 | + reg = <0>; | |
| 856 | + spi-max-frequency = <24000000>; | |
| 857 | + }; | |
| 858 | + | |
| 859 | + spidev4: spidev@1 { | |
| 860 | + #address-cells = <1>; | |
| 861 | + #size-cells = <0>; | |
| 862 | + compatible = "spidev"; | |
| 863 | + reg = <1>; | |
| 864 | + spi-max-frequency = <24000000>; | |
| 865 | + }; | |
| 866 | + }; | |
| 867 | + | |
| 868 | +&uart0 { | |
| 869 | + pinctrl-names = "default"; | |
| 870 | + pinctrl-0 = <&uart0_pins>; | |
| 871 | + pinctrl-1 = <&uart0_pins_sleep>; | |
| 872 | + | |
| 873 | + status = "okay"; | |
| 874 | +}; | |
| 875 | + | |
| 876 | +&uart3 { | |
| 877 | + pinctrl-names = "default"; | |
| 878 | + pinctrl-0 = <&uart3_pins>; | |
| 879 | + pinctrl-1 = <&uart3_pins_sleep>; | |
| 880 | + | |
| 881 | + status = "okay"; | |
| 882 | +}; | |
| 883 | + | |
| 884 | +&uart2 { | |
| 885 | + pinctrl-names = "default"; | |
| 886 | + pinctrl-0 = <&uart2_pins>; | |
| 887 | + pinctrl-1 = <&uart2_pins_sleep>; | |
| 888 | + | |
| 889 | + status = "okay"; | |
| 890 | +}; | |
| 891 | + | |
| 892 | +&uart4 { | |
| 893 | + pinctrl-names = "default"; | |
| 894 | + pinctrl-0 = <&uart4_pins>; | |
| 895 | + pinctrl-1 = <&uart4_pins_sleep>; | |
| 896 | + | |
| 897 | + status = "okay"; | |
| 898 | +}; | |
| 899 | + | |
| 900 | +&dcan0 { | |
| 901 | + pinctrl-names = "default"; | |
| 902 | + pinctrl-0 = <&dcan0_default>; | |
| 903 | + status = "okay"; | |
| 904 | +}; | |
| 905 | + | |
| 906 | +&dcan1 { | |
| 907 | + pinctrl-names = "default"; | |
| 908 | + pinctrl-0 = <&dcan1_default>; | |
| 909 | + status = "okay"; | |
| 910 | +}; | |
| 911 | + | |
| 912 | +&mac { | |
| 913 | + pinctrl-names = "default", "sleep"; | |
| 914 | + pinctrl-0 = <&cpsw_default>; | |
| 915 | + pinctrl-1 = <&cpsw_sleep>; | |
| 916 | + dual_emac = <1>; | |
| 917 | + status = "okay"; | |
| 918 | +}; | |
| 919 | + | |
| 920 | +&davinci_mdio { | |
| 921 | + pinctrl-names = "default", "sleep"; | |
| 922 | + pinctrl-0 = <&davinci_mdio_default>; | |
| 923 | + pinctrl-1 = <&davinci_mdio_sleep>; | |
| 924 | + status = "okay"; | |
| 925 | +}; | |
| 926 | + | |
| 927 | +&cpsw_emac0 { | |
| 928 | + phy_id = <&davinci_mdio>, <6>; | |
| 929 | + phy-mode = "rgmii"; | |
| 930 | + dual_emac_res_vlan = <1>; | |
| 931 | +}; | |
| 932 | + | |
| 933 | +&cpsw_emac1 { | |
| 934 | + phy_id = <&davinci_mdio>, <7>; | |
| 935 | + phy-mode = "rgmii"; | |
| 936 | + dual_emac_res_vlan = <2>; | |
| 937 | +}; | |
| 938 | + | |
| 939 | +&elm { | |
| 940 | + status = "okay"; | |
| 941 | +}; | |
| 942 | + | |
| 943 | +&mcasp1 { | |
| 944 | + #sound-dai-cells = <0>; | |
| 945 | + pinctrl-names = "default", "sleep"; | |
| 946 | + pinctrl-0 = <&mcasp1_pins>; | |
| 947 | + pinctrl-1 = <&mcasp1_sleep_pins>; | |
| 948 | + | |
| 949 | + status = "okay"; | |
| 950 | + | |
| 951 | + op-mode = <0>; /* MCASP_IIS_MODE */ | |
| 952 | + tdm-slots = <2>; | |
| 953 | + /* 4 serializers */ | |
| 954 | + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
| 955 | + 1 2 0 0 | |
| 956 | + >; | |
| 957 | + | |
| 958 | + tx-num-evt = <1>; | |
| 959 | + rx-num-evt = <1>; | |
| 960 | +}; | |
| 961 | + | |
| 962 | +&dss { | |
| 963 | + status = "okay"; | |
| 964 | + | |
| 965 | + pinctrl-names = "default"; | |
| 966 | + pinctrl-0 = <&dss_pins>; | |
| 967 | + | |
| 968 | + port { | |
| 969 | + dpi_out: endpoint@0 { | |
| 970 | + remote-endpoint = <&lcd_in>; | |
| 971 | + data-lines = <24>; | |
| 972 | + }; | |
| 973 | + }; | |
| 974 | +}; | |
| 975 | + | |
| 976 | +&rtc { | |
| 977 | + status = "disabled"; /* Use Seiko S35390A on Module instead */ | |
| 978 | + ext-clk-src; | |
| 979 | +}; | |
| 980 | + | |
| 981 | +&wdt { | |
| 982 | + status = "okay"; | |
| 983 | +}; | |
| 984 | + | |
| 985 | +&cpu { | |
| 986 | + cpu0-supply = <&dcdc2>; | |
| 987 | +}; |
arch/arm/dts/am437x-smarct437x-uart2.dts
| 1 | +/* | |
| 2 | + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/* AM437x SK EVM */ | |
| 10 | + | |
| 11 | +/dts-v1/; | |
| 12 | + | |
| 13 | +#include "am4372.dtsi" | |
| 14 | +#include <dt-bindings/pinctrl/am43xx.h> | |
| 15 | +#include <dt-bindings/pwm/pwm.h> | |
| 16 | +#include <dt-bindings/gpio/gpio.h> | |
| 17 | +#include <dt-bindings/input/input.h> | |
| 18 | + | |
| 19 | +/ { | |
| 20 | + model = "TI AM437x SMARCT437X"; | |
| 21 | + compatible = "ti,am437x-smarct437x","ti,am4372","ti,am43"; | |
| 22 | + | |
| 23 | + aliases { | |
| 24 | + display0 = &lcd0; | |
| 25 | + }; | |
| 26 | + | |
| 27 | + chosen { | |
| 28 | + stdout-path = &uart3; | |
| 29 | + tick-timer = &timer2; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + vmmcwl_fixed: fixedregulator-mmcwl { | |
| 33 | + compatible = "regulator-fixed"; | |
| 34 | + regulator-name = "vmmcwl_fixed"; | |
| 35 | + regulator-min-microvolt = <1800000>; | |
| 36 | + regulator-max-microvolt = <1800000>; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + backlight { | |
| 40 | + compatible = "pwm-backlight"; | |
| 41 | + enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; /* Backlight Enable Pin*/ | |
| 42 | + pwms = <&ehrpwm0 1 250000 PWM_POLARITY_INVERTED>; | |
| 43 | + brightness-levels = <0 51 53 56 62 75 128 212 255>; | |
| 44 | + default-brightness-level = <7>; /* 7 is the brightest */ | |
| 45 | + }; | |
| 46 | + | |
| 47 | + sound: sound@0 { | |
| 48 | + compatible = "simple-audio-card"; | |
| 49 | + simple-audio-card,name = "SMARCT437X SOUND CARD"; | |
| 50 | + simple-audio-card,widgets = | |
| 51 | + "Headphone", "Headphone Jack", | |
| 52 | + "Line", "Line In"; | |
| 53 | + simple-audio-card,routing = | |
| 54 | + "Headphone Jack", "HPLOUT", | |
| 55 | + "Headphone Jack", "HPROUT", | |
| 56 | + "LINE1L", "Line In", | |
| 57 | + "LINE1R", "Line In"; | |
| 58 | + simple-audio-card,format = "dsp_b"; | |
| 59 | + simple-audio-card,bitclock-master = <&sound_master>; | |
| 60 | + simple-audio-card,frame-master = <&sound_master>; | |
| 61 | + simple-audio-card,bitclock-inversion; | |
| 62 | + | |
| 63 | + simple-audio-card,cpu { | |
| 64 | + sound-dai = <&mcasp1>; | |
| 65 | + system-clock-frequency = <12000000>; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + /* For TI TLV320AIC3106 Audio Codec */ | |
| 69 | + /*sound_master: simple-audio-card,codec { | |
| 70 | + sound-dai = <&tlv320aic3106>; | |
| 71 | + system-clock-frequency = <24576000>;*/ | |
| 72 | + | |
| 73 | + /* For Freescale SGTL5000 Audio Codec */ | |
| 74 | + sound_master: simple-audio-card,codec { | |
| 75 | + sound-dai = <&sgtl5000>; | |
| 76 | + system-clock-frequency = <24000000>; | |
| 77 | + }; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + audio_mstrclk: mclk_osc { | |
| 81 | + compatible = "fixed-clock"; | |
| 82 | + #clock-cells = <0>; | |
| 83 | + clock-frequency = <24000000>; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + lcd0: display { | |
| 87 | + compatible = "primeview,pm070wl4", "panel-dpi"; | |
| 88 | + label = "lcd"; | |
| 89 | + | |
| 90 | + pinctrl-names = "default"; | |
| 91 | + pinctrl-0 = <&lcd_pins>; | |
| 92 | + | |
| 93 | + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; | |
| 94 | + | |
| 95 | + panel-timing { | |
| 96 | + clock-frequency = <32000000>; | |
| 97 | + hactive = <800>; | |
| 98 | + vactive = <480>; | |
| 99 | + hfront-porch = <42>; | |
| 100 | + hback-porch = <84>; | |
| 101 | + hsync-len = <128>; | |
| 102 | + vback-porch = <33>; | |
| 103 | + vfront-porch = <10>; | |
| 104 | + vsync-len = <2>; | |
| 105 | + hsync-active = <0>; | |
| 106 | + vsync-active = <0>; | |
| 107 | + de-active = <1>; | |
| 108 | + pixelclk-active = <1>; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + port { | |
| 112 | + lcd_in: endpoint { | |
| 113 | + remote-endpoint = <&dpi_out>; | |
| 114 | + }; | |
| 115 | + }; | |
| 116 | + }; | |
| 117 | +}; | |
| 118 | + | |
| 119 | +&am43xx_pinmux { | |
| 120 | + pinctrl-names = "default"; | |
| 121 | + pinctrl-0 = <&clkout1_pin &clkout2_pin &gpio_pins_default &wdt_time_out_pins_default &debugss_pins>; | |
| 122 | + | |
| 123 | + i2c0_pins: i2c0_pins { | |
| 124 | + pinctrl-single,pins = < | |
| 125 | + 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
| 126 | + 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
| 127 | + >; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + i2c1_pins: i2c1_pins { | |
| 131 | + pinctrl-single,pins = < | |
| 132 | + 0x110 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_rxerr.i2c1_scl */ | |
| 133 | + 0x10c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_crs.i2c1_sda */ | |
| 134 | + >; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + i2c2_pins: i2c2_pins { | |
| 138 | + pinctrl-single,pins = < | |
| 139 | + 0x1ec (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ | |
| 140 | + 0x1e8 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ | |
| 141 | + >; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + mmc1_pins: pinmux_mmc1_pins { | |
| 145 | + pinctrl-single,pins = < | |
| 146 | + 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ | |
| 147 | + 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ | |
| 148 | + 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ | |
| 149 | + 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ | |
| 150 | + 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ | |
| 151 | + 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ | |
| 152 | + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
| 153 | + >; | |
| 154 | + }; | |
| 155 | + | |
| 156 | + emmc_pins: pinmux_emmc_pins { | |
| 157 | + pinctrl-single,pins = < | |
| 158 | + 0x80 (PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
| 159 | + 0x84 (PIN_INPUT | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
| 160 | + 0x00 (PIN_INPUT | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ | |
| 161 | + 0x04 (PIN_INPUT | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ | |
| 162 | + 0x08 (PIN_INPUT | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ | |
| 163 | + 0x0c (PIN_INPUT | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ | |
| 164 | + 0x10 (PIN_INPUT | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ | |
| 165 | + 0x14 (PIN_INPUT | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ | |
| 166 | + 0x18 (PIN_INPUT | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ | |
| 167 | + 0x1c (PIN_INPUT | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ | |
| 168 | + >; | |
| 169 | + }; | |
| 170 | + | |
| 171 | + sdmmc_pins: pinmux_sdmmc_pins { | |
| 172 | + pinctrl-single,pins = < | |
| 173 | + 0x8c (PIN_INPUT | MUX_MODE3) /* gpmc_clk.mmc2_clk */ | |
| 174 | + 0x88 (PIN_INPUT | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ | |
| 175 | + 0x30 (PIN_INPUT | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ | |
| 176 | + 0x34 (PIN_INPUT | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ | |
| 177 | + 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ | |
| 178 | + 0x3c (PIN_INPUT | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ | |
| 179 | + 0x20 (PIN_INPUT | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */ | |
| 180 | + 0x24 (PIN_INPUT | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */ | |
| 181 | + 0x28 (PIN_INPUT | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */ | |
| 182 | + 0x2c (PIN_INPUT | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */ | |
| 183 | + >; | |
| 184 | + }; | |
| 185 | + | |
| 186 | + ehrpwm0b_pins: backlight_pins { | |
| 187 | + pinctrl-single,pins = < | |
| 188 | + 0x1d8 (PIN_OUTPUT | MUX_MODE6) /* cam1_vd.ehrpwm0B */ | |
| 189 | + >; | |
| 190 | + }; | |
| 191 | + | |
| 192 | + clkout1_pin: pinmux_clkout1_pin { | |
| 193 | + pinctrl-single,pins = < | |
| 194 | + 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */ | |
| 195 | + >; | |
| 196 | + }; | |
| 197 | + | |
| 198 | + clkout2_pin: pinmux_clkout2_pin { | |
| 199 | + pinctrl-single,pins = < | |
| 200 | + 0x274 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR1/CLKOUT2 */ | |
| 201 | + >; | |
| 202 | + }; | |
| 203 | + | |
| 204 | + dcan0_default: dcan0_default_pins { | |
| 205 | + pinctrl-single,pins = < | |
| 206 | + 0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.dcan0_rx */ | |
| 207 | + 0x178 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_ctsn.dcan0_tx */ | |
| 208 | + >; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + dcan1_default: dcan1_default_pins { | |
| 212 | + pinctrl-single,pins = < | |
| 213 | + 0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.dcan1_rx */ | |
| 214 | + 0x180 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.dcan1_tx */ | |
| 215 | + >; | |
| 216 | + }; | |
| 217 | + | |
| 218 | + uart0_pins: pinmux_uart0_pins { | |
| 219 | + pinctrl-single,pins = < | |
| 220 | + 0x168 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */ | |
| 221 | + 0x16c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */ | |
| 222 | + 0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
| 223 | + 0x174 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
| 224 | + >; | |
| 225 | + }; | |
| 226 | + | |
| 227 | + uart0_pins_sleep: pinmux_uart0_pins_sleep { | |
| 228 | + pinctrl-single,pins = < | |
| 229 | + 0x168 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 230 | + 0x16c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 231 | + 0x170 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 232 | + 0x174 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 233 | + >; | |
| 234 | + }; | |
| 235 | + | |
| 236 | + uart3_pins: pinmux_uart3_pins { | |
| 237 | + pinctrl-single,pins = < | |
| 238 | + 0x228 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart3_rxd.uart3_rxd */ | |
| 239 | + 0x22c (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart3_txd.uart3_txd */ | |
| 240 | + >; | |
| 241 | + }; | |
| 242 | + | |
| 243 | + uart3_pins_sleep: pinmux_uart3_pins_sleep { | |
| 244 | + pinctrl-single,pins = < | |
| 245 | + 0x228 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 246 | + 0x22c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 247 | + >; | |
| 248 | + }; | |
| 249 | + | |
| 250 | + uart2_pins: pinmux_uart2_pins { | |
| 251 | + pinctrl-single,pins = < | |
| 252 | + 0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE2) /* cam1_data6.uart2_ctsn */ | |
| 253 | + 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE2) /* cam1_data7_rtsn.uart2_rtsn */ | |
| 254 | + 0x1f8 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE2) /* cam1_data4_uart2rxd */ | |
| 255 | + 0x1fc (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE2) /* cam1_data5.uart2_txd */ | |
| 256 | + >; | |
| 257 | + }; | |
| 258 | + | |
| 259 | + uart2_pins_sleep: pinmux_uart2_pins_sleep { | |
| 260 | + pinctrl-single,pins = < | |
| 261 | + 0x200 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 262 | + 0x204 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 263 | + 0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 264 | + 0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 265 | + >; | |
| 266 | + }; | |
| 267 | + | |
| 268 | + uart4_pins: pinmux_uart4_pins { | |
| 269 | + pinctrl-single,pins = < | |
| 270 | + 0x070 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6) /* gpmc_wait0.uart4_rxd */ | |
| 271 | + 0x074 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6) /* gpmc_wpn.uart4_txd */ | |
| 272 | + >; | |
| 273 | + }; | |
| 274 | + | |
| 275 | + uart4_pins_sleep: pinmux_uart4_pins_sleep { | |
| 276 | + pinctrl-single,pins = < | |
| 277 | + 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 278 | + 0x174 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 279 | + >; | |
| 280 | + }; | |
| 281 | + | |
| 282 | + /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/ | |
| 283 | + gpio_pins_default: pinmux_gpio_pin { | |
| 284 | + pinctrl-single,pins = < | |
| 285 | + 0x26c (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_cs0.gpio0_23 */ | |
| 286 | + 0x264 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d0.gpio0_20 */ | |
| 287 | + 0x268 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d1.gpio0_21 */ | |
| 288 | + 0x260 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_sclk.gpio0_22 */ | |
| 289 | + 0x21c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data5.gpio4_27 */ | |
| 290 | + 0x224 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data7.gpio4_29 */ | |
| 291 | + 0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */ | |
| 292 | + 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_16 */ | |
| 293 | + 0x210 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data2.gpio4_24 */ | |
| 294 | + 0x214 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data3.gpio4_25 */ | |
| 295 | + 0x218 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data4.gpio4_26 */ | |
| 296 | + 0x220 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data6.gpio4_28 */ | |
| 297 | + >; | |
| 298 | + }; | |
| 299 | + | |
| 300 | + wdt_time_out_pins_default: pinmux_wdt_time_out_pin { | |
| 301 | + pinctrl-single,pins = < | |
| 302 | + 0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* uart3_rtsn.ehrpwm5B */ | |
| 303 | + >; | |
| 304 | + }; | |
| 305 | + | |
| 306 | + cpsw_default: cpsw_default { | |
| 307 | + pinctrl-single,pins = < | |
| 308 | + /* Slave 1 */ | |
| 309 | + 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ | |
| 310 | + 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
| 311 | + 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
| 312 | + 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
| 313 | + 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ | |
| 314 | + 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ | |
| 315 | + 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ | |
| 316 | + 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
| 317 | + 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
| 318 | + 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
| 319 | + 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ | |
| 320 | + 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ | |
| 321 | + | |
| 322 | + /* Slave 2 */ | |
| 323 | + 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ | |
| 324 | + 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
| 325 | + 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
| 326 | + 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
| 327 | + 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
| 328 | + 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
| 329 | + 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
| 330 | + 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ | |
| 331 | + 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
| 332 | + 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
| 333 | + 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
| 334 | + 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
| 335 | + >; | |
| 336 | + }; | |
| 337 | + | |
| 338 | + cpsw_sleep: cpsw_sleep { | |
| 339 | + pinctrl-single,pins = < | |
| 340 | + /* Slave 1 reset value */ | |
| 341 | + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 342 | + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 343 | + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 344 | + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 345 | + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 346 | + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 347 | + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 348 | + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 349 | + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 350 | + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 351 | + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 352 | + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 353 | + | |
| 354 | + /* Slave 2 reset value */ | |
| 355 | + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 356 | + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 357 | + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 358 | + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 359 | + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 360 | + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 361 | + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 362 | + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 363 | + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 364 | + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 365 | + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 366 | + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 367 | + >; | |
| 368 | + }; | |
| 369 | + | |
| 370 | + davinci_mdio_default: davinci_mdio_default { | |
| 371 | + pinctrl-single,pins = < | |
| 372 | + /* MDIO */ | |
| 373 | + 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
| 374 | + 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
| 375 | + >; | |
| 376 | + }; | |
| 377 | + | |
| 378 | + davinci_mdio_sleep: davinci_mdio_sleep { | |
| 379 | + pinctrl-single,pins = < | |
| 380 | + /* MDIO reset value */ | |
| 381 | + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 382 | + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 383 | + >; | |
| 384 | + }; | |
| 385 | + | |
| 386 | + dss_pins: dss_pins { | |
| 387 | + pinctrl-single,pins = < | |
| 388 | + 0x1b0 (PIN_OUTPUT | MUX_MODE2) /* cam0_hd.dss_data23 */ | |
| 389 | + 0x1b4 (PIN_OUTPUT | MUX_MODE2) /* cam0_vd.dss_data22 */ | |
| 390 | + 0x1b8 (PIN_OUTPUT | MUX_MODE2) /* cam0_field.dss_data21 */ | |
| 391 | + 0x1bc (PIN_OUTPUT | MUX_MODE2) /* cam0_wen.dss_data20 */ | |
| 392 | + 0x1c0 (PIN_OUTPUT | MUX_MODE2) /* cam0_pclk.dss_data19 */ | |
| 393 | + 0x1c4 (PIN_OUTPUT | MUX_MODE2) /* cam0_data8.dss_data18 */ | |
| 394 | + 0x1c8 (PIN_OUTPUT | MUX_MODE2) /* cam0_data9.dss_data17 */ | |
| 395 | + 0x1cc (PIN_OUTPUT | MUX_MODE2) /* cam1_data9.dss_data16 */ | |
| 396 | + 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ | |
| 397 | + 0x0a4 (PIN_OUTPUT | MUX_MODE0) | |
| 398 | + 0x0a8 (PIN_OUTPUT | MUX_MODE0) | |
| 399 | + 0x0ac (PIN_OUTPUT | MUX_MODE0) | |
| 400 | + 0x0b0 (PIN_OUTPUT | MUX_MODE0) | |
| 401 | + 0x0b4 (PIN_OUTPUT | MUX_MODE0) | |
| 402 | + 0x0b8 (PIN_OUTPUT | MUX_MODE0) | |
| 403 | + 0x0bc (PIN_OUTPUT | MUX_MODE0) | |
| 404 | + 0x0c0 (PIN_OUTPUT | MUX_MODE0) | |
| 405 | + 0x0c4 (PIN_OUTPUT | MUX_MODE0) | |
| 406 | + 0x0c8 (PIN_OUTPUT | MUX_MODE0) | |
| 407 | + 0x0cc (PIN_OUTPUT | MUX_MODE0) | |
| 408 | + 0x0d0 (PIN_OUTPUT | MUX_MODE0) | |
| 409 | + 0x0d4 (PIN_OUTPUT | MUX_MODE0) | |
| 410 | + 0x0d8 (PIN_OUTPUT | MUX_MODE0) | |
| 411 | + 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ | |
| 412 | + 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ | |
| 413 | + 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ | |
| 414 | + 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ | |
| 415 | + 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ | |
| 416 | + | |
| 417 | + >; | |
| 418 | + }; | |
| 419 | + | |
| 420 | + /* SPI_NOR Pins */ | |
| 421 | + spi0_pins: spi0_pins { | |
| 422 | + pinctrl-single,pins = < | |
| 423 | + 0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ | |
| 424 | + 0x150 (PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */ | |
| 425 | + 0x154 (PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */ | |
| 426 | + 0x158 (PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */ | |
| 427 | + >; | |
| 428 | + }; | |
| 429 | + | |
| 430 | + /* SPI0 Pins */ | |
| 431 | + spi2_pins: spi2_pins { | |
| 432 | + pinctrl-single,pins = < | |
| 433 | + 0x1d4 (PIN_OUTPUT | MUX_MODE4) /* cam1_hd.spi2_cs0 */ | |
| 434 | + 0x1e0 (PIN_OUTPUT | MUX_MODE4) /* cam1_field.spi2_cs0 */ | |
| 435 | + 0x1dc (PIN_INPUT | MUX_MODE4) /* cam1_pclk.spi2_sclk */ | |
| 436 | + 0x1d0 (PIN_INPUT | MUX_MODE4) /* cam1_data8.spi2_d0 */ | |
| 437 | + 0x1e4 (PIN_OUTPUT | MUX_MODE4) /* cam1_wen.spi2_d1 */ | |
| 438 | + >; | |
| 439 | + }; | |
| 440 | + | |
| 441 | + /* SPI1 Pins */ | |
| 442 | + spi4_pins: spi4_pins { | |
| 443 | + pinctrl-single,pins = < | |
| 444 | + 0x25c (PIN_OUTPUT | MUX_MODE0) /* spi4_cs0.spi4_cs0 */ | |
| 445 | + 0x230 (PIN_OUTPUT | MUX_MODE2) /* uart3_cstn.spi4_cs1 */ | |
| 446 | + 0x250 (PIN_INPUT | MUX_MODE0) /* spi4_sclk.spi4_sclk */ | |
| 447 | + 0x254 (PIN_INPUT | MUX_MODE0) /* spi4_d0.spi4_d0 */ | |
| 448 | + 0x258 (PIN_OUTPUT | MUX_MODE0) /* spi4_d1.spi4_d1 */ | |
| 449 | + >; | |
| 450 | + }; | |
| 451 | + | |
| 452 | + mcasp1_pins: mcasp1_pins { | |
| 453 | + pinctrl-single,pins = < | |
| 454 | + 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */ | |
| 455 | + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */ | |
| 456 | + 0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */ | |
| 457 | + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */ | |
| 458 | + >; | |
| 459 | + }; | |
| 460 | + | |
| 461 | + mcasp1_sleep_pins: mcasp1_sleep_pins { | |
| 462 | + pinctrl-single,pins = < | |
| 463 | + 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 464 | + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 465 | + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 466 | + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 467 | + >; | |
| 468 | + }; | |
| 469 | + | |
| 470 | + lcd_pins: lcd_pins { | |
| 471 | + pinctrl-single,pins = < | |
| 472 | + 0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_be0n_cle.gpio2_5 */ | |
| 473 | + >; | |
| 474 | + }; | |
| 475 | + | |
| 476 | + debugss_pins: pinmux_debugss_pins { | |
| 477 | + pinctrl-single,pins = < | |
| 478 | + 0x290 (PIN_INPUT_PULLDOWN) | |
| 479 | + 0x294 (PIN_INPUT_PULLDOWN) | |
| 480 | + 0x298 (PIN_INPUT_PULLDOWN) | |
| 481 | + 0x29C (PIN_INPUT_PULLDOWN) | |
| 482 | + 0x2A0 (PIN_INPUT_PULLDOWN) | |
| 483 | + 0x2A4 (PIN_INPUT_PULLDOWN) | |
| 484 | + 0x2A8 (PIN_INPUT_PULLDOWN) | |
| 485 | + >; | |
| 486 | + }; | |
| 487 | + | |
| 488 | + usb1_pins: usb1_pins { | |
| 489 | + pinctrl-single,pins = < | |
| 490 | + 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ | |
| 491 | + /* USB0 Over Current */ | |
| 492 | + 0x108 (PIN_INPUT | MUX_MODE9) /* mii1_col.gpio0_0 */ | |
| 493 | + >; | |
| 494 | + }; | |
| 495 | + | |
| 496 | + usb2_pins: usb2_pins { | |
| 497 | + pinctrl-single,pins = < | |
| 498 | + 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ | |
| 499 | + /* USB1 Over Current */ | |
| 500 | + 0x078 (PIN_INPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ | |
| 501 | + >; | |
| 502 | + }; | |
| 503 | +}; | |
| 504 | + | |
| 505 | +&i2c0 { | |
| 506 | + status = "okay"; | |
| 507 | + pinctrl-names = "default"; | |
| 508 | + pinctrl-0 = <&i2c0_pins>; | |
| 509 | + clock-frequency = <100000>; | |
| 510 | +}; | |
| 511 | + | |
| 512 | +&i2c1 { | |
| 513 | + status = "okay"; | |
| 514 | + pinctrl-names = "default"; | |
| 515 | + pinctrl-0 = <&i2c1_pins>; | |
| 516 | + clock-frequency = <100000>; | |
| 517 | + | |
| 518 | + tps@24 { | |
| 519 | + compatible = "ti,tps65218"; | |
| 520 | + reg = <0x24>; | |
| 521 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 522 | + interrupt-controller; | |
| 523 | + #interrupt-cells = <2>; | |
| 524 | + | |
| 525 | + dcdc1: regulator-dcdc1 { | |
| 526 | + compatible = "ti,tps65218-dcdc1"; | |
| 527 | + /* VDD_CORE limits min of OPP50 and max of OPP100 */ | |
| 528 | + regulator-name = "vdd_core"; | |
| 529 | + regulator-min-microvolt = <912000>; | |
| 530 | + regulator-max-microvolt = <1144000>; | |
| 531 | + regulator-boot-on; | |
| 532 | + regulator-always-on; | |
| 533 | + }; | |
| 534 | + | |
| 535 | + dcdc2: regulator-dcdc2 { | |
| 536 | + compatible = "ti,tps65218-dcdc2"; | |
| 537 | + /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ | |
| 538 | + regulator-name = "vdd_mpu"; | |
| 539 | + regulator-min-microvolt = <912000>; | |
| 540 | + regulator-max-microvolt = <1378000>; | |
| 541 | + regulator-boot-on; | |
| 542 | + regulator-always-on; | |
| 543 | + }; | |
| 544 | + | |
| 545 | + dcdc3: regulator-dcdc3 { | |
| 546 | + compatible = "ti,tps65218-dcdc3"; | |
| 547 | + regulator-name = "vdds_ddr"; | |
| 548 | + regulator-min-microvolt = <1500000>; | |
| 549 | + regulator-max-microvolt = <1500000>; | |
| 550 | + regulator-boot-on; | |
| 551 | + regulator-always-on; | |
| 552 | + regulator-state-mem { | |
| 553 | + regulator-on-in-suspend; | |
| 554 | + }; | |
| 555 | + regulator-state-disk { | |
| 556 | + regulator-off-in-suspend; | |
| 557 | + }; | |
| 558 | + }; | |
| 559 | + | |
| 560 | + dcdc4: regulator-dcdc4 { | |
| 561 | + compatible = "ti,tps65218-dcdc4"; | |
| 562 | + regulator-name = "v3_3d"; | |
| 563 | + regulator-min-microvolt = <3300000>; | |
| 564 | + regulator-max-microvolt = <3300000>; | |
| 565 | + regulator-boot-on; | |
| 566 | + regulator-always-on; | |
| 567 | + }; | |
| 568 | + | |
| 569 | + dcdc5: regulator-dcdc5 { | |
| 570 | + compatible = "ti,tps65218-dcdc5"; | |
| 571 | + regulator-name = "v1_0bat"; | |
| 572 | + regulator-min-microvolt = <1000000>; | |
| 573 | + regulator-max-microvolt = <1000000>; | |
| 574 | + regulator-boot-on; | |
| 575 | + regulator-always-on; | |
| 576 | + regulator-state-mem { | |
| 577 | + regulator-on-in-suspend; | |
| 578 | + }; | |
| 579 | + }; | |
| 580 | + | |
| 581 | + dcdc6: regulator-dcdc6 { | |
| 582 | + compatible = "ti,tps65218-dcdc6"; | |
| 583 | + regulator-name = "v1_8bat"; | |
| 584 | + regulator-min-microvolt = <1800000>; | |
| 585 | + regulator-max-microvolt = <1800000>; | |
| 586 | + regulator-boot-on; | |
| 587 | + regulator-always-on; | |
| 588 | + regulator-state-mem { | |
| 589 | + regulator-on-in-suspend; | |
| 590 | + }; | |
| 591 | + }; | |
| 592 | + | |
| 593 | + ldo1: regulator-ldo1 { | |
| 594 | + compatible = "ti,tps65218-ldo1"; | |
| 595 | + regulator-name = "v1_8d"; | |
| 596 | + regulator-min-microvolt = <1800000>; | |
| 597 | + regulator-max-microvolt = <1800000>; | |
| 598 | + regulator-boot-on; | |
| 599 | + regulator-always-on; | |
| 600 | + }; | |
| 601 | + | |
| 602 | + power-button { | |
| 603 | + compatible = "ti,tps65218-pwrbutton"; | |
| 604 | + status = "okay"; | |
| 605 | + interrupts = <3 IRQ_TYPE_EDGE_BOTH>; | |
| 606 | + }; | |
| 607 | + }; | |
| 608 | + | |
| 609 | + s35390a: s35390a@30 { | |
| 610 | + compatible = "s35390a"; | |
| 611 | + reg = <0x30>; | |
| 612 | + }; | |
| 613 | + | |
| 614 | + at24@50 { | |
| 615 | + compatible = "at24,24c256"; | |
| 616 | + reg = <0x50>; | |
| 617 | + }; | |
| 618 | + | |
| 619 | + at24@57 { | |
| 620 | + compatible = "at24,24c256"; | |
| 621 | + reg = <0x57>; | |
| 622 | + }; | |
| 623 | + | |
| 624 | + /* For TI TLV320AIC3106 Audio Codec */ | |
| 625 | + /*tlv320aic3106: tlv320aic3106@1b { | |
| 626 | + #sound-dai-cells = <0>; | |
| 627 | + compatible = "ti,tlv320aic3106"; | |
| 628 | + reg = <0x1b>; | |
| 629 | + status = "okay"; | |
| 630 | + | |
| 631 | + AVDD-supply = <&dcdc4>; | |
| 632 | + IOVDD-supply = <&dcdc6>; | |
| 633 | + DRVDD-supply = <&dcdc4>; | |
| 634 | + DVDD-supply = <&ldo1>; | |
| 635 | + };*/ | |
| 636 | + | |
| 637 | + /* For Freescale SGTL5000 Audio Codec */ | |
| 638 | + sgtl5000: sgtl5000@0a { | |
| 639 | + #sound-dai-cells = <0>; | |
| 640 | + compatible = "fsl,sgtl5000"; | |
| 641 | + reg = <0x0a>; | |
| 642 | + clocks = <&audio_mstrclk>; | |
| 643 | + VDDA-supply = <&dcdc4>; | |
| 644 | + VDDIO-supply = <&dcdc6>; | |
| 645 | + VDDD-supply = <&ldo1>; | |
| 646 | + }; | |
| 647 | +}; | |
| 648 | + | |
| 649 | +&i2c2 { | |
| 650 | + status = "okay"; | |
| 651 | + pinctrl-names = "default"; | |
| 652 | + pinctrl-0 = <&i2c2_pins>; | |
| 653 | + clock-frequency = <100000>; | |
| 654 | + | |
| 655 | + /* CH7055A Parallel LCD to VGA D-SUB 15 way */ | |
| 656 | + eeprom@76 { | |
| 657 | + compatible = "at,24c256"; | |
| 658 | + reg = <0x76>; | |
| 659 | + }; | |
| 660 | +}; | |
| 661 | + | |
| 662 | + | |
| 663 | +&epwmss0 { | |
| 664 | + status = "okay"; | |
| 665 | + | |
| 666 | + ehrpwm0: ehrpwm@48300200 { | |
| 667 | + status = "okay"; | |
| 668 | + pinctrl-names = "default"; | |
| 669 | + pinctrl-0 = <&ehrpwm0b_pins>; | |
| 670 | + }; | |
| 671 | +}; | |
| 672 | + | |
| 673 | +&gpio0 { | |
| 674 | + status = "okay"; | |
| 675 | +}; | |
| 676 | + | |
| 677 | +&gpio1 { | |
| 678 | + status = "okay"; | |
| 679 | +}; | |
| 680 | + | |
| 681 | +&gpio2 { | |
| 682 | + status = "okay"; | |
| 683 | +}; | |
| 684 | + | |
| 685 | +&gpio3 { | |
| 686 | + status = "okay"; | |
| 687 | +}; | |
| 688 | + | |
| 689 | +&gpio4 { | |
| 690 | + status = "okay"; | |
| 691 | +}; | |
| 692 | + | |
| 693 | +&gpio5 { | |
| 694 | + status = "okay"; | |
| 695 | +}; | |
| 696 | + | |
| 697 | +&mmc1 { | |
| 698 | + status = "okay"; | |
| 699 | + pinctrl-names = "default"; | |
| 700 | + pinctrl-0 = <&mmc1_pins>; | |
| 701 | + | |
| 702 | + vmmc-supply = <&dcdc4>; | |
| 703 | + bus-width = <4>; | |
| 704 | + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; | |
| 705 | +}; | |
| 706 | + | |
| 707 | +&mmc2 { | |
| 708 | + pinctrl-names = "default"; | |
| 709 | + pinctrl-0 = <&emmc_pins>; | |
| 710 | + bus-width = <8>; | |
| 711 | + vmmc-supply = <&vmmcwl_fixed>; | |
| 712 | + status = "okay"; | |
| 713 | + ti,non-removable; | |
| 714 | +}; | |
| 715 | + | |
| 716 | +/*If carrier board eMMC (or 2nd SD slot) is present and used, un-comment out the following nodes. SD card will be emulated /dev/mmcblk2 instead of /dev/mmcblk1*/ | |
| 717 | + | |
| 718 | +&mmc3 { | |
| 719 | + status = "okay"; | |
| 720 | + dmas = <&edma 30 | |
| 721 | + &edma 31>; | |
| 722 | + dma-names = "tx", "rx"; | |
| 723 | + vmmc-supply = <&vmmcwl_fixed>; | |
| 724 | + bus-width = <8>; | |
| 725 | + pinctrl-names = "default"; | |
| 726 | + pinctrl-0 = <&sdmmc_pins>; | |
| 727 | + keep-power-in-suspend; | |
| 728 | + ti,non-removable; | |
| 729 | +}; | |
| 730 | + | |
| 731 | +&edma { | |
| 732 | + ti,edma-xbar-event-map = /bits/ 16 <1 30 | |
| 733 | + 2 31>; | |
| 734 | +}; | |
| 735 | + | |
| 736 | +/* Four-Wire Resistive Touch */ | |
| 737 | +&tscadc { | |
| 738 | + status = "disabled"; | |
| 739 | + tsc { | |
| 740 | + ti,wires = <4>; | |
| 741 | + ti,x-plate-resistance = <200>; | |
| 742 | + ti,coordinate-readouts = <5>; | |
| 743 | + ti,wire-config = <0x00 0x11 0x22 0x33>; | |
| 744 | + ti,charge-delay = <0xB000>; | |
| 745 | + }; | |
| 746 | + | |
| 747 | + adc { | |
| 748 | + ti,adc-channels = <0 1 2 3>; | |
| 749 | + }; | |
| 750 | +}; | |
| 751 | + | |
| 752 | +&usb2_phy1 { | |
| 753 | + status = "okay"; | |
| 754 | +}; | |
| 755 | + | |
| 756 | +&usb1 { | |
| 757 | + dr_mode = "host"; | |
| 758 | + status = "okay"; | |
| 759 | + pinctrl-names = "default"; | |
| 760 | + pinctrl-0 = <&usb1_pins>; | |
| 761 | +}; | |
| 762 | + | |
| 763 | +&usb2_phy2 { | |
| 764 | + status = "okay"; | |
| 765 | +}; | |
| 766 | + | |
| 767 | +&usb2 { | |
| 768 | + dr_mode = "host"; | |
| 769 | + status = "okay"; | |
| 770 | + pinctrl-names = "default"; | |
| 771 | + pinctrl-0 = <&usb2_pins>; | |
| 772 | +}; | |
| 773 | + | |
| 774 | +&spi0 { | |
| 775 | + ti,spi-num-cs = <1>; | |
| 776 | + status = "okay"; | |
| 777 | + pinctrl-names = "default"; | |
| 778 | + pinctrl-0 = <&spi0_pins>; | |
| 779 | + dmas = <&edma 16 | |
| 780 | + &edma 17>; | |
| 781 | + dma-names = "tx0", "rx0"; | |
| 782 | + | |
| 783 | + flash: mx25u3235f@0 { | |
| 784 | + #address-cells = <1>; | |
| 785 | + #size-cells = <1>; | |
| 786 | + compatible = "jedec,spi-nor"; | |
| 787 | + spi-max-frequency = <24000000>; | |
| 788 | + reg = <0>; | |
| 789 | + | |
| 790 | + /* MTD partition table. | |
| 791 | + * The ROM checks the first 512KiB | |
| 792 | + * for a valid file to boot(XIP). | |
| 793 | + */ | |
| 794 | + partition@0 { | |
| 795 | + label = "U-Boot"; | |
| 796 | + reg = <0x0 0x100000>; | |
| 797 | + }; | |
| 798 | + | |
| 799 | + partition@100000 { | |
| 800 | + label = "U-Boot Environment"; | |
| 801 | + reg = <0x100000 0x080000>; | |
| 802 | + }; | |
| 803 | + | |
| 804 | + partition@180000 { | |
| 805 | + label = "Flattened Device Tree"; | |
| 806 | + reg = <0x180000 0x200000>; | |
| 807 | + }; | |
| 808 | + | |
| 809 | + }; | |
| 810 | +}; | |
| 811 | + | |
| 812 | +&spi2 { | |
| 813 | + ti,spi-num-cs = <2>; | |
| 814 | + status = "okay"; | |
| 815 | + pinctrl-names = "default"; | |
| 816 | + pinctrl-0 = <&spi2_pins>; | |
| 817 | + dmas = <&edma 18 | |
| 818 | + &edma 19 | |
| 819 | + &edma 20 | |
| 820 | + &edma 21>; | |
| 821 | + dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| 822 | + | |
| 823 | + spidev1: spidev@0 { | |
| 824 | + #address-cells = <1>; | |
| 825 | + #size-cells = <0>; | |
| 826 | + compatible = "spidev"; | |
| 827 | + reg = <0>; | |
| 828 | + spi-max-frequency = <24000000>; | |
| 829 | + }; | |
| 830 | + | |
| 831 | + spidev2: spidev@1 { | |
| 832 | + #address-cells = <1>; | |
| 833 | + #size-cells = <0>; | |
| 834 | + compatible = "spidev"; | |
| 835 | + reg = <1>; | |
| 836 | + spi-max-frequency = <24000000>; | |
| 837 | + }; | |
| 838 | + }; | |
| 839 | + | |
| 840 | +&spi4 { | |
| 841 | + ti,spi-num-cs = <2>; | |
| 842 | + status = "okay"; | |
| 843 | + pinctrl-names = "default"; | |
| 844 | + pinctrl-0 = <&spi4_pins>; | |
| 845 | + dmas = <&edma 26 | |
| 846 | + &edma 27 | |
| 847 | + &edma 28 | |
| 848 | + &edma 29>; | |
| 849 | + dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| 850 | + | |
| 851 | + spidev3: spidev@0 { | |
| 852 | + #address-cells = <1>; | |
| 853 | + #size-cells = <0>; | |
| 854 | + compatible = "spidev"; | |
| 855 | + reg = <0>; | |
| 856 | + spi-max-frequency = <24000000>; | |
| 857 | + }; | |
| 858 | + | |
| 859 | + spidev4: spidev@1 { | |
| 860 | + #address-cells = <1>; | |
| 861 | + #size-cells = <0>; | |
| 862 | + compatible = "spidev"; | |
| 863 | + reg = <1>; | |
| 864 | + spi-max-frequency = <24000000>; | |
| 865 | + }; | |
| 866 | + }; | |
| 867 | + | |
| 868 | +&uart0 { | |
| 869 | + pinctrl-names = "default"; | |
| 870 | + pinctrl-0 = <&uart0_pins>; | |
| 871 | + pinctrl-1 = <&uart0_pins_sleep>; | |
| 872 | + | |
| 873 | + status = "okay"; | |
| 874 | +}; | |
| 875 | + | |
| 876 | +&uart3 { | |
| 877 | + pinctrl-names = "default"; | |
| 878 | + pinctrl-0 = <&uart3_pins>; | |
| 879 | + pinctrl-1 = <&uart3_pins_sleep>; | |
| 880 | + | |
| 881 | + status = "okay"; | |
| 882 | +}; | |
| 883 | + | |
| 884 | +&uart2 { | |
| 885 | + pinctrl-names = "default"; | |
| 886 | + pinctrl-0 = <&uart2_pins>; | |
| 887 | + pinctrl-1 = <&uart2_pins_sleep>; | |
| 888 | + | |
| 889 | + status = "okay"; | |
| 890 | +}; | |
| 891 | + | |
| 892 | +&uart4 { | |
| 893 | + pinctrl-names = "default"; | |
| 894 | + pinctrl-0 = <&uart4_pins>; | |
| 895 | + pinctrl-1 = <&uart4_pins_sleep>; | |
| 896 | + | |
| 897 | + status = "okay"; | |
| 898 | +}; | |
| 899 | + | |
| 900 | +&dcan0 { | |
| 901 | + pinctrl-names = "default"; | |
| 902 | + pinctrl-0 = <&dcan0_default>; | |
| 903 | + status = "okay"; | |
| 904 | +}; | |
| 905 | + | |
| 906 | +&dcan1 { | |
| 907 | + pinctrl-names = "default"; | |
| 908 | + pinctrl-0 = <&dcan1_default>; | |
| 909 | + status = "okay"; | |
| 910 | +}; | |
| 911 | + | |
| 912 | +&mac { | |
| 913 | + pinctrl-names = "default", "sleep"; | |
| 914 | + pinctrl-0 = <&cpsw_default>; | |
| 915 | + pinctrl-1 = <&cpsw_sleep>; | |
| 916 | + dual_emac = <1>; | |
| 917 | + status = "okay"; | |
| 918 | +}; | |
| 919 | + | |
| 920 | +&davinci_mdio { | |
| 921 | + pinctrl-names = "default", "sleep"; | |
| 922 | + pinctrl-0 = <&davinci_mdio_default>; | |
| 923 | + pinctrl-1 = <&davinci_mdio_sleep>; | |
| 924 | + status = "okay"; | |
| 925 | +}; | |
| 926 | + | |
| 927 | +&cpsw_emac0 { | |
| 928 | + phy_id = <&davinci_mdio>, <6>; | |
| 929 | + phy-mode = "rgmii"; | |
| 930 | + dual_emac_res_vlan = <1>; | |
| 931 | +}; | |
| 932 | + | |
| 933 | +&cpsw_emac1 { | |
| 934 | + phy_id = <&davinci_mdio>, <7>; | |
| 935 | + phy-mode = "rgmii"; | |
| 936 | + dual_emac_res_vlan = <2>; | |
| 937 | +}; | |
| 938 | + | |
| 939 | +&elm { | |
| 940 | + status = "okay"; | |
| 941 | +}; | |
| 942 | + | |
| 943 | +&mcasp1 { | |
| 944 | + #sound-dai-cells = <0>; | |
| 945 | + pinctrl-names = "default", "sleep"; | |
| 946 | + pinctrl-0 = <&mcasp1_pins>; | |
| 947 | + pinctrl-1 = <&mcasp1_sleep_pins>; | |
| 948 | + | |
| 949 | + status = "okay"; | |
| 950 | + | |
| 951 | + op-mode = <0>; /* MCASP_IIS_MODE */ | |
| 952 | + tdm-slots = <2>; | |
| 953 | + /* 4 serializers */ | |
| 954 | + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
| 955 | + 1 2 0 0 | |
| 956 | + >; | |
| 957 | + | |
| 958 | + tx-num-evt = <1>; | |
| 959 | + rx-num-evt = <1>; | |
| 960 | +}; | |
| 961 | + | |
| 962 | +&dss { | |
| 963 | + status = "okay"; | |
| 964 | + | |
| 965 | + pinctrl-names = "default"; | |
| 966 | + pinctrl-0 = <&dss_pins>; | |
| 967 | + | |
| 968 | + port { | |
| 969 | + dpi_out: endpoint@0 { | |
| 970 | + remote-endpoint = <&lcd_in>; | |
| 971 | + data-lines = <24>; | |
| 972 | + }; | |
| 973 | + }; | |
| 974 | +}; | |
| 975 | + | |
| 976 | +&rtc { | |
| 977 | + status = "disabled"; /* Use Seiko S35390A on Module instead */ | |
| 978 | + ext-clk-src; | |
| 979 | +}; | |
| 980 | + | |
| 981 | +&wdt { | |
| 982 | + status = "okay"; | |
| 983 | +}; | |
| 984 | + | |
| 985 | +&cpu { | |
| 986 | + cpu0-supply = <&dcdc2>; | |
| 987 | +}; |
arch/arm/dts/am437x-smarct437x-uart3.dts
| 1 | +/* | |
| 2 | + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License version 2 as | |
| 6 | + * published by the Free Software Foundation. | |
| 7 | + */ | |
| 8 | + | |
| 9 | +/* AM437x SK EVM */ | |
| 10 | + | |
| 11 | +/dts-v1/; | |
| 12 | + | |
| 13 | +#include "am4372.dtsi" | |
| 14 | +#include <dt-bindings/pinctrl/am43xx.h> | |
| 15 | +#include <dt-bindings/pwm/pwm.h> | |
| 16 | +#include <dt-bindings/gpio/gpio.h> | |
| 17 | +#include <dt-bindings/input/input.h> | |
| 18 | + | |
| 19 | +/ { | |
| 20 | + model = "TI AM437x SMARCT437X"; | |
| 21 | + compatible = "ti,am437x-smarct437x","ti,am4372","ti,am43"; | |
| 22 | + | |
| 23 | + aliases { | |
| 24 | + display0 = &lcd0; | |
| 25 | + }; | |
| 26 | + | |
| 27 | + chosen { | |
| 28 | + stdout-path = &uart4; | |
| 29 | + tick-timer = &timer2; | |
| 30 | + }; | |
| 31 | + | |
| 32 | + vmmcwl_fixed: fixedregulator-mmcwl { | |
| 33 | + compatible = "regulator-fixed"; | |
| 34 | + regulator-name = "vmmcwl_fixed"; | |
| 35 | + regulator-min-microvolt = <1800000>; | |
| 36 | + regulator-max-microvolt = <1800000>; | |
| 37 | + }; | |
| 38 | + | |
| 39 | + backlight { | |
| 40 | + compatible = "pwm-backlight"; | |
| 41 | + enable-gpios = <&gpio2 4 GPIO_ACTIVE_HIGH>; /* Backlight Enable Pin*/ | |
| 42 | + pwms = <&ehrpwm0 1 250000 PWM_POLARITY_INVERTED>; | |
| 43 | + brightness-levels = <0 51 53 56 62 75 128 212 255>; | |
| 44 | + default-brightness-level = <7>; /* 7 is the brightest */ | |
| 45 | + }; | |
| 46 | + | |
| 47 | + sound: sound@0 { | |
| 48 | + compatible = "simple-audio-card"; | |
| 49 | + simple-audio-card,name = "SMARCT437X SOUND CARD"; | |
| 50 | + simple-audio-card,widgets = | |
| 51 | + "Headphone", "Headphone Jack", | |
| 52 | + "Line", "Line In"; | |
| 53 | + simple-audio-card,routing = | |
| 54 | + "Headphone Jack", "HPLOUT", | |
| 55 | + "Headphone Jack", "HPROUT", | |
| 56 | + "LINE1L", "Line In", | |
| 57 | + "LINE1R", "Line In"; | |
| 58 | + simple-audio-card,format = "dsp_b"; | |
| 59 | + simple-audio-card,bitclock-master = <&sound_master>; | |
| 60 | + simple-audio-card,frame-master = <&sound_master>; | |
| 61 | + simple-audio-card,bitclock-inversion; | |
| 62 | + | |
| 63 | + simple-audio-card,cpu { | |
| 64 | + sound-dai = <&mcasp1>; | |
| 65 | + system-clock-frequency = <12000000>; | |
| 66 | + }; | |
| 67 | + | |
| 68 | + /* For TI TLV320AIC3106 Audio Codec */ | |
| 69 | + /*sound_master: simple-audio-card,codec { | |
| 70 | + sound-dai = <&tlv320aic3106>; | |
| 71 | + system-clock-frequency = <24576000>;*/ | |
| 72 | + | |
| 73 | + /* For Freescale SGTL5000 Audio Codec */ | |
| 74 | + sound_master: simple-audio-card,codec { | |
| 75 | + sound-dai = <&sgtl5000>; | |
| 76 | + system-clock-frequency = <24000000>; | |
| 77 | + }; | |
| 78 | + }; | |
| 79 | + | |
| 80 | + audio_mstrclk: mclk_osc { | |
| 81 | + compatible = "fixed-clock"; | |
| 82 | + #clock-cells = <0>; | |
| 83 | + clock-frequency = <24000000>; | |
| 84 | + }; | |
| 85 | + | |
| 86 | + lcd0: display { | |
| 87 | + compatible = "primeview,pm070wl4", "panel-dpi"; | |
| 88 | + label = "lcd"; | |
| 89 | + | |
| 90 | + pinctrl-names = "default"; | |
| 91 | + pinctrl-0 = <&lcd_pins>; | |
| 92 | + | |
| 93 | + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; | |
| 94 | + | |
| 95 | + panel-timing { | |
| 96 | + clock-frequency = <32000000>; | |
| 97 | + hactive = <800>; | |
| 98 | + vactive = <480>; | |
| 99 | + hfront-porch = <42>; | |
| 100 | + hback-porch = <84>; | |
| 101 | + hsync-len = <128>; | |
| 102 | + vback-porch = <33>; | |
| 103 | + vfront-porch = <10>; | |
| 104 | + vsync-len = <2>; | |
| 105 | + hsync-active = <0>; | |
| 106 | + vsync-active = <0>; | |
| 107 | + de-active = <1>; | |
| 108 | + pixelclk-active = <1>; | |
| 109 | + }; | |
| 110 | + | |
| 111 | + port { | |
| 112 | + lcd_in: endpoint { | |
| 113 | + remote-endpoint = <&dpi_out>; | |
| 114 | + }; | |
| 115 | + }; | |
| 116 | + }; | |
| 117 | +}; | |
| 118 | + | |
| 119 | +&am43xx_pinmux { | |
| 120 | + pinctrl-names = "default"; | |
| 121 | + pinctrl-0 = <&clkout1_pin &clkout2_pin &gpio_pins_default &wdt_time_out_pins_default &debugss_pins>; | |
| 122 | + | |
| 123 | + i2c0_pins: i2c0_pins { | |
| 124 | + pinctrl-single,pins = < | |
| 125 | + 0x188 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */ | |
| 126 | + 0x18c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */ | |
| 127 | + >; | |
| 128 | + }; | |
| 129 | + | |
| 130 | + i2c1_pins: i2c1_pins { | |
| 131 | + pinctrl-single,pins = < | |
| 132 | + 0x110 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_rxerr.i2c1_scl */ | |
| 133 | + 0x10c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* mii1_crs.i2c1_sda */ | |
| 134 | + >; | |
| 135 | + }; | |
| 136 | + | |
| 137 | + i2c2_pins: i2c2_pins { | |
| 138 | + pinctrl-single,pins = < | |
| 139 | + 0x1ec (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data1.i2c2_scl */ | |
| 140 | + 0x1e8 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE3) /* cam1_data0.i2c2_sda */ | |
| 141 | + >; | |
| 142 | + }; | |
| 143 | + | |
| 144 | + mmc1_pins: pinmux_mmc1_pins { | |
| 145 | + pinctrl-single,pins = < | |
| 146 | + 0x0f0 (PIN_INPUT | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */ | |
| 147 | + 0x0f4 (PIN_INPUT | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */ | |
| 148 | + 0x0f8 (PIN_INPUT | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */ | |
| 149 | + 0x0fc (PIN_INPUT | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */ | |
| 150 | + 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ | |
| 151 | + 0x104 (PIN_INPUT | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */ | |
| 152 | + 0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */ | |
| 153 | + >; | |
| 154 | + }; | |
| 155 | + | |
| 156 | + emmc_pins: pinmux_emmc_pins { | |
| 157 | + pinctrl-single,pins = < | |
| 158 | + 0x80 (PIN_INPUT | MUX_MODE2) /* gpmc_csn1.mmc1_clk */ | |
| 159 | + 0x84 (PIN_INPUT | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ | |
| 160 | + 0x00 (PIN_INPUT | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ | |
| 161 | + 0x04 (PIN_INPUT | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ | |
| 162 | + 0x08 (PIN_INPUT | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ | |
| 163 | + 0x0c (PIN_INPUT | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ | |
| 164 | + 0x10 (PIN_INPUT | MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ | |
| 165 | + 0x14 (PIN_INPUT | MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ | |
| 166 | + 0x18 (PIN_INPUT | MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ | |
| 167 | + 0x1c (PIN_INPUT | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ | |
| 168 | + >; | |
| 169 | + }; | |
| 170 | + | |
| 171 | + sdmmc_pins: pinmux_sdmmc_pins { | |
| 172 | + pinctrl-single,pins = < | |
| 173 | + 0x8c (PIN_INPUT | MUX_MODE3) /* gpmc_clk.mmc2_clk */ | |
| 174 | + 0x88 (PIN_INPUT | MUX_MODE3) /* gpmc_csn3.mmc2_cmd */ | |
| 175 | + 0x30 (PIN_INPUT | MUX_MODE3) /* gpmc_ad12.mmc2_dat0 */ | |
| 176 | + 0x34 (PIN_INPUT | MUX_MODE3) /* gpmc_ad13.mmc2_dat1 */ | |
| 177 | + 0x38 (PIN_INPUT | MUX_MODE3) /* gpmc_ad14.mmc2_dat2 */ | |
| 178 | + 0x3c (PIN_INPUT | MUX_MODE3) /* gpmc_ad15.mmc2_dat3 */ | |
| 179 | + 0x20 (PIN_INPUT | MUX_MODE3) /* gpmc_ad8.mmc2_dat4 */ | |
| 180 | + 0x24 (PIN_INPUT | MUX_MODE3) /* gpmc_ad9.mmc2_dat5 */ | |
| 181 | + 0x28 (PIN_INPUT | MUX_MODE3) /* gpmc_ad10.mmc2_dat6 */ | |
| 182 | + 0x2c (PIN_INPUT | MUX_MODE3) /* gpmc_ad11.mmc2_dat7 */ | |
| 183 | + >; | |
| 184 | + }; | |
| 185 | + | |
| 186 | + ehrpwm0b_pins: backlight_pins { | |
| 187 | + pinctrl-single,pins = < | |
| 188 | + 0x1d8 (PIN_OUTPUT | MUX_MODE6) /* cam1_vd.ehrpwm0B */ | |
| 189 | + >; | |
| 190 | + }; | |
| 191 | + | |
| 192 | + clkout1_pin: pinmux_clkout1_pin { | |
| 193 | + pinctrl-single,pins = < | |
| 194 | + 0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */ | |
| 195 | + >; | |
| 196 | + }; | |
| 197 | + | |
| 198 | + clkout2_pin: pinmux_clkout2_pin { | |
| 199 | + pinctrl-single,pins = < | |
| 200 | + 0x274 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR1/CLKOUT2 */ | |
| 201 | + >; | |
| 202 | + }; | |
| 203 | + | |
| 204 | + dcan0_default: dcan0_default_pins { | |
| 205 | + pinctrl-single,pins = < | |
| 206 | + 0x17c (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_rtsn.dcan0_rx */ | |
| 207 | + 0x178 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_ctsn.dcan0_tx */ | |
| 208 | + >; | |
| 209 | + }; | |
| 210 | + | |
| 211 | + dcan1_default: dcan1_default_pins { | |
| 212 | + pinctrl-single,pins = < | |
| 213 | + 0x184 (PIN_INPUT_PULLUP | MUX_MODE2) /* uart1_txd.dcan1_rx */ | |
| 214 | + 0x180 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* uart1_rxd.dcan1_tx */ | |
| 215 | + >; | |
| 216 | + }; | |
| 217 | + | |
| 218 | + uart0_pins: pinmux_uart0_pins { | |
| 219 | + pinctrl-single,pins = < | |
| 220 | + 0x168 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */ | |
| 221 | + 0x16c (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */ | |
| 222 | + 0x170 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */ | |
| 223 | + 0x174 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */ | |
| 224 | + >; | |
| 225 | + }; | |
| 226 | + | |
| 227 | + uart0_pins_sleep: pinmux_uart0_pins_sleep { | |
| 228 | + pinctrl-single,pins = < | |
| 229 | + 0x168 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 230 | + 0x16c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 231 | + 0x170 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 232 | + 0x174 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 233 | + >; | |
| 234 | + }; | |
| 235 | + | |
| 236 | + uart3_pins: pinmux_uart3_pins { | |
| 237 | + pinctrl-single,pins = < | |
| 238 | + 0x228 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart3_rxd.uart3_rxd */ | |
| 239 | + 0x22c (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart3_txd.uart3_txd */ | |
| 240 | + >; | |
| 241 | + }; | |
| 242 | + | |
| 243 | + uart3_pins_sleep: pinmux_uart3_pins_sleep { | |
| 244 | + pinctrl-single,pins = < | |
| 245 | + 0x228 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 246 | + 0x22c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 247 | + >; | |
| 248 | + }; | |
| 249 | + | |
| 250 | + uart2_pins: pinmux_uart2_pins { | |
| 251 | + pinctrl-single,pins = < | |
| 252 | + 0x200 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE2) /* cam1_data6.uart2_ctsn */ | |
| 253 | + 0x204 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE2) /* cam1_data7_rtsn.uart2_rtsn */ | |
| 254 | + 0x1f8 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE2) /* cam1_data4_uart2rxd */ | |
| 255 | + 0x1fc (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE2) /* cam1_data5.uart2_txd */ | |
| 256 | + >; | |
| 257 | + }; | |
| 258 | + | |
| 259 | + uart2_pins_sleep: pinmux_uart2_pins_sleep { | |
| 260 | + pinctrl-single,pins = < | |
| 261 | + 0x200 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 262 | + 0x204 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 263 | + 0x1f8 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 264 | + 0x1fc (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 265 | + >; | |
| 266 | + }; | |
| 267 | + | |
| 268 | + uart4_pins: pinmux_uart4_pins { | |
| 269 | + pinctrl-single,pins = < | |
| 270 | + 0x070 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6) /* gpmc_wait0.uart4_rxd */ | |
| 271 | + 0x074 (PIN_INPUT | PULL_DISABLE | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE6) /* gpmc_wpn.uart4_txd */ | |
| 272 | + >; | |
| 273 | + }; | |
| 274 | + | |
| 275 | + uart4_pins_sleep: pinmux_uart4_pins_sleep { | |
| 276 | + pinctrl-single,pins = < | |
| 277 | + 0x070 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 278 | + 0x174 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 279 | + >; | |
| 280 | + }; | |
| 281 | + | |
| 282 | + /*GPIO0-GPIO11, GPIO0-5 is input and GPIO6-11 is output by default.*/ | |
| 283 | + gpio_pins_default: pinmux_gpio_pin { | |
| 284 | + pinctrl-single,pins = < | |
| 285 | + 0x26c (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_cs0.gpio0_23 */ | |
| 286 | + 0x264 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d0.gpio0_20 */ | |
| 287 | + 0x268 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_d1.gpio0_21 */ | |
| 288 | + 0x260 (PIN_INPUT_PULLDOWN | MUX_MODE9) /* spi2_sclk.gpio0_22 */ | |
| 289 | + 0x21c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data5.gpio4_27 */ | |
| 290 | + 0x224 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* cam0_data7.gpio4_29 */ | |
| 291 | + 0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_ahclkr.gpio3_17 */ | |
| 292 | + 0x198 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* mcasp0_axr0.gpio3_16 */ | |
| 293 | + 0x210 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data2.gpio4_24 */ | |
| 294 | + 0x214 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data3.gpio4_25 */ | |
| 295 | + 0x218 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data4.gpio4_26 */ | |
| 296 | + 0x220 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* cam0_data6.gpio4_28 */ | |
| 297 | + >; | |
| 298 | + }; | |
| 299 | + | |
| 300 | + wdt_time_out_pins_default: pinmux_wdt_time_out_pin { | |
| 301 | + pinctrl-single,pins = < | |
| 302 | + 0x234 (PIN_OUTPUT_PULLDOWN | MUX_MODE6) /* uart3_rtsn.ehrpwm5B */ | |
| 303 | + >; | |
| 304 | + }; | |
| 305 | + | |
| 306 | + cpsw_default: cpsw_default { | |
| 307 | + pinctrl-single,pins = < | |
| 308 | + /* Slave 1 */ | |
| 309 | + 0x12c (PIN_OUTPUT | MUX_MODE2) /* mii1_txclk.rmii1_tclk */ | |
| 310 | + 0x114 (PIN_OUTPUT | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ | |
| 311 | + 0x128 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ | |
| 312 | + 0x124 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ | |
| 313 | + 0x120 (PIN_OUTPUT | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */ | |
| 314 | + 0x11c (PIN_OUTPUT | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */ | |
| 315 | + 0x130 (PIN_INPUT | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */ | |
| 316 | + 0x118 (PIN_INPUT | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ | |
| 317 | + 0x140 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ | |
| 318 | + 0x13c (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ | |
| 319 | + 0x138 (PIN_INPUT | MUX_MODE2) /* mii1_rxd0.rgmii1_rd2 */ | |
| 320 | + 0x134 (PIN_INPUT | MUX_MODE2) /* mii1_rxd1.rgmii1_rd3 */ | |
| 321 | + | |
| 322 | + /* Slave 2 */ | |
| 323 | + 0x58 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ | |
| 324 | + 0x40 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ | |
| 325 | + 0x54 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ | |
| 326 | + 0x50 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ | |
| 327 | + 0x4c (PIN_OUTPUT | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ | |
| 328 | + 0x48 (PIN_OUTPUT | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ | |
| 329 | + 0x5c (PIN_INPUT | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ | |
| 330 | + 0x44 (PIN_INPUT | MUX_MODE2) /* gpmc_a1.rgmii2_rtcl */ | |
| 331 | + 0x6c (PIN_INPUT | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ | |
| 332 | + 0x68 (PIN_INPUT | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ | |
| 333 | + 0x64 (PIN_INPUT | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ | |
| 334 | + 0x60 (PIN_INPUT | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ | |
| 335 | + >; | |
| 336 | + }; | |
| 337 | + | |
| 338 | + cpsw_sleep: cpsw_sleep { | |
| 339 | + pinctrl-single,pins = < | |
| 340 | + /* Slave 1 reset value */ | |
| 341 | + 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 342 | + 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 343 | + 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 344 | + 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 345 | + 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 346 | + 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 347 | + 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 348 | + 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 349 | + 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 350 | + 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 351 | + 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 352 | + 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 353 | + | |
| 354 | + /* Slave 2 reset value */ | |
| 355 | + 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 356 | + 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 357 | + 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 358 | + 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 359 | + 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 360 | + 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 361 | + 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 362 | + 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 363 | + 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 364 | + 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 365 | + 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 366 | + 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 367 | + >; | |
| 368 | + }; | |
| 369 | + | |
| 370 | + davinci_mdio_default: davinci_mdio_default { | |
| 371 | + pinctrl-single,pins = < | |
| 372 | + /* MDIO */ | |
| 373 | + 0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ | |
| 374 | + 0x14c (PIN_OUTPUT | MUX_MODE0) /* mdio_clk.mdio_clk */ | |
| 375 | + >; | |
| 376 | + }; | |
| 377 | + | |
| 378 | + davinci_mdio_sleep: davinci_mdio_sleep { | |
| 379 | + pinctrl-single,pins = < | |
| 380 | + /* MDIO reset value */ | |
| 381 | + 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 382 | + 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 383 | + >; | |
| 384 | + }; | |
| 385 | + | |
| 386 | + dss_pins: dss_pins { | |
| 387 | + pinctrl-single,pins = < | |
| 388 | + 0x1b0 (PIN_OUTPUT | MUX_MODE2) /* cam0_hd.dss_data23 */ | |
| 389 | + 0x1b4 (PIN_OUTPUT | MUX_MODE2) /* cam0_vd.dss_data22 */ | |
| 390 | + 0x1b8 (PIN_OUTPUT | MUX_MODE2) /* cam0_field.dss_data21 */ | |
| 391 | + 0x1bc (PIN_OUTPUT | MUX_MODE2) /* cam0_wen.dss_data20 */ | |
| 392 | + 0x1c0 (PIN_OUTPUT | MUX_MODE2) /* cam0_pclk.dss_data19 */ | |
| 393 | + 0x1c4 (PIN_OUTPUT | MUX_MODE2) /* cam0_data8.dss_data18 */ | |
| 394 | + 0x1c8 (PIN_OUTPUT | MUX_MODE2) /* cam0_data9.dss_data17 */ | |
| 395 | + 0x1cc (PIN_OUTPUT | MUX_MODE2) /* cam1_data9.dss_data16 */ | |
| 396 | + 0x0a0 (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 0 */ | |
| 397 | + 0x0a4 (PIN_OUTPUT | MUX_MODE0) | |
| 398 | + 0x0a8 (PIN_OUTPUT | MUX_MODE0) | |
| 399 | + 0x0ac (PIN_OUTPUT | MUX_MODE0) | |
| 400 | + 0x0b0 (PIN_OUTPUT | MUX_MODE0) | |
| 401 | + 0x0b4 (PIN_OUTPUT | MUX_MODE0) | |
| 402 | + 0x0b8 (PIN_OUTPUT | MUX_MODE0) | |
| 403 | + 0x0bc (PIN_OUTPUT | MUX_MODE0) | |
| 404 | + 0x0c0 (PIN_OUTPUT | MUX_MODE0) | |
| 405 | + 0x0c4 (PIN_OUTPUT | MUX_MODE0) | |
| 406 | + 0x0c8 (PIN_OUTPUT | MUX_MODE0) | |
| 407 | + 0x0cc (PIN_OUTPUT | MUX_MODE0) | |
| 408 | + 0x0d0 (PIN_OUTPUT | MUX_MODE0) | |
| 409 | + 0x0d4 (PIN_OUTPUT | MUX_MODE0) | |
| 410 | + 0x0d8 (PIN_OUTPUT | MUX_MODE0) | |
| 411 | + 0x0dc (PIN_OUTPUT | MUX_MODE0) /* DSS DATA 15 */ | |
| 412 | + 0x0e0 (PIN_OUTPUT | MUX_MODE0) /* DSS VSYNC */ | |
| 413 | + 0x0e4 (PIN_OUTPUT | MUX_MODE0) /* DSS HSYNC */ | |
| 414 | + 0x0e8 (PIN_OUTPUT | MUX_MODE0) /* DSS PCLK */ | |
| 415 | + 0x0ec (PIN_OUTPUT | MUX_MODE0) /* DSS AC BIAS EN */ | |
| 416 | + | |
| 417 | + >; | |
| 418 | + }; | |
| 419 | + | |
| 420 | + /* SPI_NOR Pins */ | |
| 421 | + spi0_pins: spi0_pins { | |
| 422 | + pinctrl-single,pins = < | |
| 423 | + 0x15c (PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */ | |
| 424 | + 0x150 (PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */ | |
| 425 | + 0x154 (PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */ | |
| 426 | + 0x158 (PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */ | |
| 427 | + >; | |
| 428 | + }; | |
| 429 | + | |
| 430 | + /* SPI0 Pins */ | |
| 431 | + spi2_pins: spi2_pins { | |
| 432 | + pinctrl-single,pins = < | |
| 433 | + 0x1d4 (PIN_OUTPUT | MUX_MODE4) /* cam1_hd.spi2_cs0 */ | |
| 434 | + 0x1e0 (PIN_OUTPUT | MUX_MODE4) /* cam1_field.spi2_cs0 */ | |
| 435 | + 0x1dc (PIN_INPUT | MUX_MODE4) /* cam1_pclk.spi2_sclk */ | |
| 436 | + 0x1d0 (PIN_INPUT | MUX_MODE4) /* cam1_data8.spi2_d0 */ | |
| 437 | + 0x1e4 (PIN_OUTPUT | MUX_MODE4) /* cam1_wen.spi2_d1 */ | |
| 438 | + >; | |
| 439 | + }; | |
| 440 | + | |
| 441 | + /* SPI1 Pins */ | |
| 442 | + spi4_pins: spi4_pins { | |
| 443 | + pinctrl-single,pins = < | |
| 444 | + 0x25c (PIN_OUTPUT | MUX_MODE0) /* spi4_cs0.spi4_cs0 */ | |
| 445 | + 0x230 (PIN_OUTPUT | MUX_MODE2) /* uart3_cstn.spi4_cs1 */ | |
| 446 | + 0x250 (PIN_INPUT | MUX_MODE0) /* spi4_sclk.spi4_sclk */ | |
| 447 | + 0x254 (PIN_INPUT | MUX_MODE0) /* spi4_d0.spi4_d0 */ | |
| 448 | + 0x258 (PIN_OUTPUT | MUX_MODE0) /* spi4_d1.spi4_d1 */ | |
| 449 | + >; | |
| 450 | + }; | |
| 451 | + | |
| 452 | + mcasp1_pins: mcasp1_pins { | |
| 453 | + pinctrl-single,pins = < | |
| 454 | + 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_aclkr.mcasp1_aclkx */ | |
| 455 | + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_fsr.mcasp1_fsx */ | |
| 456 | + 0x1a8 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr1.mcasp1_axr0 */ | |
| 457 | + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_ahclkx.mcasp1_axr1 */ | |
| 458 | + >; | |
| 459 | + }; | |
| 460 | + | |
| 461 | + mcasp1_sleep_pins: mcasp1_sleep_pins { | |
| 462 | + pinctrl-single,pins = < | |
| 463 | + 0x1a0 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 464 | + 0x1a4 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 465 | + 0x1a8 (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 466 | + 0x1ac (PIN_INPUT_PULLDOWN | MUX_MODE7) | |
| 467 | + >; | |
| 468 | + }; | |
| 469 | + | |
| 470 | + lcd_pins: lcd_pins { | |
| 471 | + pinctrl-single,pins = < | |
| 472 | + 0x09c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_be0n_cle.gpio2_5 */ | |
| 473 | + >; | |
| 474 | + }; | |
| 475 | + | |
| 476 | + debugss_pins: pinmux_debugss_pins { | |
| 477 | + pinctrl-single,pins = < | |
| 478 | + 0x290 (PIN_INPUT_PULLDOWN) | |
| 479 | + 0x294 (PIN_INPUT_PULLDOWN) | |
| 480 | + 0x298 (PIN_INPUT_PULLDOWN) | |
| 481 | + 0x29C (PIN_INPUT_PULLDOWN) | |
| 482 | + 0x2A0 (PIN_INPUT_PULLDOWN) | |
| 483 | + 0x2A4 (PIN_INPUT_PULLDOWN) | |
| 484 | + 0x2A8 (PIN_INPUT_PULLDOWN) | |
| 485 | + >; | |
| 486 | + }; | |
| 487 | + | |
| 488 | + usb1_pins: usb1_pins { | |
| 489 | + pinctrl-single,pins = < | |
| 490 | + 0x2c0 (PIN_OUTPUT | MUX_MODE0) /* usb0_drvvbus.usb0_drvvbus */ | |
| 491 | + /* USB0 Over Current */ | |
| 492 | + 0x108 (PIN_INPUT | MUX_MODE9) /* mii1_col.gpio0_0 */ | |
| 493 | + >; | |
| 494 | + }; | |
| 495 | + | |
| 496 | + usb2_pins: usb2_pins { | |
| 497 | + pinctrl-single,pins = < | |
| 498 | + 0x2c4 (PIN_OUTPUT | MUX_MODE0) /* usb1_drvvbus.usb1_drvvbus */ | |
| 499 | + /* USB1 Over Current */ | |
| 500 | + 0x078 (PIN_INPUT | MUX_MODE7) /* gpmc_be1n.gpio1_28 */ | |
| 501 | + >; | |
| 502 | + }; | |
| 503 | +}; | |
| 504 | + | |
| 505 | +&i2c0 { | |
| 506 | + status = "okay"; | |
| 507 | + pinctrl-names = "default"; | |
| 508 | + pinctrl-0 = <&i2c0_pins>; | |
| 509 | + clock-frequency = <100000>; | |
| 510 | +}; | |
| 511 | + | |
| 512 | +&i2c1 { | |
| 513 | + status = "okay"; | |
| 514 | + pinctrl-names = "default"; | |
| 515 | + pinctrl-0 = <&i2c1_pins>; | |
| 516 | + clock-frequency = <100000>; | |
| 517 | + | |
| 518 | + tps@24 { | |
| 519 | + compatible = "ti,tps65218"; | |
| 520 | + reg = <0x24>; | |
| 521 | + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; | |
| 522 | + interrupt-controller; | |
| 523 | + #interrupt-cells = <2>; | |
| 524 | + | |
| 525 | + dcdc1: regulator-dcdc1 { | |
| 526 | + compatible = "ti,tps65218-dcdc1"; | |
| 527 | + /* VDD_CORE limits min of OPP50 and max of OPP100 */ | |
| 528 | + regulator-name = "vdd_core"; | |
| 529 | + regulator-min-microvolt = <912000>; | |
| 530 | + regulator-max-microvolt = <1144000>; | |
| 531 | + regulator-boot-on; | |
| 532 | + regulator-always-on; | |
| 533 | + }; | |
| 534 | + | |
| 535 | + dcdc2: regulator-dcdc2 { | |
| 536 | + compatible = "ti,tps65218-dcdc2"; | |
| 537 | + /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */ | |
| 538 | + regulator-name = "vdd_mpu"; | |
| 539 | + regulator-min-microvolt = <912000>; | |
| 540 | + regulator-max-microvolt = <1378000>; | |
| 541 | + regulator-boot-on; | |
| 542 | + regulator-always-on; | |
| 543 | + }; | |
| 544 | + | |
| 545 | + dcdc3: regulator-dcdc3 { | |
| 546 | + compatible = "ti,tps65218-dcdc3"; | |
| 547 | + regulator-name = "vdds_ddr"; | |
| 548 | + regulator-min-microvolt = <1500000>; | |
| 549 | + regulator-max-microvolt = <1500000>; | |
| 550 | + regulator-boot-on; | |
| 551 | + regulator-always-on; | |
| 552 | + regulator-state-mem { | |
| 553 | + regulator-on-in-suspend; | |
| 554 | + }; | |
| 555 | + regulator-state-disk { | |
| 556 | + regulator-off-in-suspend; | |
| 557 | + }; | |
| 558 | + }; | |
| 559 | + | |
| 560 | + dcdc4: regulator-dcdc4 { | |
| 561 | + compatible = "ti,tps65218-dcdc4"; | |
| 562 | + regulator-name = "v3_3d"; | |
| 563 | + regulator-min-microvolt = <3300000>; | |
| 564 | + regulator-max-microvolt = <3300000>; | |
| 565 | + regulator-boot-on; | |
| 566 | + regulator-always-on; | |
| 567 | + }; | |
| 568 | + | |
| 569 | + dcdc5: regulator-dcdc5 { | |
| 570 | + compatible = "ti,tps65218-dcdc5"; | |
| 571 | + regulator-name = "v1_0bat"; | |
| 572 | + regulator-min-microvolt = <1000000>; | |
| 573 | + regulator-max-microvolt = <1000000>; | |
| 574 | + regulator-boot-on; | |
| 575 | + regulator-always-on; | |
| 576 | + regulator-state-mem { | |
| 577 | + regulator-on-in-suspend; | |
| 578 | + }; | |
| 579 | + }; | |
| 580 | + | |
| 581 | + dcdc6: regulator-dcdc6 { | |
| 582 | + compatible = "ti,tps65218-dcdc6"; | |
| 583 | + regulator-name = "v1_8bat"; | |
| 584 | + regulator-min-microvolt = <1800000>; | |
| 585 | + regulator-max-microvolt = <1800000>; | |
| 586 | + regulator-boot-on; | |
| 587 | + regulator-always-on; | |
| 588 | + regulator-state-mem { | |
| 589 | + regulator-on-in-suspend; | |
| 590 | + }; | |
| 591 | + }; | |
| 592 | + | |
| 593 | + ldo1: regulator-ldo1 { | |
| 594 | + compatible = "ti,tps65218-ldo1"; | |
| 595 | + regulator-name = "v1_8d"; | |
| 596 | + regulator-min-microvolt = <1800000>; | |
| 597 | + regulator-max-microvolt = <1800000>; | |
| 598 | + regulator-boot-on; | |
| 599 | + regulator-always-on; | |
| 600 | + }; | |
| 601 | + | |
| 602 | + power-button { | |
| 603 | + compatible = "ti,tps65218-pwrbutton"; | |
| 604 | + status = "okay"; | |
| 605 | + interrupts = <3 IRQ_TYPE_EDGE_BOTH>; | |
| 606 | + }; | |
| 607 | + }; | |
| 608 | + | |
| 609 | + s35390a: s35390a@30 { | |
| 610 | + compatible = "s35390a"; | |
| 611 | + reg = <0x30>; | |
| 612 | + }; | |
| 613 | + | |
| 614 | + at24@50 { | |
| 615 | + compatible = "at24,24c256"; | |
| 616 | + reg = <0x50>; | |
| 617 | + }; | |
| 618 | + | |
| 619 | + at24@57 { | |
| 620 | + compatible = "at24,24c256"; | |
| 621 | + reg = <0x57>; | |
| 622 | + }; | |
| 623 | + | |
| 624 | + /* For TI TLV320AIC3106 Audio Codec */ | |
| 625 | + /*tlv320aic3106: tlv320aic3106@1b { | |
| 626 | + #sound-dai-cells = <0>; | |
| 627 | + compatible = "ti,tlv320aic3106"; | |
| 628 | + reg = <0x1b>; | |
| 629 | + status = "okay"; | |
| 630 | + | |
| 631 | + AVDD-supply = <&dcdc4>; | |
| 632 | + IOVDD-supply = <&dcdc6>; | |
| 633 | + DRVDD-supply = <&dcdc4>; | |
| 634 | + DVDD-supply = <&ldo1>; | |
| 635 | + };*/ | |
| 636 | + | |
| 637 | + /* For Freescale SGTL5000 Audio Codec */ | |
| 638 | + sgtl5000: sgtl5000@0a { | |
| 639 | + #sound-dai-cells = <0>; | |
| 640 | + compatible = "fsl,sgtl5000"; | |
| 641 | + reg = <0x0a>; | |
| 642 | + clocks = <&audio_mstrclk>; | |
| 643 | + VDDA-supply = <&dcdc4>; | |
| 644 | + VDDIO-supply = <&dcdc6>; | |
| 645 | + VDDD-supply = <&ldo1>; | |
| 646 | + }; | |
| 647 | +}; | |
| 648 | + | |
| 649 | +&i2c2 { | |
| 650 | + status = "okay"; | |
| 651 | + pinctrl-names = "default"; | |
| 652 | + pinctrl-0 = <&i2c2_pins>; | |
| 653 | + clock-frequency = <100000>; | |
| 654 | + | |
| 655 | + /* CH7055A Parallel LCD to VGA D-SUB 15 way */ | |
| 656 | + eeprom@76 { | |
| 657 | + compatible = "at,24c256"; | |
| 658 | + reg = <0x76>; | |
| 659 | + }; | |
| 660 | +}; | |
| 661 | + | |
| 662 | + | |
| 663 | +&epwmss0 { | |
| 664 | + status = "okay"; | |
| 665 | + | |
| 666 | + ehrpwm0: ehrpwm@48300200 { | |
| 667 | + status = "okay"; | |
| 668 | + pinctrl-names = "default"; | |
| 669 | + pinctrl-0 = <&ehrpwm0b_pins>; | |
| 670 | + }; | |
| 671 | +}; | |
| 672 | + | |
| 673 | +&gpio0 { | |
| 674 | + status = "okay"; | |
| 675 | +}; | |
| 676 | + | |
| 677 | +&gpio1 { | |
| 678 | + status = "okay"; | |
| 679 | +}; | |
| 680 | + | |
| 681 | +&gpio2 { | |
| 682 | + status = "okay"; | |
| 683 | +}; | |
| 684 | + | |
| 685 | +&gpio3 { | |
| 686 | + status = "okay"; | |
| 687 | +}; | |
| 688 | + | |
| 689 | +&gpio4 { | |
| 690 | + status = "okay"; | |
| 691 | +}; | |
| 692 | + | |
| 693 | +&gpio5 { | |
| 694 | + status = "okay"; | |
| 695 | +}; | |
| 696 | + | |
| 697 | +&mmc1 { | |
| 698 | + status = "okay"; | |
| 699 | + pinctrl-names = "default"; | |
| 700 | + pinctrl-0 = <&mmc1_pins>; | |
| 701 | + | |
| 702 | + vmmc-supply = <&dcdc4>; | |
| 703 | + bus-width = <4>; | |
| 704 | + cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; | |
| 705 | +}; | |
| 706 | + | |
| 707 | +&mmc2 { | |
| 708 | + pinctrl-names = "default"; | |
| 709 | + pinctrl-0 = <&emmc_pins>; | |
| 710 | + bus-width = <8>; | |
| 711 | + vmmc-supply = <&vmmcwl_fixed>; | |
| 712 | + status = "okay"; | |
| 713 | + ti,non-removable; | |
| 714 | +}; | |
| 715 | + | |
| 716 | +/*If carrier board eMMC (or 2nd SD slot) is present and used, un-comment out the following nodes. SD card will be emulated /dev/mmcblk2 instead of /dev/mmcblk1*/ | |
| 717 | + | |
| 718 | +&mmc3 { | |
| 719 | + status = "okay"; | |
| 720 | + dmas = <&edma 30 | |
| 721 | + &edma 31>; | |
| 722 | + dma-names = "tx", "rx"; | |
| 723 | + vmmc-supply = <&vmmcwl_fixed>; | |
| 724 | + bus-width = <8>; | |
| 725 | + pinctrl-names = "default"; | |
| 726 | + pinctrl-0 = <&sdmmc_pins>; | |
| 727 | + keep-power-in-suspend; | |
| 728 | + ti,non-removable; | |
| 729 | +}; | |
| 730 | + | |
| 731 | +&edma { | |
| 732 | + ti,edma-xbar-event-map = /bits/ 16 <1 30 | |
| 733 | + 2 31>; | |
| 734 | +}; | |
| 735 | + | |
| 736 | +/* Four-Wire Resistive Touch */ | |
| 737 | +&tscadc { | |
| 738 | + status = "disabled"; | |
| 739 | + tsc { | |
| 740 | + ti,wires = <4>; | |
| 741 | + ti,x-plate-resistance = <200>; | |
| 742 | + ti,coordinate-readouts = <5>; | |
| 743 | + ti,wire-config = <0x00 0x11 0x22 0x33>; | |
| 744 | + ti,charge-delay = <0xB000>; | |
| 745 | + }; | |
| 746 | + | |
| 747 | + adc { | |
| 748 | + ti,adc-channels = <0 1 2 3>; | |
| 749 | + }; | |
| 750 | +}; | |
| 751 | + | |
| 752 | +&usb2_phy1 { | |
| 753 | + status = "okay"; | |
| 754 | +}; | |
| 755 | + | |
| 756 | +&usb1 { | |
| 757 | + dr_mode = "host"; | |
| 758 | + status = "okay"; | |
| 759 | + pinctrl-names = "default"; | |
| 760 | + pinctrl-0 = <&usb1_pins>; | |
| 761 | +}; | |
| 762 | + | |
| 763 | +&usb2_phy2 { | |
| 764 | + status = "okay"; | |
| 765 | +}; | |
| 766 | + | |
| 767 | +&usb2 { | |
| 768 | + dr_mode = "host"; | |
| 769 | + status = "okay"; | |
| 770 | + pinctrl-names = "default"; | |
| 771 | + pinctrl-0 = <&usb2_pins>; | |
| 772 | +}; | |
| 773 | + | |
| 774 | +&spi0 { | |
| 775 | + ti,spi-num-cs = <1>; | |
| 776 | + status = "okay"; | |
| 777 | + pinctrl-names = "default"; | |
| 778 | + pinctrl-0 = <&spi0_pins>; | |
| 779 | + dmas = <&edma 16 | |
| 780 | + &edma 17>; | |
| 781 | + dma-names = "tx0", "rx0"; | |
| 782 | + | |
| 783 | + flash: mx25u3235f@0 { | |
| 784 | + #address-cells = <1>; | |
| 785 | + #size-cells = <1>; | |
| 786 | + compatible = "jedec,spi-nor"; | |
| 787 | + spi-max-frequency = <24000000>; | |
| 788 | + reg = <0>; | |
| 789 | + | |
| 790 | + /* MTD partition table. | |
| 791 | + * The ROM checks the first 512KiB | |
| 792 | + * for a valid file to boot(XIP). | |
| 793 | + */ | |
| 794 | + partition@0 { | |
| 795 | + label = "U-Boot"; | |
| 796 | + reg = <0x0 0x100000>; | |
| 797 | + }; | |
| 798 | + | |
| 799 | + partition@100000 { | |
| 800 | + label = "U-Boot Environment"; | |
| 801 | + reg = <0x100000 0x080000>; | |
| 802 | + }; | |
| 803 | + | |
| 804 | + partition@180000 { | |
| 805 | + label = "Flattened Device Tree"; | |
| 806 | + reg = <0x180000 0x200000>; | |
| 807 | + }; | |
| 808 | + | |
| 809 | + }; | |
| 810 | +}; | |
| 811 | + | |
| 812 | +&spi2 { | |
| 813 | + ti,spi-num-cs = <2>; | |
| 814 | + status = "okay"; | |
| 815 | + pinctrl-names = "default"; | |
| 816 | + pinctrl-0 = <&spi2_pins>; | |
| 817 | + dmas = <&edma 18 | |
| 818 | + &edma 19 | |
| 819 | + &edma 20 | |
| 820 | + &edma 21>; | |
| 821 | + dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| 822 | + | |
| 823 | + spidev1: spidev@0 { | |
| 824 | + #address-cells = <1>; | |
| 825 | + #size-cells = <0>; | |
| 826 | + compatible = "spidev"; | |
| 827 | + reg = <0>; | |
| 828 | + spi-max-frequency = <24000000>; | |
| 829 | + }; | |
| 830 | + | |
| 831 | + spidev2: spidev@1 { | |
| 832 | + #address-cells = <1>; | |
| 833 | + #size-cells = <0>; | |
| 834 | + compatible = "spidev"; | |
| 835 | + reg = <1>; | |
| 836 | + spi-max-frequency = <24000000>; | |
| 837 | + }; | |
| 838 | + }; | |
| 839 | + | |
| 840 | +&spi4 { | |
| 841 | + ti,spi-num-cs = <2>; | |
| 842 | + status = "okay"; | |
| 843 | + pinctrl-names = "default"; | |
| 844 | + pinctrl-0 = <&spi4_pins>; | |
| 845 | + dmas = <&edma 26 | |
| 846 | + &edma 27 | |
| 847 | + &edma 28 | |
| 848 | + &edma 29>; | |
| 849 | + dma-names = "tx0", "rx0", "tx1", "rx1"; | |
| 850 | + | |
| 851 | + spidev3: spidev@0 { | |
| 852 | + #address-cells = <1>; | |
| 853 | + #size-cells = <0>; | |
| 854 | + compatible = "spidev"; | |
| 855 | + reg = <0>; | |
| 856 | + spi-max-frequency = <24000000>; | |
| 857 | + }; | |
| 858 | + | |
| 859 | + spidev4: spidev@1 { | |
| 860 | + #address-cells = <1>; | |
| 861 | + #size-cells = <0>; | |
| 862 | + compatible = "spidev"; | |
| 863 | + reg = <1>; | |
| 864 | + spi-max-frequency = <24000000>; | |
| 865 | + }; | |
| 866 | + }; | |
| 867 | + | |
| 868 | +&uart0 { | |
| 869 | + pinctrl-names = "default"; | |
| 870 | + pinctrl-0 = <&uart0_pins>; | |
| 871 | + pinctrl-1 = <&uart0_pins_sleep>; | |
| 872 | + | |
| 873 | + status = "okay"; | |
| 874 | +}; | |
| 875 | + | |
| 876 | +&uart3 { | |
| 877 | + pinctrl-names = "default"; | |
| 878 | + pinctrl-0 = <&uart3_pins>; | |
| 879 | + pinctrl-1 = <&uart3_pins_sleep>; | |
| 880 | + | |
| 881 | + status = "okay"; | |
| 882 | +}; | |
| 883 | + | |
| 884 | +&uart2 { | |
| 885 | + pinctrl-names = "default"; | |
| 886 | + pinctrl-0 = <&uart2_pins>; | |
| 887 | + pinctrl-1 = <&uart2_pins_sleep>; | |
| 888 | + | |
| 889 | + status = "okay"; | |
| 890 | +}; | |
| 891 | + | |
| 892 | +&uart4 { | |
| 893 | + pinctrl-names = "default"; | |
| 894 | + pinctrl-0 = <&uart4_pins>; | |
| 895 | + pinctrl-1 = <&uart4_pins_sleep>; | |
| 896 | + | |
| 897 | + status = "okay"; | |
| 898 | +}; | |
| 899 | + | |
| 900 | +&dcan0 { | |
| 901 | + pinctrl-names = "default"; | |
| 902 | + pinctrl-0 = <&dcan0_default>; | |
| 903 | + status = "okay"; | |
| 904 | +}; | |
| 905 | + | |
| 906 | +&dcan1 { | |
| 907 | + pinctrl-names = "default"; | |
| 908 | + pinctrl-0 = <&dcan1_default>; | |
| 909 | + status = "okay"; | |
| 910 | +}; | |
| 911 | + | |
| 912 | +&mac { | |
| 913 | + pinctrl-names = "default", "sleep"; | |
| 914 | + pinctrl-0 = <&cpsw_default>; | |
| 915 | + pinctrl-1 = <&cpsw_sleep>; | |
| 916 | + dual_emac = <1>; | |
| 917 | + status = "okay"; | |
| 918 | +}; | |
| 919 | + | |
| 920 | +&davinci_mdio { | |
| 921 | + pinctrl-names = "default", "sleep"; | |
| 922 | + pinctrl-0 = <&davinci_mdio_default>; | |
| 923 | + pinctrl-1 = <&davinci_mdio_sleep>; | |
| 924 | + status = "okay"; | |
| 925 | +}; | |
| 926 | + | |
| 927 | +&cpsw_emac0 { | |
| 928 | + phy_id = <&davinci_mdio>, <6>; | |
| 929 | + phy-mode = "rgmii"; | |
| 930 | + dual_emac_res_vlan = <1>; | |
| 931 | +}; | |
| 932 | + | |
| 933 | +&cpsw_emac1 { | |
| 934 | + phy_id = <&davinci_mdio>, <7>; | |
| 935 | + phy-mode = "rgmii"; | |
| 936 | + dual_emac_res_vlan = <2>; | |
| 937 | +}; | |
| 938 | + | |
| 939 | +&elm { | |
| 940 | + status = "okay"; | |
| 941 | +}; | |
| 942 | + | |
| 943 | +&mcasp1 { | |
| 944 | + #sound-dai-cells = <0>; | |
| 945 | + pinctrl-names = "default", "sleep"; | |
| 946 | + pinctrl-0 = <&mcasp1_pins>; | |
| 947 | + pinctrl-1 = <&mcasp1_sleep_pins>; | |
| 948 | + | |
| 949 | + status = "okay"; | |
| 950 | + | |
| 951 | + op-mode = <0>; /* MCASP_IIS_MODE */ | |
| 952 | + tdm-slots = <2>; | |
| 953 | + /* 4 serializers */ | |
| 954 | + serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ | |
| 955 | + 1 2 0 0 | |
| 956 | + >; | |
| 957 | + | |
| 958 | + tx-num-evt = <1>; | |
| 959 | + rx-num-evt = <1>; | |
| 960 | +}; | |
| 961 | + | |
| 962 | +&dss { | |
| 963 | + status = "okay"; | |
| 964 | + | |
| 965 | + pinctrl-names = "default"; | |
| 966 | + pinctrl-0 = <&dss_pins>; | |
| 967 | + | |
| 968 | + port { | |
| 969 | + dpi_out: endpoint@0 { | |
| 970 | + remote-endpoint = <&lcd_in>; | |
| 971 | + data-lines = <24>; | |
| 972 | + }; | |
| 973 | + }; | |
| 974 | +}; | |
| 975 | + | |
| 976 | +&rtc { | |
| 977 | + status = "disabled"; /* Use Seiko S35390A on Module instead */ | |
| 978 | + ext-clk-src; | |
| 979 | +}; | |
| 980 | + | |
| 981 | +&wdt { | |
| 982 | + status = "okay"; | |
| 983 | +}; | |
| 984 | + | |
| 985 | +&cpu { | |
| 986 | + cpu0-supply = <&dcdc2>; | |
| 987 | +}; |
configs/smarct437x_evm_defconfig
| 1 | -CONFIG_ARM=y | |
| 2 | -CONFIG_AM43XX=y | |
| 3 | -CONFIG_TARGET_SMARCT437X_EVM=y | |
| 4 | -CONFIG_SYS_PROMPT="U-Boot# " | |
| 5 | -CONFIG_DM_SERIAL=y | |
| 6 | -CONFIG_DM_GPIO=y | |
| 7 | -CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 9 | -CONFIG_SPL=y | |
| 10 | -CONFIG_SPL_STACK_R=y | |
| 11 | -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,EMMC_BOOT" | |
| 12 | -CONFIG_HUSH_PARSER=y | |
| 13 | -CONFIG_CMD_BOOTZ=y | |
| 14 | -# CONFIG_CMD_IMLS is not set | |
| 15 | -CONFIG_CMD_ASKENV=y | |
| 16 | -# CONFIG_CMD_FLASH is not set | |
| 17 | -CONFIG_CMD_MMC=y | |
| 18 | -CONFIG_CMD_SF=y | |
| 19 | -CONFIG_CMD_SPI=y | |
| 20 | -CONFIG_CMD_I2C=y | |
| 21 | -CONFIG_CMD_USB=y | |
| 22 | -CONFIG_CMD_DFU=y | |
| 23 | -CONFIG_CMD_GPIO=y | |
| 24 | -# CONFIG_CMD_SETEXPR is not set | |
| 25 | -CONFIG_OF_CONTROL=y | |
| 26 | -CONFIG_DM=y | |
| 27 | -CONFIG_DMA=y | |
| 28 | -CONFIG_CMD_DHCP=y | |
| 29 | -CONFIG_CMD_MII=y | |
| 30 | -CONFIG_CMD_PING=y | |
| 31 | -CONFIG_CMD_EXT2=y | |
| 32 | -CONFIG_CMD_EXT4=y | |
| 33 | -CONFIG_CMD_EXT4_WRITE=y | |
| 34 | -CONFIG_CMD_FAT=y | |
| 35 | -CONFIG_CMD_FS_GENERIC=y | |
| 36 | -CONFIG_SPI_FLASH=y | |
| 37 | -CONFIG_SPI_FLASH_BAR=y | |
| 38 | -CONFIG_SPI_FLASH_MACRONIX=y | |
| 39 | -CONFIG_SYS_NS16550=y | |
| 40 | -CONFIG_TIMER=y | |
| 41 | -CONFIG_OMAP_TIMER=y | |
| 42 | -CONFIG_USB=y | |
| 43 | -CONFIG_USB_DWC3=y | |
| 44 | -CONFIG_USB_DWC3_GADGET=y | |
| 45 | -CONFIG_USB_DWC3_OMAP=y | |
| 46 | -CONFIG_USB_DWC3_PHY_OMAP=y | |
| 47 | -CONFIG_USB_GADGET=y | |
| 48 | -CONFIG_SPL_OF_LIBFDT=y | |
| 49 | -CONFIG_SPL_LOAD_FIT=y | |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 51 | -CONFIG_USB_GADGET_DOWNLOAD=y | |
| 52 | -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" | |
| 53 | -CONFIG_G_DNL_VENDOR_NUM=0x0403 | |
| 54 | -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 | |
| 55 | -CONFIG_CMD_TIME=y |
configs/smarct437x_evm_spi_defconfig
| 1 | -CONFIG_ARM=y | |
| 2 | -CONFIG_AM43XX=y | |
| 3 | -CONFIG_TARGET_SMARCT437X_EVM=y | |
| 4 | -CONFIG_SYS_PROMPT="U-Boot# " | |
| 5 | -CONFIG_DM_SERIAL=y | |
| 6 | -CONFIG_DM_GPIO=y | |
| 7 | -CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 9 | -CONFIG_SPL=y | |
| 10 | -CONFIG_SPL_STACK_R=y | |
| 11 | -CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,SPI_BOOT" | |
| 12 | -CONFIG_HUSH_PARSER=y | |
| 13 | -CONFIG_CMD_BOOTZ=y | |
| 14 | -# CONFIG_CMD_IMLS is not set | |
| 15 | -CONFIG_CMD_ASKENV=y | |
| 16 | -# CONFIG_CMD_FLASH is not set | |
| 17 | -CONFIG_CMD_MMC=y | |
| 18 | -CONFIG_CMD_SF=y | |
| 19 | -CONFIG_CMD_SPI=y | |
| 20 | -CONFIG_CMD_I2C=y | |
| 21 | -CONFIG_CMD_USB=y | |
| 22 | -CONFIG_CMD_DFU=y | |
| 23 | -CONFIG_CMD_GPIO=y | |
| 24 | -# CONFIG_CMD_SETEXPR is not set | |
| 25 | -CONFIG_OF_CONTROL=y | |
| 26 | -CONFIG_DM=y | |
| 27 | -CONFIG_CMD_DHCP=y | |
| 28 | -CONFIG_CMD_MII=y | |
| 29 | -CONFIG_CMD_PING=y | |
| 30 | -CONFIG_CMD_EXT2=y | |
| 31 | -CONFIG_CMD_EXT4=y | |
| 32 | -CONFIG_CMD_EXT4_WRITE=y | |
| 33 | -CONFIG_CMD_FAT=y | |
| 34 | -CONFIG_CMD_FS_GENERIC=y | |
| 35 | -CONFIG_SPI_FLASH=y | |
| 36 | -CONFIG_SPI_FLASH_BAR=y | |
| 37 | -CONFIG_SPI_FLASH_MACRONIX=y | |
| 38 | -CONFIG_SYS_NS16550=y | |
| 39 | -CONFIG_TIMER=y | |
| 40 | -CONFIG_OMAP_TIMER=y | |
| 41 | -CONFIG_USB=y | |
| 42 | -CONFIG_USB_DWC3=y | |
| 43 | -CONFIG_USB_DWC3_GADGET=y | |
| 44 | -CONFIG_USB_DWC3_OMAP=y | |
| 45 | -CONFIG_USB_DWC3_PHY_OMAP=y | |
| 46 | -CONFIG_USB_GADGET=y | |
| 47 | -CONFIG_FIT=y | |
| 48 | -CONFIG_SPL_OF_LIBFDT=y | |
| 49 | -CONFIG_SPL_LOAD_FIT=y | |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 51 | -CONFIG_USB_GADGET_DOWNLOAD=y | |
| 52 | -CONFIG_G_DNL_MANUFACTURER="Texas Instruments" | |
| 53 | -CONFIG_G_DNL_VENDOR_NUM=0x0403 | |
| 54 | -CONFIG_G_DNL_PRODUCT_NUM=0xbd00 | |
| 55 | -CONFIG_CMD_TIME=y |
configs/smarct437x_evm_spi_uart0_defconfig
| 1 | +CONFIG_ARM=y | |
| 2 | +CONFIG_AM43XX=y | |
| 3 | +CONFIG_TARGET_SMARCT437X_EVM=y | |
| 4 | +CONFIG_SYS_PROMPT="U-Boot# " | |
| 5 | +CONFIG_DM_SERIAL=y | |
| 6 | +CONFIG_DM_GPIO=y | |
| 7 | +CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 9 | +CONFIG_SPL=y | |
| 10 | +CONFIG_SPL_STACK_R=y | |
| 11 | +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,SPI_BOOT" | |
| 12 | +CONFIG_HUSH_PARSER=y | |
| 13 | +CONFIG_CMD_BOOTZ=y | |
| 14 | +# CONFIG_CMD_IMLS is not set | |
| 15 | +CONFIG_CMD_ASKENV=y | |
| 16 | +# CONFIG_CMD_FLASH is not set | |
| 17 | +CONFIG_CMD_MMC=y | |
| 18 | +CONFIG_CMD_SF=y | |
| 19 | +CONFIG_CMD_SPI=y | |
| 20 | +CONFIG_CMD_I2C=y | |
| 21 | +CONFIG_CMD_USB=y | |
| 22 | +CONFIG_CMD_DFU=y | |
| 23 | +CONFIG_CMD_GPIO=y | |
| 24 | +# CONFIG_CMD_SETEXPR is not set | |
| 25 | +CONFIG_OF_CONTROL=y | |
| 26 | +CONFIG_DM=y | |
| 27 | +CONFIG_CMD_DHCP=y | |
| 28 | +CONFIG_CMD_MII=y | |
| 29 | +CONFIG_CMD_PING=y | |
| 30 | +CONFIG_CMD_EXT2=y | |
| 31 | +CONFIG_CMD_EXT4=y | |
| 32 | +CONFIG_CMD_EXT4_WRITE=y | |
| 33 | +CONFIG_CMD_FAT=y | |
| 34 | +CONFIG_CMD_FS_GENERIC=y | |
| 35 | +CONFIG_SPI_FLASH=y | |
| 36 | +CONFIG_SPI_FLASH_BAR=y | |
| 37 | +CONFIG_SPI_FLASH_MACRONIX=y | |
| 38 | +CONFIG_SYS_NS16550=y | |
| 39 | +CONFIG_TIMER=y | |
| 40 | +CONFIG_OMAP_TIMER=y | |
| 41 | +CONFIG_USB=y | |
| 42 | +CONFIG_USB_DWC3=y | |
| 43 | +CONFIG_USB_DWC3_GADGET=y | |
| 44 | +CONFIG_USB_DWC3_OMAP=y | |
| 45 | +CONFIG_USB_DWC3_PHY_OMAP=y | |
| 46 | +CONFIG_USB_GADGET=y | |
| 47 | +CONFIG_FIT=y | |
| 48 | +CONFIG_SPL_OF_LIBFDT=y | |
| 49 | +CONFIG_SPL_LOAD_FIT=y | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x" | |
| 51 | +CONFIG_USB_GADGET_DOWNLOAD=y | |
| 52 | +CONFIG_G_DNL_MANUFACTURER="Texas Instruments" | |
| 53 | +CONFIG_G_DNL_VENDOR_NUM=0x0403 | |
| 54 | +CONFIG_G_DNL_PRODUCT_NUM=0xbd00 | |
| 55 | +CONFIG_CMD_TIME=y |
configs/smarct437x_evm_spi_uart1_defconfig
| ... | ... | @@ -5,7 +5,7 @@ |
| 5 | 5 | CONFIG_DM_SERIAL=y |
| 6 | 6 | CONFIG_DM_GPIO=y |
| 7 | 7 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x-uart2" | |
| 9 | 9 | CONFIG_SPL=y |
| 10 | 10 | CONFIG_SPL_STACK_R=y |
| 11 | 11 | CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=4,SPI_BOOT" |
| ... | ... | @@ -47,7 +47,7 @@ |
| 47 | 47 | CONFIG_FIT=y |
| 48 | 48 | CONFIG_SPL_OF_LIBFDT=y |
| 49 | 49 | CONFIG_SPL_LOAD_FIT=y |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x-uart2" | |
| 51 | 51 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 52 | 52 | CONFIG_G_DNL_MANUFACTURER="Texas Instruments" |
| 53 | 53 | CONFIG_G_DNL_VENDOR_NUM=0x0403 |
configs/smarct437x_evm_spi_uart2_defconfig
| ... | ... | @@ -5,7 +5,7 @@ |
| 5 | 5 | CONFIG_DM_SERIAL=y |
| 6 | 6 | CONFIG_DM_GPIO=y |
| 7 | 7 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x-uart1" | |
| 9 | 9 | CONFIG_SPL=y |
| 10 | 10 | CONFIG_SPL_STACK_R=y |
| 11 | 11 | CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3,SPI_BOOT" |
| ... | ... | @@ -47,7 +47,7 @@ |
| 47 | 47 | CONFIG_FIT=y |
| 48 | 48 | CONFIG_SPL_OF_LIBFDT=y |
| 49 | 49 | CONFIG_SPL_LOAD_FIT=y |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x-uart1" | |
| 51 | 51 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 52 | 52 | CONFIG_G_DNL_MANUFACTURER="Texas Instruments" |
| 53 | 53 | CONFIG_G_DNL_VENDOR_NUM=0x0403 |
configs/smarct437x_evm_uart0_defconfig
| 1 | +CONFIG_ARM=y | |
| 2 | +CONFIG_AM43XX=y | |
| 3 | +CONFIG_TARGET_SMARCT437X_EVM=y | |
| 4 | +CONFIG_SYS_PROMPT="U-Boot# " | |
| 5 | +CONFIG_DM_SERIAL=y | |
| 6 | +CONFIG_DM_GPIO=y | |
| 7 | +CONFIG_SPL_STACK_R_ADDR=0x82000000 | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 9 | +CONFIG_SPL=y | |
| 10 | +CONFIG_SPL_STACK_R=y | |
| 11 | +CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=1,EMMC_BOOT" | |
| 12 | +CONFIG_HUSH_PARSER=y | |
| 13 | +CONFIG_CMD_BOOTZ=y | |
| 14 | +# CONFIG_CMD_IMLS is not set | |
| 15 | +CONFIG_CMD_ASKENV=y | |
| 16 | +# CONFIG_CMD_FLASH is not set | |
| 17 | +CONFIG_CMD_MMC=y | |
| 18 | +CONFIG_CMD_SF=y | |
| 19 | +CONFIG_CMD_SPI=y | |
| 20 | +CONFIG_CMD_I2C=y | |
| 21 | +CONFIG_CMD_USB=y | |
| 22 | +CONFIG_CMD_DFU=y | |
| 23 | +CONFIG_CMD_GPIO=y | |
| 24 | +# CONFIG_CMD_SETEXPR is not set | |
| 25 | +CONFIG_OF_CONTROL=y | |
| 26 | +CONFIG_DM=y | |
| 27 | +CONFIG_DMA=y | |
| 28 | +CONFIG_CMD_DHCP=y | |
| 29 | +CONFIG_CMD_MII=y | |
| 30 | +CONFIG_CMD_PING=y | |
| 31 | +CONFIG_CMD_EXT2=y | |
| 32 | +CONFIG_CMD_EXT4=y | |
| 33 | +CONFIG_CMD_EXT4_WRITE=y | |
| 34 | +CONFIG_CMD_FAT=y | |
| 35 | +CONFIG_CMD_FS_GENERIC=y | |
| 36 | +CONFIG_SPI_FLASH=y | |
| 37 | +CONFIG_SPI_FLASH_BAR=y | |
| 38 | +CONFIG_SPI_FLASH_MACRONIX=y | |
| 39 | +CONFIG_SYS_NS16550=y | |
| 40 | +CONFIG_TIMER=y | |
| 41 | +CONFIG_OMAP_TIMER=y | |
| 42 | +CONFIG_USB=y | |
| 43 | +CONFIG_USB_DWC3=y | |
| 44 | +CONFIG_USB_DWC3_GADGET=y | |
| 45 | +CONFIG_USB_DWC3_OMAP=y | |
| 46 | +CONFIG_USB_DWC3_PHY_OMAP=y | |
| 47 | +CONFIG_USB_GADGET=y | |
| 48 | +CONFIG_SPL_OF_LIBFDT=y | |
| 49 | +CONFIG_SPL_LOAD_FIT=y | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x" | |
| 51 | +CONFIG_USB_GADGET_DOWNLOAD=y | |
| 52 | +CONFIG_G_DNL_MANUFACTURER="Texas Instruments" | |
| 53 | +CONFIG_G_DNL_VENDOR_NUM=0x0403 | |
| 54 | +CONFIG_G_DNL_PRODUCT_NUM=0xbd00 | |
| 55 | +CONFIG_CMD_TIME=y |
configs/smarct437x_evm_uart1_defconfig
| ... | ... | @@ -5,7 +5,7 @@ |
| 5 | 5 | CONFIG_DM_SERIAL=y |
| 6 | 6 | CONFIG_DM_GPIO=y |
| 7 | 7 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x-uart2" | |
| 9 | 9 | CONFIG_SPL=y |
| 10 | 10 | CONFIG_SPL_STACK_R=y |
| 11 | 11 | CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=4,EMMC_BOOT" |
| ... | ... | @@ -47,7 +47,7 @@ |
| 47 | 47 | CONFIG_USB_GADGET=y |
| 48 | 48 | CONFIG_SPL_OF_LIBFDT=y |
| 49 | 49 | CONFIG_SPL_LOAD_FIT=y |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x-uart2" | |
| 51 | 51 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 52 | 52 | CONFIG_G_DNL_MANUFACTURER="Texas Instruments" |
| 53 | 53 | CONFIG_G_DNL_VENDOR_NUM=0x0403 |
configs/smarct437x_evm_uart2_defconfig
| ... | ... | @@ -5,7 +5,7 @@ |
| 5 | 5 | CONFIG_DM_SERIAL=y |
| 6 | 6 | CONFIG_DM_GPIO=y |
| 7 | 7 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x-uart1" | |
| 9 | 9 | CONFIG_SPL=y |
| 10 | 10 | CONFIG_SPL_STACK_R=y |
| 11 | 11 | CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=3,EMMC_BOOT" |
| ... | ... | @@ -47,7 +47,7 @@ |
| 47 | 47 | CONFIG_USB_GADGET=y |
| 48 | 48 | CONFIG_SPL_OF_LIBFDT=y |
| 49 | 49 | CONFIG_SPL_LOAD_FIT=y |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x-uart1" | |
| 51 | 51 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 52 | 52 | CONFIG_G_DNL_MANUFACTURER="Texas Instruments" |
| 53 | 53 | CONFIG_G_DNL_VENDOR_NUM=0x0403 |
configs/smarct437x_evm_uart3_defconfig
| ... | ... | @@ -5,7 +5,7 @@ |
| 5 | 5 | CONFIG_DM_SERIAL=y |
| 6 | 6 | CONFIG_DM_GPIO=y |
| 7 | 7 | CONFIG_SPL_STACK_R_ADDR=0x82000000 |
| 8 | -CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x" | |
| 8 | +CONFIG_DEFAULT_DEVICE_TREE="am437x-smarct437x-uart3" | |
| 9 | 9 | CONFIG_SPL=y |
| 10 | 10 | CONFIG_SPL_STACK_R=y |
| 11 | 11 | CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5,EMMC_BOOT" |
| ... | ... | @@ -47,7 +47,7 @@ |
| 47 | 47 | CONFIG_USB_GADGET=y |
| 48 | 48 | CONFIG_SPL_OF_LIBFDT=y |
| 49 | 49 | CONFIG_SPL_LOAD_FIT=y |
| 50 | -CONFIG_OF_LIST="am437x-smarct437x" | |
| 50 | +CONFIG_OF_LIST="am437x-smarct437x-uart3" | |
| 51 | 51 | CONFIG_USB_GADGET_DOWNLOAD=y |
| 52 | 52 | CONFIG_G_DNL_MANUFACTURER="Texas Instruments" |
| 53 | 53 | CONFIG_G_DNL_VENDOR_NUM=0x0403 |