Commit 77cbd9536e6800c1ae259044298db7321b1f67aa
1 parent
b9b2724111
Exists in
smarc_8mq_lf_v2020.04
and in
17 other branches
arm: zynq: Add support for zc770-xm011-x16 configuration
zc770-xm011 is x8 width configuration. This FMC card has also x16 variant which requires different ps7_init configuration. This patch adds it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Showing 3 changed files with 827 additions and 0 deletions Side-by-side Diff
arch/arm/dts/zynq-zc770-xm011-x16.dts
1 | +zynq-zc770-xm011.dts |
board/xilinx/zynq/zynq-zc770-xm011-x16/ps7_init_gpl.c
1 | +/* | |
2 | + * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved. | |
3 | + * | |
4 | + * SPDX-License-Identifier: GPL-2.0+ | |
5 | + */ | |
6 | + | |
7 | +#include <asm/arch/ps7_init_gpl.h> | |
8 | + | |
9 | +static unsigned long ps7_pll_init_data_3_0[] = { | |
10 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
11 | + EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), | |
12 | + EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), | |
13 | + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), | |
14 | + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), | |
15 | + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), | |
16 | + EMIT_MASKPOLL(0xF800010C, 0x00000001U), | |
17 | + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), | |
18 | + EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), | |
19 | + EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), | |
20 | + EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), | |
21 | + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), | |
22 | + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), | |
23 | + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), | |
24 | + EMIT_MASKPOLL(0xF800010C, 0x00000002U), | |
25 | + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), | |
26 | + EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), | |
27 | + EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), | |
28 | + EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), | |
29 | + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), | |
30 | + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), | |
31 | + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), | |
32 | + EMIT_MASKPOLL(0xF800010C, 0x00000004U), | |
33 | + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), | |
34 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
35 | + EMIT_EXIT(), | |
36 | +}; | |
37 | + | |
38 | +static unsigned long ps7_clock_init_data_3_0[] = { | |
39 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
40 | + EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), | |
41 | + EMIT_MASKWRITE(0xF8000148, 0x00003F31U, 0x00000A01U), | |
42 | + EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00001402U), | |
43 | + EMIT_MASKWRITE(0xF8000158, 0x00003F33U, 0x00000601U), | |
44 | + EMIT_MASKWRITE(0xF800015C, 0x03F03F33U, 0x00600701U), | |
45 | + EMIT_MASKWRITE(0xF8000160, 0x007F007FU, 0x00000000U), | |
46 | + EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), | |
47 | + EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U), | |
48 | + EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), | |
49 | + EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x016D400DU), | |
50 | + EMIT_MASKWRITE(0xF8000304, 0x00000001U, 0x00000000U), | |
51 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
52 | + EMIT_EXIT(), | |
53 | +}; | |
54 | + | |
55 | +static unsigned long ps7_ddr_init_data_3_0[] = { | |
56 | + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), | |
57 | + EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001081U), | |
58 | + EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), | |
59 | + EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), | |
60 | + EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), | |
61 | + EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004159BU), | |
62 | + EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E438D2U), | |
63 | + EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U), | |
64 | + EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x27087290U), | |
65 | + EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U), | |
66 | + EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), | |
67 | + EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), | |
68 | + EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U), | |
69 | + EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), | |
70 | + EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U), | |
71 | + EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), | |
72 | + EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), | |
73 | + EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U), | |
74 | + EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U), | |
75 | + EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), | |
76 | + EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U), | |
77 | + EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), | |
78 | + EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), | |
79 | + EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), | |
80 | + EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), | |
81 | + EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), | |
82 | + EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U), | |
83 | + EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U), | |
84 | + EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), | |
85 | + EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), | |
86 | + EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), | |
87 | + EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), | |
88 | + EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U), | |
89 | + EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), | |
90 | + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000003U), | |
91 | + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), | |
92 | + EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), | |
93 | + EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), | |
94 | + EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), | |
95 | + EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), | |
96 | + EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), | |
97 | + EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U), | |
98 | + EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U), | |
99 | + EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U), | |
100 | + EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U), | |
101 | + EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x0003902DU), | |
102 | + EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00032022U), | |
103 | + EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x0003341CU), | |
104 | + EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00036438U), | |
105 | + EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), | |
106 | + EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), | |
107 | + EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), | |
108 | + EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), | |
109 | + EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x000000ADU), | |
110 | + EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x000000A2U), | |
111 | + EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000009CU), | |
112 | + EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x000000B8U), | |
113 | + EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x00000139U), | |
114 | + EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x0000011DU), | |
115 | + EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x00000122U), | |
116 | + EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x0000012EU), | |
117 | + EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000EDU), | |
118 | + EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000E2U), | |
119 | + EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000DCU), | |
120 | + EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000F8U), | |
121 | + EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U), | |
122 | + EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), | |
123 | + EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), | |
124 | + EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU), | |
125 | + EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU), | |
126 | + EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU), | |
127 | + EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU), | |
128 | + EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), | |
129 | + EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), | |
130 | + EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), | |
131 | + EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), | |
132 | + EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U), | |
133 | + EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), | |
134 | + EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), | |
135 | + EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), | |
136 | + EMIT_MASKPOLL(0xF8000B74, 0x00002000U), | |
137 | + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), | |
138 | + EMIT_MASKPOLL(0xF8006054, 0x00000007U), | |
139 | + EMIT_EXIT(), | |
140 | +}; | |
141 | + | |
142 | +static unsigned long ps7_mio_init_data_3_0[] = { | |
143 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
144 | + EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), | |
145 | + EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), | |
146 | + EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), | |
147 | + EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), | |
148 | + EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), | |
149 | + EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), | |
150 | + EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), | |
151 | + EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C61CU), | |
152 | + EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F9861CU), | |
153 | + EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F9861CU), | |
154 | + EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F9861CU), | |
155 | + EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U), | |
156 | + EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U), | |
157 | + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), | |
158 | + EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U), | |
159 | + EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001610U), | |
160 | + EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000610U), | |
161 | + EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000610U), | |
162 | + EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000610U), | |
163 | + EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000610U), | |
164 | + EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000610U), | |
165 | + EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000610U), | |
166 | + EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000610U), | |
167 | + EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001610U), | |
168 | + EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001610U), | |
169 | + EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001610U), | |
170 | + EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001610U), | |
171 | + EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001610U), | |
172 | + EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001611U), | |
173 | + EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001610U), | |
174 | + EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001610U), | |
175 | + EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001610U), | |
176 | + EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001610U), | |
177 | + EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001610U), | |
178 | + EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001610U), | |
179 | + EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001610U), | |
180 | + EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001610U), | |
181 | + EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x000016E0U), | |
182 | + EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x000016E1U), | |
183 | + EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001621U), | |
184 | + EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001620U), | |
185 | + EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x000016A0U), | |
186 | + EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x000016A0U), | |
187 | + EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x000016A0U), | |
188 | + EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x000016A0U), | |
189 | + EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x000016A0U), | |
190 | + EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x000016A0U), | |
191 | + EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001604U), | |
192 | + EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001605U), | |
193 | + EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001604U), | |
194 | + EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001605U), | |
195 | + EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001604U), | |
196 | + EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001604U), | |
197 | + EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001604U), | |
198 | + EMIT_MASKWRITE(0xF80007BC, 0x00003FFFU, 0x00001604U), | |
199 | + EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x00001605U), | |
200 | + EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x00001604U), | |
201 | + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001604U), | |
202 | + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001604U), | |
203 | + EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001640U), | |
204 | + EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001640U), | |
205 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
206 | + EMIT_EXIT(), | |
207 | +}; | |
208 | + | |
209 | +static unsigned long ps7_peripherals_init_data_3_0[] = { | |
210 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
211 | + EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), | |
212 | + EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), | |
213 | + EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), | |
214 | + EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), | |
215 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
216 | + EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U), | |
217 | + EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000003EU), | |
218 | + EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U), | |
219 | + EMIT_MASKWRITE(0xE0001004, 0x000003FFU, 0x00000020U), | |
220 | + EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), | |
221 | + EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), | |
222 | + EMIT_MASKWRITE(0xE000E014, 0x00FFFFFFU, 0x00245A55U), | |
223 | + EMIT_MASKWRITE(0xE000E018, 0x00000003U, 0x00000001U), | |
224 | + EMIT_MASKWRITE(0xE000E010, 0x03E00000U, 0x02400000U), | |
225 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
226 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
227 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
228 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
229 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
230 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
231 | + EMIT_EXIT(), | |
232 | +}; | |
233 | + | |
234 | +static unsigned long ps7_post_config_3_0[] = { | |
235 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
236 | + EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), | |
237 | + EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), | |
238 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
239 | + EMIT_EXIT(), | |
240 | +}; | |
241 | + | |
242 | +static unsigned long ps7_pll_init_data_2_0[] = { | |
243 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
244 | + EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), | |
245 | + EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), | |
246 | + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), | |
247 | + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), | |
248 | + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), | |
249 | + EMIT_MASKPOLL(0xF800010C, 0x00000001U), | |
250 | + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), | |
251 | + EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), | |
252 | + EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), | |
253 | + EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), | |
254 | + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), | |
255 | + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), | |
256 | + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), | |
257 | + EMIT_MASKPOLL(0xF800010C, 0x00000002U), | |
258 | + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), | |
259 | + EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), | |
260 | + EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), | |
261 | + EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), | |
262 | + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), | |
263 | + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), | |
264 | + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), | |
265 | + EMIT_MASKPOLL(0xF800010C, 0x00000004U), | |
266 | + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), | |
267 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
268 | + EMIT_EXIT(), | |
269 | +}; | |
270 | + | |
271 | +static unsigned long ps7_clock_init_data_2_0[] = { | |
272 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
273 | + EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), | |
274 | + EMIT_MASKWRITE(0xF8000148, 0x00003F31U, 0x00000A01U), | |
275 | + EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00001402U), | |
276 | + EMIT_MASKWRITE(0xF8000158, 0x00003F33U, 0x00000601U), | |
277 | + EMIT_MASKWRITE(0xF800015C, 0x03F03F33U, 0x00600701U), | |
278 | + EMIT_MASKWRITE(0xF8000160, 0x007F007FU, 0x00000000U), | |
279 | + EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), | |
280 | + EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U), | |
281 | + EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), | |
282 | + EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x016D400DU), | |
283 | + EMIT_MASKWRITE(0xF8000304, 0x00000001U, 0x00000000U), | |
284 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
285 | + EMIT_EXIT(), | |
286 | +}; | |
287 | + | |
288 | +static unsigned long ps7_ddr_init_data_2_0[] = { | |
289 | + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), | |
290 | + EMIT_MASKWRITE(0xF8006004, 0x1FFFFFFFU, 0x00081081U), | |
291 | + EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), | |
292 | + EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), | |
293 | + EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), | |
294 | + EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004159BU), | |
295 | + EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E438D2U), | |
296 | + EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U), | |
297 | + EMIT_MASKWRITE(0xF8006020, 0xFFFFFFFCU, 0x27287290U), | |
298 | + EMIT_MASKWRITE(0xF8006024, 0x0FFFFFFFU, 0x0000003CU), | |
299 | + EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), | |
300 | + EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), | |
301 | + EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U), | |
302 | + EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), | |
303 | + EMIT_MASKWRITE(0xF8006038, 0x00001FC3U, 0x00000000U), | |
304 | + EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), | |
305 | + EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), | |
306 | + EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U), | |
307 | + EMIT_MASKWRITE(0xF8006048, 0x3FFFFFFFU, 0x0003C248U), | |
308 | + EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), | |
309 | + EMIT_MASKWRITE(0xF8006058, 0x0001FFFFU, 0x00000101U), | |
310 | + EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), | |
311 | + EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), | |
312 | + EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), | |
313 | + EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), | |
314 | + EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), | |
315 | + EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U), | |
316 | + EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U), | |
317 | + EMIT_MASKWRITE(0xF80060A0, 0x00FFFFFFU, 0x00008000U), | |
318 | + EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), | |
319 | + EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), | |
320 | + EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), | |
321 | + EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), | |
322 | + EMIT_MASKWRITE(0xF80060B4, 0x000007FFU, 0x00000200U), | |
323 | + EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), | |
324 | + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000003U), | |
325 | + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), | |
326 | + EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), | |
327 | + EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), | |
328 | + EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), | |
329 | + EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), | |
330 | + EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), | |
331 | + EMIT_MASKWRITE(0xF8006118, 0x7FFFFFFFU, 0x40000001U), | |
332 | + EMIT_MASKWRITE(0xF800611C, 0x7FFFFFFFU, 0x40000001U), | |
333 | + EMIT_MASKWRITE(0xF8006120, 0x7FFFFFFFU, 0x40000001U), | |
334 | + EMIT_MASKWRITE(0xF8006124, 0x7FFFFFFFU, 0x40000001U), | |
335 | + EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x0003902DU), | |
336 | + EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00032022U), | |
337 | + EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x0003341CU), | |
338 | + EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00036438U), | |
339 | + EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), | |
340 | + EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), | |
341 | + EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), | |
342 | + EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), | |
343 | + EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x000000ADU), | |
344 | + EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x000000A2U), | |
345 | + EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000009CU), | |
346 | + EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x000000B8U), | |
347 | + EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x00000139U), | |
348 | + EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x0000011DU), | |
349 | + EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x00000122U), | |
350 | + EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x0000012EU), | |
351 | + EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000EDU), | |
352 | + EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000E2U), | |
353 | + EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000DCU), | |
354 | + EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000F8U), | |
355 | + EMIT_MASKWRITE(0xF8006190, 0xFFFFFFFFU, 0x10040080U), | |
356 | + EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), | |
357 | + EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), | |
358 | + EMIT_MASKWRITE(0xF8006208, 0x000F03FFU, 0x000803FFU), | |
359 | + EMIT_MASKWRITE(0xF800620C, 0x000F03FFU, 0x000803FFU), | |
360 | + EMIT_MASKWRITE(0xF8006210, 0x000F03FFU, 0x000803FFU), | |
361 | + EMIT_MASKWRITE(0xF8006214, 0x000F03FFU, 0x000803FFU), | |
362 | + EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), | |
363 | + EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), | |
364 | + EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), | |
365 | + EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), | |
366 | + EMIT_MASKWRITE(0xF80062A8, 0x00000FF7U, 0x00000000U), | |
367 | + EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), | |
368 | + EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), | |
369 | + EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), | |
370 | + EMIT_MASKPOLL(0xF8000B74, 0x00002000U), | |
371 | + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), | |
372 | + EMIT_MASKPOLL(0xF8006054, 0x00000007U), | |
373 | + EMIT_EXIT(), | |
374 | +}; | |
375 | + | |
376 | +static unsigned long ps7_mio_init_data_2_0[] = { | |
377 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
378 | + EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), | |
379 | + EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), | |
380 | + EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), | |
381 | + EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), | |
382 | + EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), | |
383 | + EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), | |
384 | + EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), | |
385 | + EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C61CU), | |
386 | + EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F9861CU), | |
387 | + EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F9861CU), | |
388 | + EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F9861CU), | |
389 | + EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U), | |
390 | + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000021U), | |
391 | + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), | |
392 | + EMIT_MASKWRITE(0xF8000B70, 0x07FFFFFFU, 0x00000823U), | |
393 | + EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001610U), | |
394 | + EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000610U), | |
395 | + EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000610U), | |
396 | + EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000610U), | |
397 | + EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000610U), | |
398 | + EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000610U), | |
399 | + EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000610U), | |
400 | + EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000610U), | |
401 | + EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001610U), | |
402 | + EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001610U), | |
403 | + EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001610U), | |
404 | + EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001610U), | |
405 | + EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001610U), | |
406 | + EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001611U), | |
407 | + EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001610U), | |
408 | + EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001610U), | |
409 | + EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001610U), | |
410 | + EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001610U), | |
411 | + EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001610U), | |
412 | + EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001610U), | |
413 | + EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001610U), | |
414 | + EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001610U), | |
415 | + EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x000016E0U), | |
416 | + EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x000016E1U), | |
417 | + EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001621U), | |
418 | + EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001620U), | |
419 | + EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x000016A0U), | |
420 | + EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x000016A0U), | |
421 | + EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x000016A0U), | |
422 | + EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x000016A0U), | |
423 | + EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x000016A0U), | |
424 | + EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x000016A0U), | |
425 | + EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001604U), | |
426 | + EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001605U), | |
427 | + EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001604U), | |
428 | + EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001605U), | |
429 | + EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001604U), | |
430 | + EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001604U), | |
431 | + EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001604U), | |
432 | + EMIT_MASKWRITE(0xF80007BC, 0x00003FFFU, 0x00001604U), | |
433 | + EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x00001605U), | |
434 | + EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x00001604U), | |
435 | + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001604U), | |
436 | + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001604U), | |
437 | + EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001640U), | |
438 | + EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001640U), | |
439 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
440 | + EMIT_EXIT(), | |
441 | +}; | |
442 | + | |
443 | +static unsigned long ps7_peripherals_init_data_2_0[] = { | |
444 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
445 | + EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), | |
446 | + EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), | |
447 | + EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), | |
448 | + EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), | |
449 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
450 | + EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U), | |
451 | + EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000003EU), | |
452 | + EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U), | |
453 | + EMIT_MASKWRITE(0xE0001004, 0x00000FFFU, 0x00000020U), | |
454 | + EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), | |
455 | + EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), | |
456 | + EMIT_MASKWRITE(0xE000E014, 0x00FFFFFFU, 0x00245A55U), | |
457 | + EMIT_MASKWRITE(0xE000E018, 0x00000003U, 0x00000001U), | |
458 | + EMIT_MASKWRITE(0xE000E010, 0x03E00000U, 0x02400000U), | |
459 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
460 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
461 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
462 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
463 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
464 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
465 | + EMIT_EXIT(), | |
466 | +}; | |
467 | + | |
468 | +static unsigned long ps7_post_config_2_0[] = { | |
469 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
470 | + EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), | |
471 | + EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), | |
472 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
473 | + EMIT_EXIT(), | |
474 | +}; | |
475 | + | |
476 | +static unsigned long ps7_pll_init_data_1_0[] = { | |
477 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
478 | + EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U), | |
479 | + EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U), | |
480 | + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U), | |
481 | + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U), | |
482 | + EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U), | |
483 | + EMIT_MASKPOLL(0xF800010C, 0x00000001U), | |
484 | + EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U), | |
485 | + EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U), | |
486 | + EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U), | |
487 | + EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U), | |
488 | + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U), | |
489 | + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U), | |
490 | + EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U), | |
491 | + EMIT_MASKPOLL(0xF800010C, 0x00000002U), | |
492 | + EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U), | |
493 | + EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U), | |
494 | + EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U), | |
495 | + EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U), | |
496 | + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U), | |
497 | + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U), | |
498 | + EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U), | |
499 | + EMIT_MASKPOLL(0xF800010C, 0x00000004U), | |
500 | + EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U), | |
501 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
502 | + EMIT_EXIT(), | |
503 | +}; | |
504 | + | |
505 | +static unsigned long ps7_clock_init_data_1_0[] = { | |
506 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
507 | + EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U), | |
508 | + EMIT_MASKWRITE(0xF8000148, 0x00003F31U, 0x00000A01U), | |
509 | + EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00001402U), | |
510 | + EMIT_MASKWRITE(0xF8000158, 0x00003F33U, 0x00000601U), | |
511 | + EMIT_MASKWRITE(0xF800015C, 0x03F03F33U, 0x00600701U), | |
512 | + EMIT_MASKWRITE(0xF8000160, 0x007F007FU, 0x00000000U), | |
513 | + EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U), | |
514 | + EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U), | |
515 | + EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U), | |
516 | + EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x016D400DU), | |
517 | + EMIT_MASKWRITE(0xF8000304, 0x00000001U, 0x00000000U), | |
518 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
519 | + EMIT_EXIT(), | |
520 | +}; | |
521 | + | |
522 | +static unsigned long ps7_ddr_init_data_1_0[] = { | |
523 | + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U), | |
524 | + EMIT_MASKWRITE(0xF8006004, 0x1FFFFFFFU, 0x00081081U), | |
525 | + EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU), | |
526 | + EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U), | |
527 | + EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U), | |
528 | + EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004159BU), | |
529 | + EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E438D2U), | |
530 | + EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U), | |
531 | + EMIT_MASKWRITE(0xF8006020, 0xFFFFFFFCU, 0x27287290U), | |
532 | + EMIT_MASKWRITE(0xF8006024, 0x0FFFFFFFU, 0x0000003CU), | |
533 | + EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U), | |
534 | + EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U), | |
535 | + EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U), | |
536 | + EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U), | |
537 | + EMIT_MASKWRITE(0xF8006038, 0x00001FC3U, 0x00000000U), | |
538 | + EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U), | |
539 | + EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U), | |
540 | + EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U), | |
541 | + EMIT_MASKWRITE(0xF8006048, 0x3FFFFFFFU, 0x0003C248U), | |
542 | + EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U), | |
543 | + EMIT_MASKWRITE(0xF8006058, 0x0001FFFFU, 0x00000101U), | |
544 | + EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U), | |
545 | + EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU), | |
546 | + EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U), | |
547 | + EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U), | |
548 | + EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U), | |
549 | + EMIT_MASKWRITE(0xF80060A0, 0x00FFFFFFU, 0x00008000U), | |
550 | + EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U), | |
551 | + EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U), | |
552 | + EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU), | |
553 | + EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU), | |
554 | + EMIT_MASKWRITE(0xF80060B4, 0x000007FFU, 0x00000200U), | |
555 | + EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U), | |
556 | + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000003U), | |
557 | + EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U), | |
558 | + EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U), | |
559 | + EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U), | |
560 | + EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U), | |
561 | + EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U), | |
562 | + EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U), | |
563 | + EMIT_MASKWRITE(0xF8006118, 0x7FFFFFFFU, 0x40000001U), | |
564 | + EMIT_MASKWRITE(0xF800611C, 0x7FFFFFFFU, 0x40000001U), | |
565 | + EMIT_MASKWRITE(0xF8006120, 0x7FFFFFFFU, 0x40000001U), | |
566 | + EMIT_MASKWRITE(0xF8006124, 0x7FFFFFFFU, 0x40000001U), | |
567 | + EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x0003902DU), | |
568 | + EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00032022U), | |
569 | + EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x0003341CU), | |
570 | + EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00036438U), | |
571 | + EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U), | |
572 | + EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U), | |
573 | + EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U), | |
574 | + EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U), | |
575 | + EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x000000ADU), | |
576 | + EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x000000A2U), | |
577 | + EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000009CU), | |
578 | + EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x000000B8U), | |
579 | + EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x00000139U), | |
580 | + EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x0000011DU), | |
581 | + EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x00000122U), | |
582 | + EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x0000012EU), | |
583 | + EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000EDU), | |
584 | + EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000E2U), | |
585 | + EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000DCU), | |
586 | + EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000F8U), | |
587 | + EMIT_MASKWRITE(0xF8006190, 0xFFFFFFFFU, 0x10040080U), | |
588 | + EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U), | |
589 | + EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U), | |
590 | + EMIT_MASKWRITE(0xF8006208, 0x000F03FFU, 0x000803FFU), | |
591 | + EMIT_MASKWRITE(0xF800620C, 0x000F03FFU, 0x000803FFU), | |
592 | + EMIT_MASKWRITE(0xF8006210, 0x000F03FFU, 0x000803FFU), | |
593 | + EMIT_MASKWRITE(0xF8006214, 0x000F03FFU, 0x000803FFU), | |
594 | + EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU), | |
595 | + EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU), | |
596 | + EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU), | |
597 | + EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU), | |
598 | + EMIT_MASKWRITE(0xF80062A8, 0x00000FF7U, 0x00000000U), | |
599 | + EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U), | |
600 | + EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U), | |
601 | + EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U), | |
602 | + EMIT_MASKPOLL(0xF8000B74, 0x00002000U), | |
603 | + EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U), | |
604 | + EMIT_MASKPOLL(0xF8006054, 0x00000007U), | |
605 | + EMIT_EXIT(), | |
606 | +}; | |
607 | + | |
608 | +static unsigned long ps7_mio_init_data_1_0[] = { | |
609 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
610 | + EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U), | |
611 | + EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U), | |
612 | + EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U), | |
613 | + EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U), | |
614 | + EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U), | |
615 | + EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U), | |
616 | + EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U), | |
617 | + EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C61CU), | |
618 | + EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F9861CU), | |
619 | + EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F9861CU), | |
620 | + EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F9861CU), | |
621 | + EMIT_MASKWRITE(0xF8000B6C, 0x000073FFU, 0x00000260U), | |
622 | + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000021U), | |
623 | + EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U), | |
624 | + EMIT_MASKWRITE(0xF8000B70, 0x07FFFFFFU, 0x00000823U), | |
625 | + EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001610U), | |
626 | + EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000610U), | |
627 | + EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000610U), | |
628 | + EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000610U), | |
629 | + EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000610U), | |
630 | + EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000610U), | |
631 | + EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000610U), | |
632 | + EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000610U), | |
633 | + EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001610U), | |
634 | + EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001610U), | |
635 | + EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001610U), | |
636 | + EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001610U), | |
637 | + EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001610U), | |
638 | + EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001611U), | |
639 | + EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001610U), | |
640 | + EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001610U), | |
641 | + EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001610U), | |
642 | + EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001610U), | |
643 | + EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001610U), | |
644 | + EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001610U), | |
645 | + EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001610U), | |
646 | + EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001610U), | |
647 | + EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x000016E0U), | |
648 | + EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x000016E1U), | |
649 | + EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001621U), | |
650 | + EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001620U), | |
651 | + EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x000016A0U), | |
652 | + EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x000016A0U), | |
653 | + EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x000016A0U), | |
654 | + EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x000016A0U), | |
655 | + EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x000016A0U), | |
656 | + EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x000016A0U), | |
657 | + EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001604U), | |
658 | + EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001605U), | |
659 | + EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001604U), | |
660 | + EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001605U), | |
661 | + EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001604U), | |
662 | + EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001604U), | |
663 | + EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001604U), | |
664 | + EMIT_MASKWRITE(0xF80007BC, 0x00003FFFU, 0x00001604U), | |
665 | + EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x00001605U), | |
666 | + EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x00001604U), | |
667 | + EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001604U), | |
668 | + EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001604U), | |
669 | + EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001640U), | |
670 | + EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001640U), | |
671 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
672 | + EMIT_EXIT(), | |
673 | +}; | |
674 | + | |
675 | +static unsigned long ps7_peripherals_init_data_1_0[] = { | |
676 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
677 | + EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U), | |
678 | + EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U), | |
679 | + EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U), | |
680 | + EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U), | |
681 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
682 | + EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U), | |
683 | + EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000003EU), | |
684 | + EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U), | |
685 | + EMIT_MASKWRITE(0xE0001004, 0x00000FFFU, 0x00000020U), | |
686 | + EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U), | |
687 | + EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U), | |
688 | + EMIT_MASKWRITE(0xE000E014, 0x00FFFFFFU, 0x00245A55U), | |
689 | + EMIT_MASKWRITE(0xE000E018, 0x00000003U, 0x00000001U), | |
690 | + EMIT_MASKWRITE(0xE000E010, 0x03E00000U, 0x02400000U), | |
691 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
692 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
693 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
694 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
695 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
696 | + EMIT_MASKDELAY(0xF8F00200, 1), | |
697 | + EMIT_EXIT(), | |
698 | +}; | |
699 | + | |
700 | +static unsigned long ps7_post_config_1_0[] = { | |
701 | + EMIT_MASKWRITE(0xF8000008, 0x0000FFFFU, 0x0000DF0DU), | |
702 | + EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU), | |
703 | + EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U), | |
704 | + EMIT_MASKWRITE(0xF8000004, 0x0000FFFFU, 0x0000767BU), | |
705 | + EMIT_EXIT(), | |
706 | +}; | |
707 | + | |
708 | +static unsigned long *ps7_mio_init_data = ps7_mio_init_data_3_0; | |
709 | +static unsigned long *ps7_pll_init_data = ps7_pll_init_data_3_0; | |
710 | +static unsigned long *ps7_clock_init_data = ps7_clock_init_data_3_0; | |
711 | +static unsigned long *ps7_ddr_init_data = ps7_ddr_init_data_3_0; | |
712 | +static unsigned long *ps7_peripherals_init_data = ps7_peripherals_init_data_3_0; | |
713 | + | |
714 | +int ps7_post_config(void) | |
715 | +{ | |
716 | + unsigned long si_ver = ps7GetSiliconVersion(); | |
717 | + int ret = -1; | |
718 | + | |
719 | + if (si_ver == PCW_SILICON_VERSION_1) { | |
720 | + ret = ps7_config(ps7_post_config_1_0); | |
721 | + if (ret != PS7_INIT_SUCCESS) | |
722 | + return ret; | |
723 | + } else if (si_ver == PCW_SILICON_VERSION_2) { | |
724 | + ret = ps7_config(ps7_post_config_2_0); | |
725 | + if (ret != PS7_INIT_SUCCESS) | |
726 | + return ret; | |
727 | + } else { | |
728 | + ret = ps7_config(ps7_post_config_3_0); | |
729 | + if (ret != PS7_INIT_SUCCESS) | |
730 | + return ret; | |
731 | + } | |
732 | + return PS7_INIT_SUCCESS; | |
733 | +} | |
734 | + | |
735 | +int ps7_init(void) | |
736 | +{ | |
737 | + unsigned long si_ver = ps7GetSiliconVersion(); | |
738 | + int ret; | |
739 | + | |
740 | + if (si_ver == PCW_SILICON_VERSION_1) { | |
741 | + ps7_mio_init_data = ps7_mio_init_data_1_0; | |
742 | + ps7_pll_init_data = ps7_pll_init_data_1_0; | |
743 | + ps7_clock_init_data = ps7_clock_init_data_1_0; | |
744 | + ps7_ddr_init_data = ps7_ddr_init_data_1_0; | |
745 | + ps7_peripherals_init_data = ps7_peripherals_init_data_1_0; | |
746 | + | |
747 | + } else if (si_ver == PCW_SILICON_VERSION_2) { | |
748 | + ps7_mio_init_data = ps7_mio_init_data_2_0; | |
749 | + ps7_pll_init_data = ps7_pll_init_data_2_0; | |
750 | + ps7_clock_init_data = ps7_clock_init_data_2_0; | |
751 | + ps7_ddr_init_data = ps7_ddr_init_data_2_0; | |
752 | + ps7_peripherals_init_data = ps7_peripherals_init_data_2_0; | |
753 | + | |
754 | + } else { | |
755 | + ps7_mio_init_data = ps7_mio_init_data_3_0; | |
756 | + ps7_pll_init_data = ps7_pll_init_data_3_0; | |
757 | + ps7_clock_init_data = ps7_clock_init_data_3_0; | |
758 | + ps7_ddr_init_data = ps7_ddr_init_data_3_0; | |
759 | + ps7_peripherals_init_data = ps7_peripherals_init_data_3_0; | |
760 | + } | |
761 | + | |
762 | + ret = ps7_config(ps7_mio_init_data); | |
763 | + if (ret != PS7_INIT_SUCCESS) | |
764 | + return ret; | |
765 | + | |
766 | + ret = ps7_config(ps7_pll_init_data); | |
767 | + if (ret != PS7_INIT_SUCCESS) | |
768 | + return ret; | |
769 | + | |
770 | + ret = ps7_config(ps7_clock_init_data); | |
771 | + if (ret != PS7_INIT_SUCCESS) | |
772 | + return ret; | |
773 | + | |
774 | + ret = ps7_config(ps7_ddr_init_data); | |
775 | + if (ret != PS7_INIT_SUCCESS) | |
776 | + return ret; | |
777 | + | |
778 | + ret = ps7_config(ps7_peripherals_init_data); | |
779 | + if (ret != PS7_INIT_SUCCESS) | |
780 | + return ret; | |
781 | + return PS7_INIT_SUCCESS; | |
782 | +} |
configs/zynq_zc770_xm011_x16_defconfig
1 | +CONFIG_ARM=y | |
2 | +CONFIG_ARCH_ZYNQ=y | |
3 | +CONFIG_SYS_TEXT_BASE=0x4000000 | |
4 | +CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16" | |
5 | +CONFIG_SPL_STACK_R_ADDR=0x200000 | |
6 | +# CONFIG_SPL_FAT_SUPPORT is not set | |
7 | +CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16" | |
8 | +CONFIG_DEBUG_UART=y | |
9 | +CONFIG_FIT=y | |
10 | +CONFIG_FIT_SIGNATURE=y | |
11 | +CONFIG_FIT_VERBOSE=y | |
12 | +# CONFIG_DISPLAY_CPUINFO is not set | |
13 | +CONFIG_SPL=y | |
14 | +CONFIG_SPL_STACK_R=y | |
15 | +CONFIG_SPL_OS_BOOT=y | |
16 | +CONFIG_HUSH_PARSER=y | |
17 | +CONFIG_SYS_PROMPT="Zynq> " | |
18 | +CONFIG_CMD_BOOTZ=y | |
19 | +# CONFIG_CMD_FLASH is not set | |
20 | +CONFIG_CMD_FPGA_LOADBP=y | |
21 | +CONFIG_CMD_FPGA_LOADFS=y | |
22 | +CONFIG_CMD_FPGA_LOADMK=y | |
23 | +CONFIG_CMD_FPGA_LOADP=y | |
24 | +CONFIG_CMD_GPIO=y | |
25 | +CONFIG_CMD_NAND_LOCK_UNLOCK=y | |
26 | +# CONFIG_CMD_SETEXPR is not set | |
27 | +# CONFIG_CMD_NET is not set | |
28 | +# CONFIG_CMD_NFS is not set | |
29 | +CONFIG_CMD_CACHE=y | |
30 | +CONFIG_OF_EMBED=y | |
31 | +CONFIG_SPL_DM_SEQ_ALIAS=y | |
32 | +CONFIG_FPGA_XILINX=y | |
33 | +CONFIG_DM_GPIO=y | |
34 | +# CONFIG_MMC is not set | |
35 | +CONFIG_DM_MMC=y | |
36 | +CONFIG_NAND=y | |
37 | +CONFIG_NAND_ZYNQ=y | |
38 | +CONFIG_DEBUG_UART_ZYNQ=y | |
39 | +CONFIG_DEBUG_UART_BASE=0xe0001000 | |
40 | +CONFIG_DEBUG_UART_CLOCK=50000000 | |
41 | +CONFIG_DEBUG_UART_ANNOUNCE=y | |
42 | +CONFIG_ZYNQ_SERIAL=y | |
43 | +CONFIG_REGEX=y | |
44 | +CONFIG_LIB_RAND=y |