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Commit 7842950f7c05aa9d901308d149ad3d67237bb315

Authored by Jaiprakash Singh
Committed by York Sun
1 parent 1ff10a87c3
Exists in v2017.01-smarct4x and in 30 other branches 8qm-imx_v2020.04_5.4.70_2.3.0, emb_lf_v2022.04, pitx_8mp_lf_v2020.04, smarc-8m-android-10.0.0_2.6.0, smarc-8m-android-11.0.0_2.0.0, smarc-8mp-android-11.0.0_2.0.0, smarc-imx6_v2018.03_4.14.98_2.0.0_ga, smarc-imx7_v2017.03_4.9.11_1.0.0_ga, smarc-imx7_v2018.03_4.14.98_2.0.0_ga, smarc-imx_v2017.03_4.9.11_1.0.0_ga, smarc-imx_v2017.03_4.9.88_2.0.0_ga, smarc-imx_v2017.03_o8.1.0_1.3.0_8m, smarc-imx_v2018.03_4.14.78_1.0.0_ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_2.0.0_ga, smarc_8m-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8m-imx_v2019.04_4.19.35_1.1.0, smarc_8m_00d0-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2018.03_4.14.98_2.0.0_ga, smarc_8mm-imx_v2019.04_4.19.35_1.1.0, smarc_8mm-imx_v2020.04_5.4.24_2.1.0, smarc_8mp_lf_v2020.04, smarc_8mq-imx_v2020.04_5.4.24_2.1.0, smarc_8mq_lf_v2020.04, v2016.05-dlt, v2016.05-smarct3x, v2016.05-smarct3x-emmc, v2016.05-smarct4x, v2017.01-smarct3x, v2017.01-smarct3x-emmc

powerpc/T102xRDB: Enable ifc nand ecc encode and decode 

IFC nand ecc encode and decode mode are not correctly
set in CSOR register during nand initialization.Enable
ecc encode/decode in 4-bit mode

Signed-off-by: Jaiprakash Singh <b44839@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

Showing 1 changed file with 3 additions and 1 deletions Side-by-side Diff

include/configs/T102xRDB.h
Diff comments   View file @ 7842950
... ... @@ -395,7 +395,9 @@
395 395 | CSOR_NAND_PB(64)) /*Pages Per Block = 64*/
396 396 #define CONFIG_SYS_NAND_BLOCK_SIZE (512 * 1024)
397 397 #elif defined(CONFIG_T1023RDB)
398   -#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_RAL_3 /* RAL 3Bytes */ \
  398 +#define CONFIG_SYS_NAND_CSOR (CSOR_NAND_ECC_ENC_EN /* ECC on encode */ \
  399 + | CSOR_NAND_ECC_DEC_EN /* ECC on decode */ \
  400 + | CSOR_NAND_ECC_MODE_4 /* 4-bit ECC */ \
399 401 | CSOR_NAND_RAL_3 /* RAL 3Bytes */ \
400 402 | CSOR_NAND_PGS_2K /* Page Size = 2K */ \
401 403 | CSOR_NAND_SPRZ_128 /* Spare size = 128 */ \