Commit 78db9a54636d3c43df0d5a9629c6293b2877c0a5
Committed by
Stefano Babic
1 parent
20ebb4fa75
Exists in
smarc_8mq_lf_v2020.04
and in
9 other branches
imx: add get_cpu_rev support for i.MX8MM
There are several variants based on i.MX8MM, add the support in get_cpu_rev Signed-off-by: Peng Fan <peng.fan@nxp.com>
Showing 1 changed file with 47 additions and 10 deletions Side-by-side Diff
arch/arm/mach-imx/imx8m/soc.c
... | ... | @@ -130,25 +130,62 @@ |
130 | 130 | |
131 | 131 | struct mm_region *mem_map = imx8m_mem_map; |
132 | 132 | |
133 | +static u32 get_cpu_variant_type(u32 type) | |
134 | +{ | |
135 | + struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; | |
136 | + struct fuse_bank *bank = &ocotp->bank[1]; | |
137 | + struct fuse_bank1_regs *fuse = | |
138 | + (struct fuse_bank1_regs *)bank->fuse_regs; | |
139 | + | |
140 | + u32 value = readl(&fuse->tester4); | |
141 | + | |
142 | + if (type == MXC_CPU_IMX8MM) { | |
143 | + switch (value & 0x3) { | |
144 | + case 2: | |
145 | + if (value & 0x1c0000) | |
146 | + return MXC_CPU_IMX8MMDL; | |
147 | + else | |
148 | + return MXC_CPU_IMX8MMD; | |
149 | + case 3: | |
150 | + if (value & 0x1c0000) | |
151 | + return MXC_CPU_IMX8MMSL; | |
152 | + else | |
153 | + return MXC_CPU_IMX8MMS; | |
154 | + default: | |
155 | + if (value & 0x1c0000) | |
156 | + return MXC_CPU_IMX8MML; | |
157 | + break; | |
158 | + } | |
159 | + } | |
160 | + | |
161 | + return type; | |
162 | +} | |
163 | + | |
133 | 164 | u32 get_cpu_rev(void) |
134 | 165 | { |
135 | 166 | struct anamix_pll *ana_pll = (struct anamix_pll *)ANATOP_BASE_ADDR; |
136 | 167 | u32 reg = readl(&ana_pll->digprog); |
137 | 168 | u32 type = (reg >> 16) & 0xff; |
169 | + u32 major_low = (reg >> 8) & 0xff; | |
138 | 170 | u32 rom_version; |
139 | 171 | |
140 | 172 | reg &= 0xff; |
141 | 173 | |
142 | - if (reg == CHIP_REV_1_0) { | |
143 | - /* | |
144 | - * For B0 chip, the DIGPROG is not updated, still TO1.0. | |
145 | - * we have to check ROM version further | |
146 | - */ | |
147 | - rom_version = readl((void __iomem *)ROM_VERSION_A0); | |
148 | - if (rom_version != CHIP_REV_1_0) { | |
149 | - rom_version = readl((void __iomem *)ROM_VERSION_B0); | |
150 | - if (rom_version >= CHIP_REV_2_0) | |
151 | - reg = CHIP_REV_2_0; | |
174 | + /* i.MX8MM */ | |
175 | + if (major_low == 0x41) { | |
176 | + type = get_cpu_variant_type(MXC_CPU_IMX8MM); | |
177 | + } else { | |
178 | + if (reg == CHIP_REV_1_0) { | |
179 | + /* | |
180 | + * For B0 chip, the DIGPROG is not updated, still TO1.0. | |
181 | + * we have to check ROM version further | |
182 | + */ | |
183 | + rom_version = readl((void __iomem *)ROM_VERSION_A0); | |
184 | + if (rom_version != CHIP_REV_1_0) { | |
185 | + rom_version = readl((void __iomem *)ROM_VERSION_B0); | |
186 | + if (rom_version >= CHIP_REV_2_0) | |
187 | + reg = CHIP_REV_2_0; | |
188 | + } | |
152 | 189 | } |
153 | 190 | } |
154 | 191 |