Commit 79d4702dd9366e478611a199ea9b7f2c2fb2bf45

Authored by Peng Fan
1 parent 584050b98c

MLK-12628 imx: mx6sx: enable MXC_CCM_CCGR3_LDB_DI0_OFFSET

MXC_CCM_CCGR3_LDB_DI0_OFFSET should not be disabled for i.MX6SX.
Otherwise met compile error. And Discard the if else.

Signed-off-by: Peng Fan <peng.fan@nxp.com>

Showing 1 changed file with 3 additions and 3 deletions Side-by-side Diff

arch/arm/include/asm/arch-mx6/crm_regs.h
... ... @@ -951,19 +951,19 @@
951 951 #define MXC_CCM_CCGR3_IPU2_IPU_DI1_OFFSET 10
952 952 #define MXC_CCM_CCGR3_IPU2_IPU_DI1_MASK (3 << MXC_CCM_CCGR3_IPU2_IPU_DI1_OFFSET)
953 953 #endif
954   -#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL)
  954 +
955 955 #define MXC_CCM_CCGR3_GPIO4_CLK_OFFSET 12
956 956 #define MXC_CCM_CCGR3_GPIO4_CLK_MASK (3 << MXC_CCM_CCGR3_GPIO4_CLK_OFFSET)
957 957 #define MXC_CCM_CCGR3_QSPI1_OFFSET 14
958 958 #define MXC_CCM_CCGR3_QSPI1_MASK (3 << MXC_CCM_CCGR3_QSPI1_OFFSET)
959   -#else
  959 +
960 960 #define MXC_CCM_CCGR3_LDB_DI0_OFFSET 12
961 961 #define MXC_CCM_CCGR3_LDB_DI0_MASK (3 << MXC_CCM_CCGR3_LDB_DI0_OFFSET)
962 962 #define MXC_CCM_CCGR3_LDB_DI1_OFFSET 14
963 963 #define MXC_CCM_CCGR3_LDB_DI1_MASK (3 << MXC_CCM_CCGR3_LDB_DI1_OFFSET)
964 964 #define MXC_CCM_CCGR3_MIPI_CORE_CFG_OFFSET 16
965 965 #define MXC_CCM_CCGR3_MIPI_CORE_CFG_MASK (3 << MXC_CCM_CCGR3_MIPI_CORE_CFG_OFFSET)
966   -#endif
  966 +
967 967 #ifdef CONFIG_MX6UL
968 968 #define MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_OFFSET 16
969 969 #define MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_MASK (3 << MXC_CCM_CCGR3_WDOG1_CLK_ENABLE_OFFSET)